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This paper describes a failure-resistant network using diversity coding (DC). The technique uses error correcting codes constructed across logically independent virtual paths in ATM networks. This system requires some restrictions on the arrangement of source/destination node pairs in order to avoid increase in parity path capacity. In this paper, the author proposes a network structure where the active paths are divided into several segment networks. This technique enables us to relax constraints on the DC network formation. The author also presents a mechanism for efficient reduction of spare path capacity by partial sharing of spare paths among segment networks. In addition, the author analyzes the performance of spare path capacity reduction and the performance in terms of failure restoration time. © 2000 Scripta Technica, Electron Comm Jpn Pt 1, 83(12): 1–14, 2000 [ABSTRACT FROM AUTHOR]

This paper considers the Z-channel, which is known as a channel model for photon communication or semiconductor memory. A new decoding algorithm is proposed and discussed. Recently, studies have been made from various viewpoints on the asymmetrical error-correcting code suited to the Z-channel, which is considered interesting. One of the basic problems in the Z-channel is the performance and the decoding method when the cyclic code with various features is applied, but it has been investigated little. This paper presents first a maximum-likelihood decoding algorithm which is highly efficient for the cyclic code on the Z-channel. It is then shown that by providing a certain threshold for the algorithm, a higher-speed decoding is realized. It is shown also that by setting the threshold above a certain value, the computational complexity can be improved without sacrificing the maximum-likelihood property. Finally, it is demonstrated by numerical calculation that the decoding error probability is improved greatly by the decoding algorithm proposed in this paper, together with a drastic improvement in the computational complexity. [ABSTRACT FROM AUTHOR]

This paper proposes the systolic decoder for Reed-Solomon (RS) codes based on systolic algorithms. Three steps of decoding procedures for RS codes can be reduced to simple repetitive algorithms and thus can be realized by one-dimensional systolic arrays, each operated by simple controls. The decoding system is a cascade connection of these cell arrays in one dimension. In this paper we also design three types of cells building arrays for RS codes on GF(28). Each cell has a size that permits its integration in a one-chip LSI and we can determine the number of cells according to the error correcting ability for codes. [ABSTRACT FROM AUTHOR]

The two-dimensional linear recurring array over a finite field is one of the important subjects of study in error-correcting codes and in discrete image models. In order to derive arrays or codes of a wider class from arrays or codes belonging to a class, not only linear operations such as sum, scalar product and shift, but also their combination with a fundamental nonlinear operation (component-wise product) can be used. A theoretical investigation has been made of the algebraic properties of the product of one-dimensional linear recurring arrays. The result of the studies has the practical implication that a direct-product code of a cyclic code can be constructed with fewer shift-register stages, using the product in the sense of this paper. This paper is to extend the fundamental properties of the product of one-dimensional linear recurring arrays to the two-dimensional case. The paper mainly discusses how the characteristics ideal I of the product G(I) = G(II) · G(I2) can be determined for the additive groups G(II) and G(I2) for the two-dimensional linear recurring arrays defined by the polynomial ideals II and I2, respectively. [ABSTRACT FROM AUTHOR]

Recently, for the improvement of reliability of digital communication systems, various kinds of error-correcting codes are being used. To improve system reliability through the use of more capable error-correcting codes it is extremely important to simplify the decoder construction and to reduce the decoding delay. This paper studies a decoding algorithm for a class of simple iterated codes (SI codes) constructed by simply repeating I times a codeword (called block) in a given code (called subcode). Moreover, this paper discusses the decoding delay when this decoding algorithm is applied to decoding the Reed-Muller codes constructed by the superimposing method. [ABSTRACT FROM AUTHOR]

This paper proposes a method of constructing nonlinear cyclic codes that form an additive group for which the decoding complexity or error correcting performance is improved relative to RS codes, which are typical linear cyclic codes. First, a code with information digit count k = 1 is constructed by using multiple RS code basis vectors obtained from Galois field Fourier transforms. Then, for k 1, codes are constructed from this code by using idempotent elements. Also, a code with code length n = 7 was constructed as an example, and both its minimal trellis diagram complexity and bit error rate on the AWGN channel due to a computer simulation were shown to be excellent. In addition, an iterative decoder was applied to the codes with k = 4 and 5, which had peak trellis diagram complexity, and it was shown that the decoding complexity could be reduced. © 2003 Wiley Periodicals, Inc. Electron Comm Jpn Pt 1, 86(7): 64–73, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecja.1170 [ABSTRACT FROM AUTHOR]

Hybrid forward error correction/automatic-repeat request (FEC/ARQ) systems achieve greater throughput than ARQ systems by combining forward error correction with automatic-repeat requests. A typ-II hybrid FEC/ARQ system is capable of adapting error-correction capacity according to varying channel conditions. Although a high throughput can be achieved in such systems by using conventional convolutional or rate compatible punctured convolutional (RCPC) codes, when the channel signal-to- noise ratio (SNR) Es/No is low, resulting throughput efficiency and mean block delay performances are unsatisfactory. In this paper, selective repeat type-II hybrid FEC/ARQ systems using concatenated codes are proposed to improve the throughput efficiency and mean block delay performances on channels with low SNRs. Systems using concatenated Reed-Solomon outer codes and either rate one-half convolutional or rate compatible convolutional (RCPC) inner codes are evaluated. The throughput efficiency and mean packet waiting and block delay times of these two types of concatenated coding systems are evaluated. A theoretical analysis and computer simulation of throughput efficiency of the proposed systems show increased performance for a wide range of Es/No over previous systems that use either stand-alone rate one-half convolutional or RCPC codes. It is also shown that the transmitter mean packet queueing delay and mean block delay times are reduced. In particular, by computer simulation, it is shown that when the traffic density is high, mean block delay times are greatly reduced by the use of RCPC inner codes. [ABSTRACT FROM AUTHOR]

This paper investigates the effects of noise-induced transmission errors on the performance of compression coding methods for still pictures. The following four coding methods are considered: (1) adaptive cosine transform coding (2) DPCM coding; (3) adaptive block coding; and (4) vector quantization coding. First, the relations among the bit error rate, signal-to-noise ratio (SNR), and code lengths by these coding methods are compared in the case of transmission without error control. Adaptive cosine transform coding and adaptive block coding require control information for adaptivity; therefore, they are investigated with and without transmission errors in the coding control information. Further, transmission with error control is studied for sending control information. Considering the error control methods, both automatic repeat request and forward error correction are considered. In these cases SNR deterioration by transmission noise beyond error correction capability and the amount of additional data required for error detection/correction or retransmission are examined. BCH codes are used for error detection and correction. [ABSTRACT FROM AUTHOR]

Perfect AN codes are those with the least redundancy under constant code length and error correcting capability. The existence of perfect codes has been studied for generalized r-ary represented AN codes and symmetric multivalue represented AN codes to apply them to multivalued arithmetic circuits. In this paper we define single error-correcting perfect BCN (Binary Coded Decimal)-AN codes and obtain the conditions under which the perfect BCN-AN codes exist. These conditions do not depend on the weight sequence itself used in BDC representation of code words, but on the class to which the weight sequence belongs. By using these conditions we prove that for some classes of the BCD representation including (8421) representation there exists no perfect BCD-AN code. For some of the remaining classes we obtain examples of generators of perfect BCD-AN codes through exhaustive computation. [ABSTRACT FROM AUTHOR]

Since error correcting and detecting codes are used in many fields, the assessment of the code performance in actual communication environments is an important subject. A communication channel is expressed by statistical model and the assessment is usually done by simulation and/or analysis method. However, conventional assessment methods are insufficient from the viewpoint of ease of handling, precision, etc. In this paper we present new methods for evaluations error-corrections and error-detecting codes. These evaluations make use of a new compound channel model which represents actual channels better than the channel models proposed previously. An exact analysis is used for computing the performance of codes. For these reasons, we can obtain reliable results. The time required for the evaluation is relatively small. Furthermore, their adaptability to various channels and codes is high and they are easy to use. Methods of evaluating the double encoding scheme, a well-known scheme in CIRC, is also presented. Finally, some examples of evaluating codes by these methods are presented and their effectiveness is shown. [ABSTRACT FROM AUTHOR]

This paper proposes an automatic equalizer containing a decoder for an error-correcting code. The purpose is the comprehensive compensation of code errors caused by intersymbol interference due to band-limitation and code errors caused by channel variation and noise. These are major problems in realizing a highly reliable communication. The system is called AEDEC and can reduce the correction error in the tap coefficient innovation due to decision error and the error propagation in a decision-feedback scheme. Consequently, it can achieve a stable convergence in the channel in an adverse condition where a traditional automatic equalizer cannot lead to a convergence. A control method is proposed for innovation of a tap coefficient and data feedback before the feedback decision based on the decoding reliability. This is estimated in the decoding process of the error-correcting code leading to the optimum control, and minimizing the effects of undetection or miscorrection of the decoding errors. Furthermore, as an extension of AEDEC, an adaptive canceller is proposed which eliminates the intersymbol interference without emphasizing noise by utilizing AEDEC as a means of preliminary decision. As a result of computer simulation applying algebraic decoding and analog-weight minimum decoding to recursive (7, 4) Hamming code, it is shown that the proposed schemes can lead to a stable convergence, thereby drastically improving the bit-error rate. [ABSTRACT FROM AUTHOR]