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The development of wide band-gap semiconductor devices is rapidly promoting the development of power electronics technology, especially in high frequency (HF) power converter region. A category of HF power converter is switch-mode power amplifier (PA). This paper focuses on the implementation of a multiphase dc–dc PA with high bandwidth and high power rate. When naturally sampled phase-shifted carrier modulation is implemented in the practical digital control system to control this HF power converter, the pulsewidth error problem caused by limited domain frequency of control chip becomes much severer. As a result, dc voltage component of each phase becomes different under several conditions, leading to current imbalance among phase inductors. This paper analyzes this problem and proposes a sensorless control method to solve it, based on the injection of random sequence in reference wave. A four-phase prototype employing GaN devices is fabricated, switching at 1 MHz. Current imbalance and effectiveness of the proposed control method are verified by experimental results. The prototype is capable of uniformly amplifying sine signal within 200 kHz and a 350 kHz bandwidth random signal, with peak output power up to 810 W. [ABSTRACT FROM AUTHOR]

This paper briefly reviews the common-mode voltage (CMV) and neutral point (NP) voltage for neutral point clamped three-level inverter (NPC TLI). Then, the space vector pulsewidth modulation (SVPWM) and traditional virtual SVPWM (VSVPWM) are discussed in terms of these two issues, revealing the drawbacks in reducing CMV or eliminating NP voltage oscillation. A novel virtual space vector modulation, named as RCMV_VSVPWM, is proposed in this paper to reduce CMV and eliminate NP voltage oscillation for NPC TLI. By selecting vectors with lower CMVs, a set of novel virtual voltage vectors are generated. The highlight of the method is zero average NP current in one control cycle and lower CMV. Furthermore, the active NP voltage control suitable for RCMV_VSVPWM is presented and evaluated. The corresponding experimental results are given, which are well-consistent with theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents a 5-level inverter topology for open-end induction motor drives by using a single dc source. The open stator windings of the drive are supplied with a 3-level flying capacitor inverter from one end and capacitor-fed 2-level inverter from another end. The voltage ratio of the dc link to the capacitor in 2-level inverter is maintained at 4:1 ratio to generate five-level voltage output. The capacitor in 2-level inverter is balanced by the switching redundant vector combinations from both the inverters while the floating capacitors in the 3-level inverter are balanced by using redundant switching states. The proposed topology gives 5-level operation with less number of floating capacitors and power semiconductor switches compared to other existing topologies. Also, the balancing of the capacitors is independent of load power factor and modulation index. Further, the generalization of the proposed dual inverter scheme for any n-level inverter is also included in this paper. The experimental results and required analysis are also presented to validate the inverter scheme. [ABSTRACT FROM AUTHOR]

This paper improves the position sensorless drive by sensing actual machine phase voltages. A high-bandwidth phase voltage measurement is developed for pulsewidth modulation (PWM) voltage inverters. On the basis, the actual phase voltage is obtained based on the digital integration of PWM voltage using the capture modulator in existing drive microcontrollers (MCU's). Comparing to existing phase voltage measurement, no separated A/D converter and communication hardware are required because PWM pulses are directly measured using MCUs. However, for standard machines without neutral points, only line-to-line ac PWM voltages can be measured for the phase voltage reconstruction. Since the capture based on transistor-transistor logic (TTL) logics receives only digital signals, a preprocess circuit to convert ac PWM line voltages to equivalent digital signals is proposed. This paper clearly explains the voltage sensing hardware using MCU capture modulator. According to experimental results, a 150-MHz sampling rate for phase voltage measurement is achieved based on the proposed capture-based voltage measurement. Although the physical limitation of back electromotive force estimation still appears, the proposed phase voltage measurement substantially enhances the sensorless drive performance at low speed. [ABSTRACT FROM AUTHOR]

Metallic joints are created in multivariable gas metal arc welding process by maintaining a balance between the quantum of heat generated and the feeding rate of electrode metal to the weld gap. The wire feeding control is often independently handled. The wire feeder unit should be simple, low cost, and capable of producing accurate speed. Arc welding controllers are often kept in clumsy conditions and the wire feeder unit is located close to the welder, could be much away from the controller. To reduce interconnections, separate sensing element for speed feedback should be avoided. Due to their negligible electrical and mechanical time constant, the pancake-type permanent magnet dc motor is suitable for wire feeding, where sensing of back electromotive force (EMF) for feedback is easy. When high frequency pulsewidth modulation (PWM) controller is used, the sensing of back EMF gets complicated. This paper explores the constraints on the choice of PWM frequency along with its maximum pulsewidth for different types of dc motors. It further elaborates comparatively on the choice of suitable control function for generating accurate speed control of wire feeding using back EMF as feedback. Finally, this paper also details the experimental results using the proposed control function. [ABSTRACT FROM AUTHOR]

Motors and inverters are increasingly being used in vehicles. As more vehicle components are being adopted, requirement for safety and installation space are increasing. Growing attention is being paid to the use of six-phase permanent magnet synchronous motors (PMSMs) and their parallel control by two inverters, because of their reduced size and enhanced safety. This paper proposes a pulsewidth modulation (PWM) control algorithm for a six-phase PMSM. In low-voltage vehicle components such as electric power steering, the current is usually acquired with resistors placed under the low-side switching devices. In the proposed control algorithm, the neutral voltage of the two inverters is shifted to either a lower or higher voltage within a certain range to allow for the signal conditioning time delay after the switching device turns on or off, and the time taken for the phase current to rise or settle. The paper proposes a novel PWM control algorithm that ensures that the on-time of the low-side switching devices satisfies the restriction on current sensing with resistors and reduces the current in the capacitor at the same time. The work contributes to reducing the current in a practical configuration involving low-voltage vehicle components. [ABSTRACT FROM AUTHOR]

A trinary multilevel converter uses a few heterogeneous H-bridge submodules (SMs) to synthesize an output voltage with multiple levels. Two major limitations of this converter are that it needs multiple dc sources and it cannot operate under pulsewidth modulation (PWM). This paper addresses these limitations by adding a low-voltage H-bridge SM to this converter and proposing a new switching algorithm. The resulting PWM-based asymmetric cascaded H-bridge converter uses only one dc source and synthesizes a high-quality output voltage. This improved converter can be a potential choice for real and reactive power support in power system applications. This paper also proposes methods for stability analysis and design of this converter. Experimental case studies evaluate the performance of the proposed converter for both standalone and grid-connected modes of operation. [ABSTRACT FROM AUTHOR]

This paper develops a modulation based fault-tolerant (FT) strategy for restoring the operation of three-phase modular multilevel converters (MMCs) with faulty switches. This FT strategy is based on a proposed modified space vector modulation (SVM) technique that generates balanced line-to-line (line) voltages even in the case of a fault occurrence. In the postfault operation, the proposed strategy is able to restore the fundamental amplitude of the line to the neutral (load) voltages to that of the normal operation condition with a slightly increased voltage stress over the switches in the faulty phase. In this paper, first a brief background about MMCs and SVM technique is provided. Then, the proposed FT strategy and the modified SVM technique are presented. Finally, several simulation and experimental results are provided to validate operation of the proposed strategy. [ABSTRACT FROM AUTHOR]

Standard pulsewidth modulation (PWM) schemes for modular multilevel converters (MMC) have neglected deviations of the module voltages from the mean module voltage of an MMC arm as well as the dynamic change in the module voltages since their last measurement and during the switching period. This induces an output voltage error. Large output voltage errors disturb the higher level closed-loop control of the MMC, such that control targets cannot be met anymore. The output voltage error can be reduced using advanced PWM methods that predict and include the dynamic change of the individual module voltages during a switching period in the calculations for the duty cycle. This paper shows measurement results obtained from an experimental medium-voltage prototype, proving that advanced methods lead to much lower output voltage errors than the standard methods, but cannot fulfill the expectations raised by the simulations documented in the literature. In order to overcome the limitations of the old method, a new method that includes the semiconductor voltage drop and parasitic resistances is introduced and evaluated with measurements in this paper. Furthermore, simulation results showing the influence of the considered modulation methods on the closed-loop current control performance are presented. [ABSTRACT FROM AUTHOR]

This paper presents two capacitor voltage balancing (CVB) strategies for modular multilevel converter (MMC) applications. Both balancing schemes are based on model predictive control and are designed to efficiently solve a constrained optimal control problem, where the predicted capacitor voltage errors are included in the cost function with the demanded output voltage of a cluster being forced through an equality constraint. The first method proposed in this paper computes specific modulation indexes for each module using the explicit solution of a relaxed version of the original optimization problem. The second approach proposed in this paper reduces the complexity of the original problem by linearizing the objective function and using an optimal sorting network based on a greedy algorithm to solve this approximation. Considering the structures of both solution approaches, they are integrated into modulation schemes based on phase-shifted and level-shifted pulsewidth modulation algorithms, respectively. Experimental results obtained from a nine-cell single-phase MMC prototype demonstrate the good performance achieved with the proposed methodologies, as well as the implementation simplicity offered by the proposed CVB algorithms. [ABSTRACT FROM AUTHOR]

The circulating current of modular multilevel converter (MMC) has a great impact on the power losses, the submodule (SM) capacitor voltage ripples, and the rating of power devices. Existing analysis of circulating current has considered the capacitor voltage and the modulation signal. In this paper, the effect of semiconductor devices on the circulating current is further presented. In order to realize the different circulating current injection targets under different conditions, a unified online calculation scheme by using the instantaneous information of MMC is proposed in this paper to generate the circulating current injection references. It avoids detecting the amplitude and phase of the output current or using an extensive lookup table. Besides, a mathematical analysis model is built and it reveals the impact on the capacitor voltage ripple and the rms value of arm current with different injection references, thus guide the determination of the injection ratio. Experimental results based on a three-phase MMC prototype with six SMs per arm are presented to demonstrate the analysis of circulating current and the proposed circulating current injection references generating method is verified by different circulating current control targets with different loads. [ABSTRACT FROM AUTHOR]

A nonisolated dc–dc converter with chain links of submodules (SMs) is proposed in this paper. The converter can perform as a dc transformer with a low step-up ratio. To demonstrate the step-up dc–dc conversion, the converter is operated in a resonant conversion mode, achieving soft switching and inherent balancing of the SM capacitor voltages. The circuit configuration is presented and the operation principle is analyzed in this paper. Experimental results based on a downscaled prototype validate the performance of the proposed converter as a low step-up ratio dc transformer. The converter also exhibits a good linearity covering a broad range. [ABSTRACT FROM AUTHOR]

Induction motor drives operated with a low ratio of the switching frequency to the fundamental frequency (i.e., pulse number) are prone to have high magnitudes of low-order torque harmonics. This paper proposes a method to analytically evaluate the harmonic torque spectrum based on the pulsewidth-modulated voltage waveforms for low pulse number operation. The predicted torque harmonic spectra for different pulsewidth-modulated waveforms are validated through simulations and experiments. This paper also reports optimal switching angles to minimize the total rms value of torque harmonics of order 6, 12, 18 $,\dots,$ $6(N-1)$ , considering the number of switching angles per quarter ($N$) to be 4 and 5. Compared to sine triangle pulsewidth modulation and selective harmonic elimination pulsewidth modulation with the same pulse number, the proposed optimal switching angles significantly reduce the total rms value of all harmonic torques of order lower than $6N$. Extensive simulation and experimental results on a 3.7-kW induction motor drive are presented to demonstrate the superior performance of the proposed optimal pulsewidth modulation. [ABSTRACT FROM AUTHOR]

In a sensorless vector control method, at low speeds and self-commissioning for AC motors, it is necessary to model dead time, rise/fall time, parasitic capacitors, and semiconductors’ voltage drop accurately. In this paper, voltage drop in each phase due to the nonlinear behavior of the inverter from the control system's viewpoint is precisely modeled by using two lookup tables. These lookup tables make the proposed model robust against the dc-link voltage and carrier frequency variations in the entire current range. In conventional methods at standstill, the measured voltage in the dc current test contains the nonlinearity of two phases. Therefore, to obtain the nonlinear voltage of each inverter phase, it is assumed that the values of inverter nonlinearity voltage at both high current and low current are equal. This simplification leads to distortion in measured voltage in the low currents. However, in this paper, the voltage drop equation of each phase is solved by numerical method that is realizable in conventional processors. The results obtained in actual voltage measurement show the superiority of the proposed method over traditional methods in the low currents. The proposed method is verified by using a voltage source inverter feeding a 2.2-kW three-phase induction motor. [ABSTRACT FROM AUTHOR]

The paper deals with some new results on the averaging theory approach for the analysis of feedback controlled pulsewidth modulation power electronic converters. It develops some considerations regarding the averaging approximation of time-variant differential systems proving an analytical relationship between the accuracy with which the solution of the averaged model converges to the solution of the original time-variant model (i.e., the switched model) and the switching frequency of the converters. This relation is valid both for stable and unstable systems. Moreover, this paper confirms, as corollary, that under suitable conditions (verified during the standard operations of the power electronic converters) the averaged model uniformly converges to the switched model. [ABSTRACT FROM AUTHOR]

Impedance source inverters have experienced a fast evolution since the first release of the Z-source inverter in 2003. This evolution is not limited to improving the structure of the different topologies but also includes their modulation and control schemes in order to reinforce their performance from many perspectives. Accordingly, many modulation schemes have been proposed in different research activities, but the full differences among these modulation schemes, including their effect on the switching losses, are not clear yet to the researchers. Hence, this research activity is aimed at introducing a comprehensive review of these different modulation schemes employed for the three-phase impedance source inverters, which is enhanced with a comparative assessment. In this paper, different modulation schemes are classified and reviewed, introducing an important benchmark in order to identify the basic differences between these modulation schemes. In other words, from this paper, the concept of classifying the different modulation schemes and the mandatory equations to implement each scheme can easily be drawn. Moreover, this review is essential for the next part, i.e., Part II, in which a comparative assessment is introduced. [ABSTRACT FROM PUBLISHER]

This paper presents an improved saliency-based position sensorless drive of an interior permanent-magnet synchronous machine (IPMSM) with a single current sensor, used for low cost applications. The phase current, reconstructed from a dc-link current, shows a reconstruction error resulted from the difference of the sampling point from that of a full current sensor drive. This reconstruction error results in degradation of the overall sensorless control performance. In this paper, we analyze the impact of the reconstruction error depending on the injection frequency for a high frequency voltage signal injection sensorless control. Based on this analysis, we propose an improved position sensorless drive that employs a new current reconstruction method. In order to minimize the reconstruction error, the proposed current reconstruction method predicts the dq-axis currents with the same sampling point as a full current sensor drive. Several experimental results are provided to verify the analysis of the reconstruction error and the proposed method's improved sensorless control performances. [ABSTRACT FROM PUBLISHER]

This paper analyzes the performances of different carrier phase-shifting pulse width modulation (PWM) techniques to be used with a multilevel cascaded H-bridge converter in case of unbalanced operational conditions. In fact, in many practical applications, the ideal condition of equal dc voltages and equal reference signals for each H-bridge cannot be achieved. In such conditions, the conventional carrier phase-shifting PWM technique loses its harmonic canceling capabilities and then the multilevel ac voltage harmonic quality is deeply affected. To overcome this limit of the original technique, different variations have been proposed. All of them still rely on the carrier phase-shifting concept and propose to use a different value of the shifting angle for each carrier (unlike the original technique) whenever unbalanced operational conditions occur. In this paper, the three main solutions proposed over the last years to extend the capabilities of the carrier phase-shifting PWM technique are compared. The analysis is focused on a three-cell cascaded H-bridge converter. Simulation and experimental results are presented. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel fuzzified mechanical sensorless speed estimation technique for permanent magnet direct current (PMDC) brushed motor operated with pulse width modulation (PWM) based terminal voltage. For replacement of conventional mechanical speed sensors, few mechanical sensorless speed estimation techniques have been reported recently in the field of PMDC brushed motor. In this paper, a novel technique is applied over a recently reported semianalytical dynamic time-domain PMDC brushed motor model incorporating space-domain effects, namely slotting effect and commutation phenomenon to simulate the proposed estimation process. Ripple and back electromotive force based standalone estimation approaches are hybridized in order to eliminate uncertainties in all regions of estimation. In this paper, a discrete fuzzified hybrid speed estimation model has been proposed with adequate dynamic simulation responses. Further the proposed discrete speed estimation model has been applied experimentally over a PWM-driven 24-V, 12-teeth, 100-W PMDC brushed motor and various dynamic real-time responses have been compared with conventionally captured speed samples to validate the proposed model. [ABSTRACT FROM PUBLISHER]

High-frequency components of acoustic noise radiated by the electric powertrain make the subjective perception of electric vehicles worse than expected under certain operating conditions. In order to investigate the influence of acoustic components on sound quality, a pulse width modulation (PWM)-fed electric powertrain is studied in this paper. First, the acoustic noise of the electric powertrain is collected in a semianechoic chamber. Then, two types of acoustic components of the electric powertrain, namely harmonic order noise and switching noise, are distinguished through the analyses of supplied current from the inverter and gear vibration. Furthermore, the relationship between subjective perception and spectral characteristics of the noise is discussed, based on which sensitivity is established. Subsequently, the contributions of acoustic components to psychoacoustical parameters are determined. After that, a sound quality model of the acoustic noise radiated by the electric powertrain is established. The comparison between jury test and prediction shows that the established model can be used for sound quality evaluation of the electric powertrain. Finally, the influences of harmonic order noise and switching noise on subjective perception are discussed. The main original contribution of this paper concerns the influences of harmonic order noise and switching noise radiated by PWM-fed electric powertrain on sound quality. [ABSTRACT FROM PUBLISHER]

Digital current controllers have the key impact on the performance of grid-side converters and ac drives. The voltage disturbances are commonly suppressed by enhancing the controller with an inner active resistance feedback. In cases where the switching noise and parasitic oscillations introduce sampling errors, conventional sampling is replaced by the oversampling-based error-free feedback acquisition which derives the average of the measured currents over the past switching period. The time delay introduced into the feedback path creates difficulties in designing the current controller with the active resistance. In this paper, we introduce a novel structure of the current controller, which includes the error-free sampling and the active resistance feedback. Devised structure improves the disturbance rejection by extending the range of permissible values of the active resistance. Controller structure is based on the internal model principles, and it maintains the input step response unaffected. This paper comprises analytical design, the gain setting procedure, computer simulation, and experimental results obtained from an experimental setup with a three-phase inverter, digital controller, and a permanent-magnet synchronous motor. [ABSTRACT FROM PUBLISHER]

High dc voltage utilization is one of the important requirements in a three-phase inverter. Under some carrier-based pulse width modulations (PWMs), the dc voltage utilization can reach the same maximum as that under the space vector modulation. But the third harmonic component of common-mode voltage (CMV) will be increased markedly while using these carrier-based PWMs in inverters. To improve the situation, this paper proposes that a midpoint-fluctuation carrier (MFC) scheme should be used in the three-phase inverter. The MFC is formed by adding a midpoint-fluctuation signal on the standard symmetrical triangular carrier. By analyzing the linear modulation region of the midpoint-fluctuation signals, a minimum fluctuant signal in the linear modulation region is designed in the paper. Compared with the use of other conventional schemes in the three-phase inverter, the use of minimum MFC scheme has higher fundamental amplitude in the output line voltage and smaller magnitude of the third harmonic in the CMV. The feasibility and validity of the MFC are proved by experiment results in a three-phase inverter. [ABSTRACT FROM PUBLISHER]

A novel hybrid pulse width modulation (PWM) technique is proposed in this paper for two parallel interleaved, two-level, three-phase voltage source inverters (VSIs). The two parallel interleaved VSIs are analyzed as a three-level (3L) inverter. A 3L inverter provides minimum line current ripple when nearest three voltage vectors are applied. In this paper, a novel carrier-based PWM technique is developed that ensures the application of nearest voltage vectors, keeping average circulating current to zero over a switching period. For carrier-based implementation of the proposed PWM, generalized common-mode (CM) offsets are derived in terms of maximum and minimum values of reference signals. Each 3L space-vector sector is divided into seven subsectors. For each subsector, a CM offset is calculated, addition of which to reference signals ensures the minimum line current ripple and zero average circulating current. Simulation and experimental results are provided to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

The aim of this paper is to study the dynamics of a permanent magnet direct current (PMDC) brushed motor while two crucial space-domain effects, namely, slotting effect and commutation phenomenon are taken into account. Semi-analytical dynamic time-domain PMDC brushed motor model inclusive of these space-domain effects is used to analyze and investigate the dynamics. Pulse width modulation operated discontinuous current PMDC brushed motor drive with steady duty cycle is employed to acquire the bifurcation patterns. The chaotic nature due to slotting effect and commutation is identified from the bifurcation patterns and reported. It also has to be admired that such nonlinear dynamical behavior with the same set of parameters at similar operating condition has not been observed when a conventional PMDC brushed motor dynamic model is considered. These space-domain effects, namely, slotting effect and commutation also have a prominent impact to make some time-domain states of a PMDC brushed motor drive chaotic. The role of slotting effect and commutation phenomenon to analyze the chaos over time-domain state variables of the PMDC brushed motor drive is investigated and validated experimentally in this paper. [ABSTRACT FROM PUBLISHER]

Dual active bridge (DAB) converter is the most suitable converter to transfer high power with bidirectional power flow capability and isolation. However, it has the drawbacks of circulation power flow (CPF) and limited range of zero voltage switching (ZVS). To overcome these drawbacks, several modulation strategies have been proposed; however, the CPF can be eliminated either at input or output voltage ends. In order to eliminate the CPF at both input and output sides, a novel front and rear end switch DAB (FRS-DAB) bidirectional dc–dc converter has been proposed in this paper. It has the advantages of lower current stress, extension of ZVS range, higher power transfer capacity, and improved efficiency compared to the conventional DAB converter. The paper presents the detailed operating modes and analysis of power flow control for the proposed FRS-DAB converter. The operation and analytical results of the proposed converter have been verified through the experimental results using an FPGA Spartan 3AN processor. [ABSTRACT FROM PUBLISHER]

This paper describes a silicon carbide pulse width modulation (PWM) signal generator in the 1.2 μm HiTSiC CMOS process developed by Raytheon Systems Ltd. The design features a 6-b binary input, which allows for setting a system's duty cycle. The results presented in this paper utilize a field programmable gate array board in the test setup to dynamically set the duty cycle by controlling each bit. A control current is also available to give the user added flexibility for tuning the duty cycle. Experimental results show the duty cycle range of the PWM generator to be between 4.7% and 95.2% at 400 °C. Sustained operation of the circuit is demonstrated over a period of 50 h at 300 °C. Finally, the PWM generator is evaluated in the operation of a boost converter. [ABSTRACT FROM PUBLISHER]

The selective harmonic current mitigation pulsewidth modulation (SHCM-PWM) technique can be used in cascaded multilevel converters to extend the harmonic reduction spectrum, reduce the coupling inductance and increase the efficiency. The offline SHCM-PWM technique has small number of switching transitions as its switching angles can only change once in a fundamental cycle and relatively long time delays because it uses FFT. As a result, its dynamic response has a lot to desire. As it will be proven in this paper, in four-quadrant power converters, to have a good transient dynamic response, both active and reactive power must be controlled at least two times in a fundamental cycle. In this paper, a hybrid modulation technique is introduced. The proposed technique uses SHCM-PWM under steady state and phase-shift PWM (PSPWM) under transient. In addition, in order to extend the modulation index range and ensure that SHCM-PWM can process four-quadrant active and reactive power, the constraints of the switching angles for the SHCM-PWM are modified. Simulations and experiments are conducted on a seven-level cascaded H-bridge converter to verify the proposed technique. [ABSTRACT FROM PUBLISHER]

The advancement in modulation strategies brings emergent solutions to suppress the leakage current in three-phase two-level transformerless grid-connected voltage source inverters (VSIs). However, most of the techniques are analyzed based on reduced common-mode voltage pulsewidth modulation (PWM) in motor drivers but fail to satisfy the specific requirement of grid-connected applications, such as wider power factor operation and lesser current distortion. To overcome such substantial drawbacks, this paper proposes a novel scalar PWM method for transformerless grid-connected VSIs. First, presented through a generalized scalar approach with unified zero-sequence voltage generation, the method is simple to implement and favored in practice. Besides, systematic and comprehensive mathematical analysis is illustrated to exhibit the validity of implemented method in reducing leakage current and shows its advantages over whole power factor range in terms of dc-link current harmonic, output current quality, and switching losses. Finally, simulations and experimental results are carried out to verify the effectiveness and superiority of the proposed method. [ABSTRACT FROM AUTHOR]

In the topology of double-inverter fed wound rotor induction machine (DI-WRIM) two voltage source inverters (VSIs) are connected one each on stator and rotor terminals. This leads to ripple in both stator and rotor currents. In this paper, these current ripples are analyzed in terms of the stator- and rotor-flux ripples, which are estimated from their respective terminals. To reduce the current ripples, the VSIs of the stator and rotor terminals are modulated with different pulsewidth modulation (PWM) sequences. The switching loss in the DI-WRIM is also analyzed for the proposed stator–rotor PWM sequence combinations, based on the flexibility of changing the power factor, by changing the flux component of the current fed from either side of a DI-WRIM drive. The proposed PWM combinations with the proposed flux component in currents are found to reduce the stator and rotor current ripples and, the switching losses. The analytically estimated root mean square current ripples for the proposed PWM combinations are validated using the simulation and the experimental results obtained from a 3-kW DI-WRIM drive. The analysis on switching losses is validated by measuring the temperature rise of heat sinks present in the individual stator and rotor side VSIs of the DI-WRIM drive. [ABSTRACT FROM AUTHOR]

This paper proposes the use of advanced bus clamping switching sequences to reduce the impedance network inductor current ripple of the three-phase Z-source inverter (ZSI). Proposed technique is named as ABC4_MCB. MCB denotes that the maximum constant boost control method is used for the voltage boosting. One of the conventional space vector pulsewidth modulation of ZSI, “ZSVM6,” is termed as ZSVM6_MCB under the maximum constant boost control method. The switching sequences of ABC4_MCB technique are designed in such a way that it offers around 34% reduction in the maximum instantaneous inductor current ripple as compared to the ZSVM6_MCB for the equal average switching frequency. The factor of percentage reduction in the inductor current ripple using the proposed technique is constant over the entire range of shoot through duty ratio (0–0.48). Theoretical findings have been verified using simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new multilevel inverter (MLI) topology that utilizes trinary sequence for the dc sources. It gives maximum output voltage level with minimum dc source and switch count when compared to other sequences, such as symmetric, natural, binary, and quasi-linear. This is due to the fact that the trinary sequence generates of all additive and subtractive combinations of input dc levels in the output voltage waveform. The concept is implemented on a 9-level asymmetric MLI using only four active devices. Multicarrier unipolar pulsewidth modulation technique is adopted to create the switching pulses. Theoretical calculation of total harmonic distortion in both voltage and current waveforms has been performed using asymptotic time domain formula. These values are compared with simulation and experimental values for different modulation indices. Power loss calculation for proposed topology is discussed with appropriate mathematical equations. [ABSTRACT FROM AUTHOR]

This paper presents a novel fault-tolerant method for active–neutral-point-clamped (ANPC) inverter using a modified carrier-based pulsewidth modulation. At a fault event, the ANPC inverter is divided into subinverters, and the modulating signal is modified to two modulating signals. The modified modulating signals are used to control the subinverters and allow continuous operation of the three-level ANPC inverter during faulty conditions even up to four open-switch faults per phase. This technique provides the fault-tolerant capability of the ANPC inverter without the need to add any additional phase legs or complex control strategies. Furthermore, the proposed technique ensures the voltage balancing of the dc-link capacitors. The performance of the proposed fault-tolerant technique is verified through simulation studies in MATLAB/Simulink under different faulty conditions. The feasibility of the proposed technique is also verified experimentally. [ABSTRACT FROM AUTHOR]

The control delay weakens the active damping (AD) performance of digitally controlled LCL/LLCL-type grid-connected inverters (GCIs). The equivalent virtual impedance paralleled with the filter branch explains the effect of the capacitor-current-feedback AD. However, the virtual impedance appears capacitive or even negative due to the delay, which significantly weakens the effectiveness of AD. This paper proposes a single-cycle-lag compensator (SCLC) to eliminate the adverse effects caused by the control delay. The method retains effectiveness in applications with high resonant frequency or large control delay. It keeps system a positive equivalent resistance with a high equivalent inductance. The positive equivalent resistance leads to positive damping effect, while the high equivalent inductance causing little resonant frequency deviation can be neglected. Moreover, the effect of the impedance variation that causes the resonant frequency deviation is analyzed and the restrictions of the proposed method are discussed. By optimizing the LCL/LLCL filter parameters, the adaptability of the SCLC to the grid impedance variation can be further improved. With the SCLC, the LCL/LLCL-type GCIs achieve better steady-state and dynamic performances. Finally, experimental results are presented to verify the proposed method. [ABSTRACT FROM AUTHOR]

The aim of this paper is to propose a novel switching control method to improve the efficiency of the basic half-bridge converter for the whole range of the load current. Using multimode control for this purpose, instead of modifying the structure of the converter, is proposed for the first time. Efficiency improvement is achieved by using a digital controller to select and change the control mode to the most efficient one, for each of the load sub-ranges. Control modes are prominent ones, including asymmetric, duty phase shift, pulsewidth modulation, and burst control, and are selected in turn, while the load current varies in its entire range from the full down to the no-load. The three transition points between control modes, being specific values of the load current, are analytically determined based on comparing the half-bridge converter power losses for different control modes. The digital controller compares the load current with the transition points and puts the converter in the control mode with the highest efficiency. The accuracy of the analytically determined transition points and the efficiency improvement of the proposed control method over the previous ones are investigated and approved by the experimental results. [ABSTRACT FROM AUTHOR]

In this paper, an LLC type converter with two interleaved pulsewidth modulation (PWM) rectifiers is proposed. Compared with the conventional LLC converter, it achieves a wide voltage regulation range independent of load. In the proposed structure, each secondary-side PWM rectifier can operate individually. With the interleaving technique and shared primary-side switching network, the circuit secondary-side current stress is halved and the primary-side current stress is largely reduced. Besides, the filter capacitor requirement is reduced. Therefore, the proposed structure is a good option for medium/high power wide output range applications. The symmetrical LLC resonant tanks always operate at the resonant frequency, which marks the optimal operation point of the LLC resonant tank. Therefore, the conduction loss is effectively mitigated. In the proposed converter, zero-voltage turning-on (ZVS) of the primary-side MOSFETs can be ensured and is independent of the load. Moreover, the turning-off currents of the primary-side MOSFETs are small and are also load independent. This brings the benefits of minimized circulating current and negligible turning-off loss and no MOSFET turning-off voltage spike. The secondary-side auxiliary MOSFETs turn-on with ZVS and rectifying diodes turn-off with limited di/dt. Topological analysis and experimental results of a 1.3 kW/100 kHz prototype generating 230–440 V output from 390-V input are presented. The prototype demonstrates 97.31% peak efficiency and good performance over a wide output range. [ABSTRACT FROM AUTHOR]

In this paper, a current-sharing method for an interleaved high-frequency LLC converter with partial energy processing is presented. A small transformer and an auxiliary low-power dc–dc converter are added in each phase, and the current sharing between phases is achieved by controlling the duty cycle of the auxiliary converter. Only partial energy is processed by the auxiliary converter; hence, the power losses of the added auxiliary converters are minimized, and the overall high efficiency is maintained. By transforming the current sharing of the resonant converter into pulsewidth modulation control of a dc–dc converter, the proposed method is simple to implement and easy to extend to multiple phases. The frequency of the auxiliary converter is independent of the main LLC, so the LLC can operate at a fixed switching frequency and duty cycle, and it is suitable for high-frequency applications. The operating principle, design considerations, and the control schemes are presented, and a 1-MHz two-phase interleaved LLC prototype was built to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

Wide bandgap semiconductors with fast switching speed capability are becoming an enabler to achieve the higher power density design. However, the further increase of switching frequency cannot continuously improve the power quality of ac-side waveforms in dc–ac/ac–dc application. The main reason is the distortion of pulsewidth modulation (PWM) voltage at switching point under high switching frequency. In general, there are two contributors causing PWM voltage distortions in bridge-based topologies. One is the deadtime, which occupies higher ratio in the small duty cycle case under high switching frequency and induces the voltage errors. The other one is the turn-off transient in the small load current or around the zero-crossing point of the ac-side current, because the relatively slow rising slope of the drain–source voltage will affect the right duty cycle. To solve this issue, this paper proposes a closed-loop modulation scheme to compensate the duty cycle distortion of PWM voltage based on one-cycle control or charge control. Compared to the traditional feedforward type of compensation, the proposed scheme does not need online calculation and instantaneous inductor current sampling, and it shows potential to be a general scheme for variety of topologies and modulations. Simulations and experiments are carried out on a 400-kHz single-phase full-bridge inverter with 400-Hz fundamental frequency to demonstrate the performance of the proposed approach. [ABSTRACT FROM AUTHOR]

To achieve high frequency and high efficiency over a wide load range, a monolithic voltage-mode dc–dc buck converter with advanced burst mode (ABM) and pulsewidth modulation (PWM) is presented in this paper. The load current is detected by estimating the currents flowing through the high-side and low-side switches, which maintains a near constant mode changing point. A counter-based scheme is used to achieve seamless and smooth transition between PWM and ABM. Both operating modes share the same control blocks, and no additional zero current detecting circuit is needed. In addition, the output stage switch size can be adjusted to reduce switching loss and improve efficiency under ultra-light load conditions. Experimental results show that the integrated 3 MHz converter achieves high efficiency from 80 to 91%, over a wide load range from 0.001 to 5 A. When the switch size is set to 1/3 of the maximum value, an additional 5% efficiency improvement at under 0.1 A load can be realized. The mode changing point is set at 0.4 A with less than 10% variation when the input voltage changes from 3 to 5 V. The load transient response is also improved significantly. [ABSTRACT FROM AUTHOR]

This paper presents an investigation on finite control set model predictive current control, validated experimentally with a rear axle electrical drive unit used in automotive applications. An improved problem formulation is suggested which lowers the computational turnaround time of the solver with approximately $\text{40}\%$ for an horizon length of $N=4$. Apart from the computational requirement aspects, the assessment focuses on inverter efficiency, phase current total demand distortion, and acoustic performance. The proposed solution is evaluated against a standard double proportional and integrator (PI) field-oriented current controller with pulsewidth modulation. It is shown that the proposed solution is feasible, the associated optimization problem at hand can be solved in real time, while exploiting the attractiveness of the proposed improvements. In summary, it is concluded that the inverter efficiency can be improved without deteriorating neither the phase current harmonics nor the acoustic performance. [ABSTRACT FROM AUTHOR]

This paper studies a multilevel multiphase dc–ac conversion system configured by a neutral-point-clamped converter fed by multiple battery packs connected in series. A virtual-vector modulation is selected and a state-of-charge (SoC) balancing control is designed to be able to employ the full battery bank capacity, even under different battery initial SoC values or different battery nominal capacities. The SoC balancing among battery packs is accomplished through the multilevel converter operation in a lossless manner, by simply distributing the dc-to-ac power flow among the batteries according to their SoC. A simple average system model is also presented, which allows performing very fast system simulations over long periods of time and serves as a convenient tool to tune the compensator parameters. The satisfactory performance of the proposed system configuration and control, which can be applied with any number of levels and phases, has been verified through simulations and experiments in a four-level three-phase dc–ac converter fed by three lithium-ion battery packs. The results prove the feasibility and advantages of the proposed system configuration, which can be used to implement conversion systems with different specifications combining several instances of a standard battery pack and a standard power semiconductor device. [ABSTRACT FROM AUTHOR]

Cascaded multicell converter (CMC) is one of the effective solutions for medium-voltage high-power drives. The inability to regenerate power back to the source is one of the limitations of this converter. The regeneration capability is obtained by using a pulsewidth-modulated active rectifier instead of a conventional three-phase passive rectifier in each cell. However, due to their two-level voltage operation at the input side, an inductor is required for each cell to filter out the switching frequency components from the input current. This paper proposes a new configuration of regenerative CMC based on coupled inductor to achieve multilevel voltage at the transformer secondary terminals. This allows us to operate the rectifier devices at reduced switching frequency. The coupled inductor reduces the total harmonic distortion (THD) of the transformer secondary current and thus the transformer size. The size of the filter inductor and the transformer ratings are compared. The operating principle and the detailed analysis are presented. A technique to bypass a faulty module is proposed. The working of the converter is verified through simulation and experimental studies. [ABSTRACT FROM AUTHOR]

In voltage-source converter (VSC) systems, utilization of filter inductors with deep saturation characteristics is often advantageous due to the improved size, cost, and efficiency. However, with the use of conventional current regulation (CCR) methods, the inductor saturation results in significant dynamic performance loss and poor steady-state current waveform quality. This paper proposes the inverse dynamic model (IDM)-based compensation method to overcome these performance issues. The method converts the nonlinear inductor of the plant to a fictitious linear inductor such that linear current regulators can perform satisfactorily. In conjunction, identification of L–R parameters is performed to obtain IDM of the system within an acceptable range of sensitivity yielding satisfactory performance. The performance issues of CCR methods with saturable inductor are demonstrated by simulations and experiments. Then, the proposed method is experimentally verified on a single-phase 1.5-kW grid-connected VSC. The performance improvement over the CCR methods is verified by a detailed comparison of experimental waveforms. [ABSTRACT FROM AUTHOR]

Power factor correction (PFC) converter suffers from serious double-line-frequency output voltage ripple due to the difference between instantaneous ac input power and dc output power. To suppress such double-line-frequency output voltage ripple, a ripple cancellation circuit (RCC) is utilized to generate the same magnitude but 180° phase shifted double-line- frequency voltage ripple. This paper provides an insight into the relationship between control scheme and double-line-frequency ripple suppression from the perspective of audio susceptibility model. For the purpose of reducing the double line frequency ripple, the closed-loop audio susceptibility of series RCC should be designed relatively low at double line frequency. According to such requirement, a ripple controller with improved voltage feed-forward (FF) scheme and quasi-proportional-resonant (QPR) compensator is designed. As QPR compensator can increase the denominator of the closed-loop audio susceptibility, while voltage FF scheme can reduce its numerator, its magnitude at double line frequency is thus greatly reduced and double-line-frequency ripple is also significantly suppressed. Moreover, due to the flexibility of QPR compensator, the proposed ripple controller presents good ripple suppression in a different line frequency application. Finally, experimental results of a flyback PFC with buck-type RCC quasi-single-stage ac–dc converter are provided to verify the validity of the proposed ripple controller. [ABSTRACT FROM AUTHOR]

A multilevel drive can be realized by using an open-ended machine, fed from dual two-level inverters. The topology supplied from isolated dc sources is suitable for transportation electrification. In vehicular systems, it is essential that the isolated dc sources, comprising of battery packs, should discharge uniformly and maintain balanced dc voltage at the dc-link terminal. A simple carrier-based pulsewidth modulation (PWM) technique is presented in this paper, which can effectively regulate the power drawn between the two two-level inverters while maintaining the multilevel operation of the drive. The modulation technique can balance the instantaneous state of charge of independent battery packs and dynamically equalize the power flow from the two inverters, based on drive requirement. This will enhance the reliability of the propulsion system in electric vehicles. The operation of the proposed PWM technique has been validated through detailed simulation and experimental tests. [ABSTRACT FROM AUTHOR]

This paper proposes an explicit predictive current control scheme implemented with a low carrier frequency pulsewidth modulation (PWM) on an induction machine fed by a three-level neutral point clamped inverter. The PWM carrier and the main current sampling frequency are both set to 1 kHz, resulting in a 500 Hz average switching frequency per device, which is very suitable for large drive applications. The explicit predictive control is introduced to optimize the available bandwidth provided by such a low sampling frequency, maximizing the dynamic performance. The strategy has been tested in a 2.2-kW induction motor experimental prototype. [ABSTRACT FROM AUTHOR]

Three-phase pulsewidth modulation inverter fed induction motor drive system is widely applied in high power drive applications. Sensor faults are very common in the drive system, which, once occur, might result in degraded system performance or even system shutdown. In order to rapidly and accurately diagnose the sensor faults, this paper proposes an intelligent time-adaptive data-driven method to identify the fault location and fault type of sensors in the drive system. An emerging machine learning technology named extreme learning machine (ELM) is applied to learn the sensor fault dataset; an ensemble ELM classifier is then designed to improve diagnostic accuracy, based on which a time-adaptive fault diagnosis process is proposed to achieve a high and balanced diagnostic accuracy and speed. As a data-driven method, the proposed method only employs the phase current, dc-link voltage, and speed signals as the inputs to the ensemble ELM classifiers and requires no additional sensors and other hardware. Simulated and experimental tests show that the proposed method can rapidly and accurately detect the fault sensor location and identify offset fault, stuck fault, and noise faults with an average diagnostic accuracy of 98% and the average decision time of 10 ms after the fault occurs. Moreover, such diagnosis method is robust to the fluctuation of catenary voltage and dc-link voltage, fault severity, and variation of model parameters, speed, and load. [ABSTRACT FROM AUTHOR]

This paper deals with the analysis of the input dc-link voltage ripple in multilevel inverter based on H-bridge and level doubling network (LDN). The LDN is basically a half-bridge fed by a floating capacitor, with voltage self-balancing capability, recalling the concept of a flying capacitor configuration. The amplitude of the LDN voltage ripple is analytically determined considering both the low-order and the switching harmonic components. In particular, peak-to-peak distributions of voltage ripples over the fundamental period are analytically determined, making possible the design of dc-link capacitor relying only on the dc-voltage ripple requirements. The case study makes reference to negligible switching ripple in the output current. It well represents either grid connection or passive load having almost sinusoidal currents. Numerical simulations carried out by MATLAB/Simulink and a complete set of experimental verifications are given to confirm the theoretical developments. [ABSTRACT FROM AUTHOR]

Droop control is broadly used in dc power distribution systems, e.g., dc microgrids. Implementing droop control for switch mode power supplies requires the measurement of average current. Synchronous sampling is used in digital control systems to obtain the average of a triangular inductor waveform. However, the dead time, semiconductor turn-on and turn-off delays, and signal conditioning delays shift the sensed waveform and change the effective duty cycle, resulting in a misalignment and measurement error from the average value. This paper proposes a duty cycle weighted averaging method based on double sampling. By sampling twice per switching period and averaging the results using duty cycle as the weighting factor, the error due to waveform misalignment is theoretically eliminated. The result always equals the average value of the triangle. This method does not rely on the knowledge of circuit delays, making it easy to implement and robust to parameter variations. Simulations and experimental measurements validate the superior performance compared with conventional single and double sampling methods. The experiment on a droop-controlled dc–dc converter demonstrates a more accurate droop characteristic. [ABSTRACT FROM AUTHOR]

Passivity-based analysis and controller design offer a promising approach to guarantee the stability of power systems. If all grid-connected components act strictly passive, critical oscillations cannot arise. Recent research establishes design guidelines for current-controlled voltage-source converters that allow obtaining a nonnegative real part of the converter input admittance for a wide frequency range. In this paper, the findings are extended and generalized from a control engineering point of view. Utilizing passivity indices to quantify the degree of the input admittance's passivity, the current controller design is reviewed and assessed. Further, generic and necessary passivation design criteria are proposed and carried out exemplarily for passive as well as for active damping using voltage feed-forward filters. Finally, the theoretical findings are validated by experiments. [ABSTRACT FROM AUTHOR]