14 results
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2. Predictive Control of a Series-Interleaved Multicell Three-Level Boost Power-Factor-Correction Converter.
- Author
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Liang, Xinyu, Zhang, Chi, Srdic, Srdjan, and Lukic, Srdjan M.
- Subjects
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ELECTRIC potential , *PREDICTIVE control systems , *CONVERTERS (Electronics) , *ELECTRIC power conversion , *SIMULATION methods & models - Abstract
This paper presents a new predictive power-factor-correction (PFC) controller for series-interleaved three-level boost (TLB) converters. Compared to the state-of-the-art TLB PFC controllers, where a two-cycle prediction and a detection of an operating region are necessary, the proposed controller achieves a low total harmonic distortion of the input current by using a single equation to predict the input current in all operating regions of the converter, in just one operating cycle. The average current control is achieved by sampling at the peak of the triangular carrier. The proposed PFC controller significantly reduces the distortion of the input ac current near the zero-crossing points, resulting in a low total harmonic distortion of the input current. The operation of the proposed controller was evaluated, and its stability and robustness to parameter changes was confirmed analytically. The controller operating principles were verified in simulations and validated by experiments on a medium-voltage 50-kW converter prototype. [ABSTRACT FROM AUTHOR]
- Published
- 2018
- Full Text
- View/download PDF
3. Analysis, Design, and Implementation of the Class-E ZVS Power Amplifier With MOSFET Nonlinear Drain-to-Source Parasitic Capacitance at any Grading Coefficient.
- Author
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Hayati, Mohsen, Lotfi, Ali, Kazimierczuk, Marian K., and Sekiya, Hiroo
- Subjects
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ELECTRONIC amplifiers , *ELECTRIC switchgear , *FIELD effect transistor switches , *SIMULATION methods & models , *ELECTRIC potential - Abstract
In this paper, analytical expressions for waveforms and design relationships are derived for the class-E power amplifier with the MOSFET nonlinear drain-to-source parasitic capacitance under the subnominal operation, i.e., only zero-voltage switching (ZVS) condition, for any grading coefficient m of the MOSFET body junction diode and 50% duty ratio. Only the MOSFET nonlinear drain-to-source parasitic capacitance is used for the analysis of the class-E ZVS power amplifier, and its nonlinearity is determined by the grading coefficient m. The switch voltage waveform does not satisfy the class-E ZVS switching condition when only the linear shunt capacitance is considered. The grading coefficient m is used as an adjustment parameter that provides accurate design to satisfy the given output power and peak switch voltage simultaneously. Therefore, the grading coefficient m is the important parameter to satisfy the class-E ZVS condition and given design specifications, which is the most important result in this paper. Additionally, the output power capability and maximum operating frequency are affected by the grading coefficient m. The analytical expressions are obtained by considering the grading coefficient m as an adjustment parameter, which is validated by PSpice simulations and laboratory experiments. The measurement and PSpice simulation results agreed with the analytical expressions quantitatively, which denotes the usefulness and effectiveness of our obtained analytical expressions. [ABSTRACT FROM AUTHOR]
- Published
- 2014
- Full Text
- View/download PDF
4. Bi-switching Status Modeling Method for DC–DC Converters in CCM and DCM Operations.
- Author
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Han, Junfeng, Zhang, Bo, and Qiu, Dongyuan
- Subjects
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CONVERTERS (Electronics) , *INTEGRATED circuits , *SWITCHING circuits , *DIRECT currents , *SIMULATION methods & models - Abstract
By the logical statements and linear inequalities, a new modeling method named bi-switching status modeling (BSM) method is presented to model the dc–dc converters in this paper. Compared with other modeling methods, such as the state-space averaging method and the mixed logical dynamical (MLD) method, first, the BSM method can describe continuous conduction mode and discontinuous conduction mode operations of the dc–dc converters as a unified bi-switching status model. Second, the BSM method is more precise than the state-space averaging method because there is no approximate assumption. Third, the constrains of the operating modes in the BSM method can be simplified as a consolidated inequality, which means that the model obtained by the BSM method is more concise than that obtained by the MLD method. Simulation and available experiments of a buck converter verify the effectiveness of the proposed BSM method. [ABSTRACT FROM PUBLISHER]
- Published
- 2017
- Full Text
- View/download PDF
5. Average Modeling and Performance Analysis of Voltage Sensorless Active Supercapacitor Balancer With Peak Current Protection.
- Author
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Yuhimenko, V., Geula, G., Agranovich, G., Averbukh, M., and Kuperman, A.
- Subjects
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ELECTRIC potential , *NONLINEAR systems , *SUPERCAPACITORS , *ELECTRIC currents , *SIMULATION methods & models - Abstract
In this paper, average modeling and analysis of a dual-supercapacitor bank, actively balanced by a bidirectional buck–boost converter, is presented. In such a system, natural balancing is achieved when the converter is operated in open loop with 50% duty cycle, eliminating the need for measuring the voltage of each storage device. Nevertheless, excessive currents arise even for slight voltage misbalance because of the highly underdamped nature of the system. In order to remedy this drawback, bidirectional pulse-by-pulse inductor current limitation is introduced, which is equivalent to adding a peak-current-mode-like control loop to the system. Since the duty cycle never exceeds 50%, compensation ramp is not required to maintain stability. On the other hand, while the uncontrolled system dynamics is linear, introducing the current limit mechanism turns the closed-loop dynamics into a nonlinear one, burdening the analysis task and thus calling for suitable average model to perform fast simulations for system analysis. Therefore, dynamical equations of the system are developed in order to derive the switching-cycle-averaged model and reveal the tradeoff between current limit level, balancing time and efficiency for the worst case of imbalance. Simulations and experiments support the presented findings. [ABSTRACT FROM PUBLISHER]
- Published
- 2017
- Full Text
- View/download PDF
6. Comparative Analysis of Steady-State Models for a Switched Capacitor Converter.
- Author
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Wu, Bin, Wang, Laili, Yang, Lei, Smedley, Keyue Ma, and Singer, Sigmond
- Subjects
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STEADY state conduction , *SWITCHING circuits , *CASCADE converters , *SIMULATION methods & models , *ELECTRIC charge - Abstract
A recently reported modeling methods for a switched capacitor converter either assume output as “firm” voltage or a resistor to facilitate calculation. When the size of output filter capacitor is moderate, accompanied by noticeable output ripple, previous modeling results may not provide accurate prediction and design guidelines. In this paper, a new modeling technique taking into account the output capacitor effect is proposed for simple dual-phase switched capacitor converters without complex coupling loops. The proposed model employs transient calculation, takes charge redistribution phase into account, and includes the duty cycle, switching frequency as well as output capacitor simultaneously in the final output impedance formula, which enhances accuracy of the model. It is suitable for interleaved and noninterleaved switched capacitor converters. The simulation and experimental results for the unity gain SC converter are provided to verify the proposed theory. [ABSTRACT FROM PUBLISHER]
- Published
- 2017
- Full Text
- View/download PDF
7. Power-Loss Prediction of High-Voltage SiC-<sc>mosfet</sc> Circuits With Compact Model Including Carrier-Trap Influences.
- Author
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Tanimoto, Yuta, Saito, Atsushi, Matsuura, Kai, Kikuchihara, Hideyuki, Jurgen Mattausch, Hans, Miura-Mattausch, Mitiko, and Kawamoto, Noriaki
- Subjects
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SIMULATION methods & models , *SWITCHING power supplies , *SURFACE potential , *TRANSIENT analysis , *ELECTRON traps - Abstract
The paper aims at clarifying the carrier-trapping influence on the electrical characteristics of silicon carbide (SiC) power MOSFETs and its inclusion in the simulation of SiC power
mosfet -based circuits. Special focus is given on the degradation of the switching characteristics due to carrier trapping at SiC/SiO2 interface defects. A compact SiC powermosfet model, considering the trap density in the framework of a complete surface-potential description, has been developed by for accurate circuit simulation including power-loss prediction. The carrier trapping is verified to cause a switching delay, which results in switching loss increase. To achieve low power loss, trap-density reduction is shown to be vital. The maximum allowable trap density, which does not affect switching power loss, is discussed. [ABSTRACT FROM AUTHOR]- Published
- 2016
- Full Text
- View/download PDF
8. A Simplified PWM Strategy for a Neutral-Point-Clamped (NPC) Three-Level Converter With Unbalanced DC Links.
- Author
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Ye, Zongbin, Xu, Yiming, Wu, Xiang, Tan, Guojun, Deng, Xianming, and Wang, Zhichuan
- Subjects
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PULSE width modulation transformers , *ELECTRIC power conversion , *DIRECT currents , *SIMULATION methods & models , *MATHEMATICAL models - Abstract
A simplified pulse width modulation (PWM) strategy for a neutral-point-clamped three-level converter with unbalanced dc links is proposed in this paper to achieve high-quality line-to-line output voltages and to maximize the linear modulation range. The simplified strategy takes the direct output voltage modulation by calculating the special solutions of the voltage–second balance equations without detecting the position of the reference vector in the asymmetrical and complicated space voltage vector diagrams to reduce the calculation time. A novel solution based on the state transition is proposed to extend the maximum linear modulation index to 1.15. Furthermore, the asymmetric control of the split dc link by the proposed PWM is implemented by adjusting the special solutions. The difference between the conventional space vector PWM and the proposed strategy is conducted to illustrate the advantages of the simplified strategy. The effectiveness of the proposed modulation strategy is verified by simulation and experiment results. [ABSTRACT FROM PUBLISHER]
- Published
- 2016
- Full Text
- View/download PDF
9. Proposed Switching Losses Model for Integrated Point-of-Load Synchronous Buck Converters.
- Author
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Orabi, Mohamed and Shawky, Ahmed
- Subjects
- *
SYNCHRONOUS electric motors , *CONVERTERS (Electronics) , *MATHEMATICAL models , *METAL oxide semiconductor field-effect transistors , *SIMULATION methods & models , *NANOFABRICATION - Abstract
Nowadays, point-of-load (POL) converters’ investments are counted as a main part in power management markets; especially the synchronous buck converters. Today's products forces designers to highly integrate POL converters by increasing the switching frequency; so the latest technology has used megahertz range to obtain this target. On the other hand, increasing switching frequency means increasing the switching losses. Therefore, it is very important to optimize the operating switching frequency tradeoff, which requires an accurate model taking in consideration the converter operating conditions. This paper presents an accurate mathematical loss model taking in consideration the physical behavior of the MOSFET switch in addition to the converter operating conditions. This model introduces accurate equations for every switching intervals and so accurate loss calculations. An integrated POL synchronous buck converter of 5 MHz, 5–1.8 V/3 A prototype is fabricated. The results of the proposed model are compared with simulation and experimental results under variable operating conditions. Good matching between the mathematical, experimental, and simulation results are obtained. [ABSTRACT FROM AUTHOR]
- Published
- 2015
- Full Text
- View/download PDF
10. Energy-balancing Control Strategy for Modular Multilevel Converters Under Submodule Fault Conditions.
- Author
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Pengfei Hu, Daozhuo Jiang, Yuebin Zhou, Yiqiao Liang, Jie Guo, and Zhiyong Lin
- Subjects
- *
ELECTRIC fault location , *CASCADE converters , *ELECTRIC potential , *SIMULATION methods & models , *ELECTRICAL engineering - Abstract
The modular multilevel converter (MMC) is a newly introduced switch-mode converter topology with the potential for high-voltage and high-power applications. This paper focuses on the design and control methods for fault-tolerant operation using redundant submodules (SMs), which is one of the most important features in the MMC topology. By comparing three design schemes of redundant SMs, the most economic and reliable scheme is identified. In addition, a mathematical model of the MMC with arms containing different numbers of SMs is developed. Based on the identified scheme and mathematical model, an energy-balancing control strategy is proposed to keep the MMC operating normally under SM fault conditions. Finally, time-domain simulations of a 61-level MMC system are performed, using the PSCAD/EMTDC software, while experiments are carried out on a 41-level MMC prototype. The simulation and experimental results validate the design scheme, mathematical model, and proposed energy-balancing control strategy. [ABSTRACT FROM AUTHOR]
- Published
- 2014
- Full Text
- View/download PDF
11. A Unified Analytical Modeling of the Interleaved Pulse Width Modulation (PWM) DC–DC Converter and Its Applications.
- Author
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Zhang, Saijun and Yu, Xiaoyan
- Subjects
- *
DC-to-DC converters , *PULSE width modulation , *SYSTEMS design , *SIMULATION methods & models , *PREDICTION models , *TOPOLOGY - Abstract
This paper proposes a general methodology to analyze the interleaved pulse width modulation (PWM) dc–dc converter. A unified and simple model is constructed and the complete electrical behaviors of the interleaved PWM dc–dc converter could be predicted. Features of the interleaved PWM dc–dc converter are investigated based on this model. Insightful conclusions are derived and can be used to guide designs. This model could serve as a solid foundation for further research, and it is valid to all the common interleaved PWM dc–dc topologies. As an example of its applications, the input current of the interleaved boost converter is investigated in detail. Simulation and experimental results have successfully validated against theoretical analysis. [ABSTRACT FROM AUTHOR]
- Published
- 2013
- Full Text
- View/download PDF
12. Modeling and Simulation of All-Electric Ships With Low-Voltage DC Hybrid Power Systems.
- Author
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Zahedi, Bijan and Norum, Lars E.
- Subjects
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SIMULATION methods & models , *DIRECT currents , *HYBRID power systems , *ENERGY consumption , *SHIP fuel , *SYSTEMS design - Abstract
DC hybrid power systems are of interest for future low emission, fuel-efficient vessels. In spite of the advantages they offer onboard a ship, they result in a complex, interconnected system, which requires effective analysis tools to enable a full realization of the advantages. Modeling and simulation are essential tools to facilitate design, analysis, and optimization of the system. This paper reviews modeling of hybrid electric ship components including mechanical and electrical elements. Power electronic converters are modeled by nonlinear averaging methods to suit system-level studies. A unified model for bidirectional converters is proposed to avoid transitions between two separate models. A simulation platform using the derived models is developed for the system-level analysis of hybrid electric ships. Simulation results of power sharing among two diesel generators, a fuel cell module, and an energy storage system are presented for three modes of operation. [ABSTRACT FROM AUTHOR]
- Published
- 2013
- Full Text
- View/download PDF
13. A Steady-State Analysis Method for a Modular Multilevel Converter.
- Author
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Song, Qiang, Liu, Wenhua, Li, Xiaoqian, Rao, Hong, Xu, Shukai, and Li, Licheng
- Subjects
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CASCADE converters , *STEADY-state flow , *ELECTRIC potential , *ELECTRIC circuit design & construction , *HIGH voltages , *MATHEMATICAL models , *SIMULATION methods & models - Abstract
Modular multilevel converters (MMC) are considered a top converter alternative for voltage-source converter (VSC) high-voltage, direct current (HVDC) applications. Main circuit design and converter performance evaluation are always important issues to consider before installing a VSC-HVDC system. Investigation into a steady-state analysis method for an MMC-based VSC-HVDC system is necessary. This paper finds a circular interaction among the electrical quantities in an MMC. Through this circular interaction, a key equation can be established to solve the unknown circulating current. A new steady-state model is developed to simply and accurately describe the explicit analytical expressions for various voltage and current quantities in an MMC. The accuracy of the expressions is improved by the consideration of the circulating current when deriving all the analytical expressions. The model's simplicity is demonstrated by having only one key equation to solve. Based on the analytical expressions for the arm voltages, the equivalent circuits for MMC are proposed to improve the current understanding of the operation of MMC. The feasibility and accuracy of the proposed method are verified by comparing its results with the simulation and experimental results. [ABSTRACT FROM AUTHOR]
- Published
- 2013
- Full Text
- View/download PDF
14. Analysis and Comparison of Three Topologies of the Ladder Multilevel DC/DC Converter.
- Author
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Lopez, A., Diez, R., Perilla, G., and Patino, D.
- Subjects
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LADDER networks , *DIRECT currents , *CASCADE converters , *COMPARATIVE studies , *MATHEMATICAL analysis , *SIMULATION methods & models - Abstract
In this paper, three dc/dc ladder multilevel converters are compared. The first one is the classical ladder topology and the two other topologies presented are based on the classical one. A mathematical calculation of the output resistance and the gain of the converter as a function of the number of levels is carried out for the three topologies in order to estimate the voltage drop due to the output current. These calculations are validated with simulations and experimental results. Finally, the behavior of the three topologies is compared through experimental tests. Results show higher performance for the presented converters compared to the classical ladder. [ABSTRACT FROM AUTHOR]
- Published
- 2012
- Full Text
- View/download PDF
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