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This paper presents a practical strategy for utilizing the submodule (SM) redundancy of a modular multilevel converter (MMC) for its fault tolerance. This strategy provides a systematic framework for balancing the tradeoff between two conventional methods for using the active redundancy and, thus, achieves operational flexibility. One of the existing methods improves SM reliability owing to less voltage stress on the SM components by employing all of the SMs to form the ac or dc voltages (voltage-sharing mode). The other avoids transients by keeping the average SM voltage constant at the cost of slightly increased stress on the SM components (fixed-level mode), which, however, can be controlled to provide the grid-adaptive operation by reserving the energy of the SMs not in service. We, thus, develop a new redundancy management scheme by integrating these two methods and exploiting their technical benefits to meet the PQ requirements and MMC control performance. This research provides a theoretical basis and a technical guide to determining the number of SMs, which can further increase the voltage steps as per the MMC and grid conditions. This paper also connects the remaining PQ capability of the MMC at a particular operating point with the SM redundancy concept by defining a potential redundancy, especially useful when the physical redundancy is exhausted. The theoretical findings and efficacy of the proposed strategy are validated through PSCAD/EMTDC time-domain simulations followed by experiments using a nine-level single-phase MMC system. [ABSTRACT FROM AUTHOR]

Magnetically coupled resonant (MCR) wireless power transfer (WPT) is one of the most promising WPT technologies for its remarkable capability of simultaneous noncontact power transfer for multiple independent loads. Nevertheless, diverse energy requirements of different loads and efficiency quota make it difficult to design and optimize the multiload system. In this paper, a novel driver configuration for the MCR WPT system with multiple loads is proposed, in which the transmitting resonant tank is driven synchronously by multiple inverters operating at multiple switching frequency and sharing a common dc voltage source, then a multifrequency superposition methodology is presented to achieve high efficiency and targeted power distribution. The dominant features of the methodology are listed as follows: 1) the multifrequency power components from multiple inverters can be simultaneously delivered to multiple loads through a single transmitter; 2) the receiving coils are elaborately designed at different resonant frequencies that correspond to the operating frequencies of multiple inverters to achieve targeted power transfer and high efficiency; 3) the resonant frequency of the transmitter can be modulated within the adjacent area of multiple operating frequencies, and the power distribution to meet the requirements of selective loads will be realized; and 4) the resonant frequencies of receivers can also be adjusted to effectively realize the power distribution. In this paper, a double-frequency MCR WPT system with two loads is comprehensively investigated as a representative example, and the studied methodology has been experimentally verified by two prototypes of the proposed circuit configurations. [ABSTRACT FROM AUTHOR]

In contactless energy transfer and vibration system (CETVS) for rotary ultrasonic machining, the energy is delivered to an ultrasonic transducer equipped with a rotary spindle shank through a loosely coupled transformer (LCT). The purpose of this paper is to present a simplified construct, referred to as self-compensation system, to overcome the drawbacks of external compensation elements occupying the limited shank space during the LCT's leakage inductance compensating and the transducer's capacitance compensating. The advantage of this approach is that the secondary leakage inductive reactance of the LCT and the capacitive reactance of the transducer are mutually compensated without an intermediate element, which conserves the spindle shank space and reduces the operating load of an LCT. In this paper, we first derive the mutual compensation equation between a transducer and an LCT. Then, for a given transducer, the structural parameters of an LCT are designed with theoretical calculations and simulation analysis. Experiments are conducted with the self-compensation system excited by a 50 V ultrasonic signal. The results show that the energy transfer efficiency of LCT reached 92.0%, the amplitude of the transducer reached $10.7\,\mu {\rm{m}}$ , when the CETVS is self-compensated. These results indicate that this self-compensation theory and design are feasible. [ABSTRACT FROM AUTHOR]

Superjunction MOSFETs in cascode configuration with low-voltage silicon MOSFETs are evaluated in this paper. The proposed structure combines the good switching performance provided by the cascode configuration with the benefits of the silicon technology such as its robustness, maturity, and low cost. This paper aims to explain and to demonstrate the reduction of switching losses of superjunction MOSFETs in cascode configuration with respect to their standalone counterparts (directly driven). A detailed simulation analysis of power loss contributions is carried out under hard-switching operation. Moreover, experimental evidence is provided using a boost converter (100–400 V) operating in continuous conduction mode for different switching frequencies (100–400 kHz) and output power levels (180–500 W). [ABSTRACT FROM AUTHOR]

In this paper, we demonstrate how latency insertion method (LIM) can be used for real-time simulation of high switching frequency power electronics systems and how this approach can be implemented for scalable Field Programmable Gate Array (FPGA) execution. We first present a summary of the LIM and how this method can be developed into a solver for high-performance FPGA execution. We then present how common power electronics topologies—buck and boost—can be modeled using the LIM approach, followed by how the LIM model of a three-phase dc/ac converter is created. Afterward, we demonstrate the accuracy of the developed FPGA solver through a set of power electronic system examples, with each example compared with near ideal results of same example provided by a traditional electromagnetic transient type solver. We complete the paper analyzing the scalability of the proposed approach on FPGA devices, both in terms of achievable time step as well as of resource usage. [ABSTRACT FROM AUTHOR]

Conventional finite control set-model predictive control (FCS-MPC) applies single voltage vector within each control period. This leads to relatively high steady-state ripples and requires fast sampling rate. Additionally, enumeration-based optimal vector selection is computationally intensive. Recently, double-vector-based schemes have been proposed to improve the steady-state performance of FCS-MPC. However, they are usually complicated in vector selection and duty ratio calculation. In this paper, a universal multiple-vector-based MPC (UMV-MPC) is proposed, which achieves the same performance as the state-of-the-art double-vector-based MPC, but executes in a much more efficient and universal way. Unlike conventional FCS-MPC, enumerating process and state predictions for candidate voltage vectors are not required in the proposed UMV-MPC to select the best voltage vectors. In UMV-MPC, the optimal vectors and duty ratios are directly constructed from deadbeat control (DBC) based on space vector modulation (SVM), which is easy to follow and quick to use. The proposed UMV-MPC is not only more efficient than prior methods, but also reveals the inherent relationship between double-vector-based MPC and DBC with SVM. A comparative study of UMV-MPC and prior double-vector-based MPC is carried out in this paper. The theoretical analysis as well as simulation and experimental tests on a 2.2-kW induction motor drive are demonstrated to validate the effectiveness of the proposed UMV-MPC. [ABSTRACT FROM AUTHOR]

This paper presents a novel control method for multimodule photovoltaic microinverter (MI). The proposed MI employs a two-stage topology with active-clamped current-fed push–pull converter cascaded with a full-bridge inverter. This system can operate in grid-connected mode to feed power to the grid with a programmable power factor. This system can also operate in line-interactive mode, i.e., share load power without feeding power to the grid. In the event of grid power failure, the MI can operate in a standalone mode to supply uninterruptible power to the load. This paper presents a multiloop control scheme with power programmable capability for achieving the above multiple functions. In addition, the proposed control scheme embedded a multimodule parallel capability that multiple MI modules can be paralleled to enlarge the capacity with autonomous control in all operation modes. Finally, three 250-W MI modules are adopted to demonstrate the effectiveness of the proposed control method in simulations as well as experiments. [ABSTRACT FROM PUBLISHER]

In voltage-source converter systems, utilization of filter inductors with deep saturation characteristics is often advantageous because of the improved size, cost, and efficiency. However, with the use of conventional current regulation methods, the inductor saturation results in significant dynamic performance loss and poor steady-state current waveform quality. This paper proposes the saturation compensation with resistive decoupling (SCRD) method to overcome these performance issues. The method converts the nonlinear inductor of the plant to a fictitious linear inductor such that linear current regulators can perform satisfactorily. The steady-state and dynamic performances of SCRD are investigated in detail in comparison with other methods and advantageous performance attributes of SCRD are demonstrated on a 1.5-kW grid-connected system via simulations and laboratory experiments. In addition, identification of L–R parameters is performed, parameter sensitivity issues are addressed, and satisfactory performance is demonstrated. [ABSTRACT FROM AUTHOR]

The reliability analysis and lifetime prediction for SiC-based power modules is crucial in order to fulfill the design specifications for next-generation power converters. This paper presents a fast mission-profile-based simulation strategy for a commercial 1.2-kV all-SiC power module used in a photovoltaic inverter topology. The approach relies on a fast condition-mapping simulation structure and the detailed electro-thermal modeling of the module topology and devices. Both parasitic electrical elements and thermal impedance network are extracted from the finite-element analysis of the module geometry. The use of operating conditions mapping and look-up tables enables the simulation of very long timescales in only a few minutes, preserving at the same time the accuracy of circuit-based simulations. The accumulated damage related to thermo-mechanical stress on the module is determined analytically, and a simple consumed lifetime calculation is performed for two different mission profiles and compared in different operating conditions. [ABSTRACT FROM AUTHOR]

Nowadays, active-front-end rectifiers are increasingly used as grid connected devices. Their efficiency and performances have become relevant for reducing the overall grid losses. This paper thus introduces a predictive hybrid pulse-width-modulation (PH-PWM) technique, adaptable to any space-vector PWM (SVPWM) controller. As opposed to hybrid PWM techniques based on sector partitioning, the PH-PWM technique selects the appropriate PWM sequence online with the help of a predictive algorithm. This selection is based on a cost-function where users can define a tradeoff between various criteria, such as the reduction of current distortion and switching losses, as presented in this paper. The use of the PH-PWM technique increases performances in comparison with the conventional PWM techniques. The simulation and experimental results are presented to confirm the effectiveness of the proposed PH-PWM technique. Aside from the tradeoff capacity of the proposed PH-PWM technique, the simulation results validate a reduction of the switching losses for the converter up to 23$\%$ as compared with the conventional SVPWM technique. [ABSTRACT FROM AUTHOR]

This paper proposes a novel balancing approach for an electric vehicle bipolar dc charging station at the megawatt level, enabled by a grid-tied neutral-point-clamped converter. The study uses the presence of an energy storage stage with access to both of the dc buses to perform the complementary balance. It proposes a generic balancing structure that can achieve balance regardless the kind of energy storage system (ESS) employed. This is aiming to reduce the hardware requirements of the system and maximize the usage of the ESS, whose main function is to perform the energy management related tasks. To meet this purpose, a three-level dc–dc interface is employed, allowing to compensate the dc currents with a single ESS. Furthermore, in order to prevent the appearance of even-order harmonics in the input current during asymmetrical operation, an alternative switching sequence for the central converter is proposed. Results indicate that, without altering dramatically the charging process of the ESS, it is possible to cover the whole load scenario without the need of a balancing circuit. This allows the use of off-the-shelf products both for the rectifier and the fast chargers. In this paper, simulation and experimental results are presented to validate the proposed balancing strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a transformerless bipolar multistring dc–dc converter based on series-connected submodules. It is intended for converting dc voltage and managing power flow for medium-voltage high-power dc networks. This new converter has a flexible structure of multistrings and each string consists of four valves with their middle points crossly connected through two cost-effect dc capacitors to form power balancing channels between valves. Its transformerless solution and single-stage configuration greatly reduce the converter volume, weight, cost, and power loss. In this paper, voltage ratio range and its influence on submodule design are analyzed. Moreover, a control strategy with focus on current sharing control and submodule capacitor voltage control is proposed. A simulation model rated at ±10 kV 2 MW verifies the feasibility of the proposed dc–dc converter. Experimental results obtained from a 100-V 1.5-kW laboratory setup also confirm the validation of the proposal. [ABSTRACT FROM PUBLISHER]

This paper presents a pulse width modulation (PWM) technique for the minimization of the leakage current in the grid-connected/stand-alone transformerless photovoltaic (PV)-cascaded multilevel inverter (CMLI). The proposed PWM technique is integrated with the MPPT algorithm and is applied to the five-level CMLI. Furthermore, using the proposed PWM technique the high-frequency voltage transitions in the terminal and common mode voltages are minimized. Thus, the proposed PWM technique minimizes the leakage current of the PV array and electromagnetic interference filter requirement in the system without addition of any extra switches. Furthermore, this paper also presents the analysis for the terminal voltage across the PV array and the common mode voltage of the inverter based on the switching function. Using the given analysis, the effect of the PWM technique can be analyzed, as it directly links the switching function with the common mode voltage and leakage current. Also, the proposed PWM technique requires reduced number of carrier waves compared to the conventional sinusoidal pulse width modulation technique for the given CMLI. Complete details of the working principle and analysis with the support of simulation and experimental results of the proposed PWM technique are presented in this paper. [ABSTRACT FROM PUBLISHER]

To achieve the highest possible grade for server or computer power supplies in terms of efficiency, various solutions for high line input already exist on the market. In this paper, a new topology is investigated closely, showing that the titanium grade may be achievable at low line input with traditional silicon devices by the utilization of low voltage mosfets, which have an excellent figure of merits, by connecting two converter stages in parallel for low line input or in series for high line input. This paper presents simulation results which are verified with measurements from a developed prototype for 1 kW of power and 12 V output consisting of a triangular current mode power factor correction followed by a well-known phase shifted zero voltage switched bridge. Furthermore, a detailed description of the loss estimation by simulation, enhanced with additional calculations, is presented. [ABSTRACT FROM AUTHOR]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

Power converters in the system-level real-time simulation are usually emulated by L/C-based associated discrete circuit (L/C-ADC). However, the L/C-ADC approaches may suffer from two issues: How to mitigate the unacceptable virtual power loss especially in high-frequency applications, and how to tune LC parameters setting which is affected by the external circuit. This paper proposes a novel generalized associated discrete circuit (G-ADC) model with parameterized history current sources. By utilizing the stability region of the feasible parameter space, the optimized G-ADC models with the best damping characteristic are developed for both two-level and three-level converters. The analytical results also guarantee that the parameters of the optimized G-ADC model are independent of the external circuit for most power grid applications. Furthermore, an field programmable gate array (FPGA)-based real-time simulation platform is built to verify the feasibility of the proposed scheme. Extensive simulation and hardware-in-loop experiment results demonstrate the effectiveness and superiority of best-damped models as well as the modeling flexibility corresponding to insensitivity to operating conditions and external system parameters. [ABSTRACT FROM AUTHOR]

With the rapid development of multiterminal direct current (MTDC) grids, high-voltage direct current circuit breakers (HV-DCCB) capable of interrupting currents within 5 ms are in urgent demand. The mechanical DCCB has always been one of the main proposals for HV-DCCBs. The current commutation is the prerequisite for mechanical DCCBs to interrupt currents successfully. Focused on the current commutation difficulty, a novel mechanical DCCB has been investigated in this paper. A simulation model of the novel mechanical DCCB in MTDC system for fault current interruption was established in PSCAD. By analyzing the simulation results, the detailed transient varying patterns of current, voltage, and energy in the novel mechanical DCCB during its interruption process are revealed. To verify the feasibility of the novel mechanical DCCB, a prototype was developed in the lab, and current interruption tests were carried out on the prototype. Experimental results have shown that a current of 5.3 kA can be interrupted by the prototype within 3 ms. In the end, failures that occurred in initial experiments are discussed and relative protection measures have been proposed. By adopting these measures, failures are successfully avoided and the normal operation of the novel mechanical DCCB are ensured. [ABSTRACT FROM AUTHOR]

The implementation of multistep direct model predictive control (MPC) for dc–dc boost converters overcomes the well-known issue of nonminimum phase behavior. However, it can lead to a high computational burden depending on the prediction horizon length. In this paper, a simple and computationally efficient MPC method for dc–dc boost converters is proposed. The key novelty of the presented control strategy lies in the way dynamic references are handled. The control strategy is capable of providing suitable references for the inductor current and the output voltage, without requiring additional control loops. Moreover, this reference design allows the predictive controller to be implemented with a single-step prediction horizon. Thus, a significant reduction in the required real-time calculations executed in the control hardware is achieved. To obtain constant switching frequency, the power switch commutation instants within a sampling period are considered as control inputs. Therefore, the predictive controller is formulated as a continuous control set MPC. Additionally, the proposed formulation is able to deal with different operation modes of the converter without changing the controller structure. Finally, an observer is used to dynamically modify the reference to provide robustness to system parameter uncertainties. Simulation and experimental results show an accurate tracking of dynamic inductor current and output voltage references, while respecting the restrictions on maximum inductor current levels of the converter. [ABSTRACT FROM AUTHOR]

After a technical review on the stator resistance and rotor resistance identification methods for speed sensorless induction motor drives, this paper presents a different solution with a new representation of induction motor dynamics. By virtue of this representation, an adaptive observer is designed. The key step is to introduce the corrective terms and the filtered regressors, which forces the error dynamics of the observer to approach the ones in a form to which the Kalman–Yakubovich lemma can be applied. Only stator currents are required in the parameter adaptation rules. Particularly, the biased sinusoidal flux modulus command assures the convergence of parameters, and the consequent speed ripple problem is discussed. However, the aforementioned design has an imperfection and is found to be insufficient to assure stable operation in low-speed regeneration. Thus, further stability analysis based on the steady-state linearized model and remedies for stabilization are given. Effective experiment and simulation results are included. [ABSTRACT FROM AUTHOR]

In some application circumstances, both positive and negative sequence reactive power compensations are desired from the star-connected cascaded H-bridge static synchronous compensator (CHB STATCOM). However, the imbalanced phase currents/voltages will cause uneven active power flow among three clusters, which makes the cluster voltage balance more challenging. In this scenario, only zero sequence voltage is available to balance the cluster voltages. Although the zero sequence voltage can be calculated in all operating conditions based on the equilibrium of the active power for each phase cluster, the calculation is definitely complicated due to the zero sequence voltage expressed in the form of trigonometric function in the abc or dq0 frame. In this paper, the zero sequence voltage is represented in a dc form in the dq frame through introducing a virtually orthogonal zero sequence voltage. As a result, a linear relationship between the active powers and the zero sequence voltage is established, based on which, a simple zero sequence voltage calculation method is proposed with a small calculation burden. Furthermore, the accurate compensation region for the negative sequence current injection is identified by establishing the relationship between the maximum converter voltage and the negative sequence currents taking into consideration the initial phase angle of the negative sequence currents, while still keeping the cluster voltage balanced by using the zero sequence voltage control. The effectiveness of the proposed control and the compensation region are verified by the simulation and experimental results on a 400 V/±7.5 kVAr star-connected CHB STATCOM. [ABSTRACT FROM AUTHOR]

This paper focuses on the research of simulation model and experiment of a novel energy storage system (ESS). This novel ESS is dedicated to supplying power flow effectively for a new type of linear engine, which is used in alternative energy vehicle firstly. The control strategy has been proposed based on the ESS model, which adopts bidirectional four modes of operation to control the power flow. To sufficiently discuss the ESS dynamic behavior, the performance of the novel ESS is analyzed using simulations based on MATLAB/Simulink and experiments based on digital signal processor TMS320F2812. Finally, simulation and experimental results have verified the effectiveness of the novel ESS and the accuracy of the control strategy. [ABSTRACT FROM AUTHOR]

Due to the increased integration of multiple distributed generation (DG) units into the distribution network, riding through short-term faults and supporting the host grid have been requested by the new grid codes in many countries. However, the literature lacks the detailed dynamic analysis and control coordination of multiple grid-connected converter-based DG units, equipped with advanced controllers in the synchronous reference frame. To fill this gap, this paper initially presents a detailed small-signal modeling framework for typical medium-voltage multi-bus power distribution systems with multiple DG units equipped with grid-support functions to operate under the unbalanced conditions. This model encompasses the positive and negative sequences of the current and voltage and is developed for three stages of the fault (i.e., before, during, and after the fault) to cover a wide range of system operating points. In addition, to precisely study the interactions among DG units, four different control modes in DG units are considered to study the system dynamics under low-voltage and unbalanced conditions and at different grid strengths. Using the proposed detailed state-space models and based on the small-signal stability analyses, different control parameters are redesigned using the eigenvalue analysis on the complete multi-DG system. As a second contribution, sensitivity analyses are performed to study the effects of different system parameters, such as line characteristics, loading levels, and unbalanced fault characteristics, on the stability of the multi-DG system under unbalanced faults. Comparative simulation and experimental results are also reported to show the accuracy and effectiveness of the theoretical analyses. [ABSTRACT FROM AUTHOR]

This paper presents a new predictive power-factor-correction (PFC) controller for series-interleaved three-level boost (TLB) converters. Compared to the state-of-the-art TLB PFC controllers, where a two-cycle prediction and a detection of an operating region are necessary, the proposed controller achieves a low total harmonic distortion of the input current by using a single equation to predict the input current in all operating regions of the converter, in just one operating cycle. The average current control is achieved by sampling at the peak of the triangular carrier. The proposed PFC controller significantly reduces the distortion of the input ac current near the zero-crossing points, resulting in a low total harmonic distortion of the input current. The operation of the proposed controller was evaluated, and its stability and robustness to parameter changes was confirmed analytically. The controller operating principles were verified in simulations and validated by experiments on a medium-voltage 50-kW converter prototype. [ABSTRACT FROM AUTHOR]

This paper presents a temperature-dependent SPICE model for SiC power MOSFETs. The model describes the static and dynamic behavior and accounts for leakage current and impact ionization. The technology-dependent mosfet parameters are extracted from characterization measurements and datasheets. SPICE standard components and analog behavior modeling blocks are adopted for the model implementation. The model ensures a good agreement with experimental data over a wide temperature range, even under out-of-safe-operating-area (SOA) conditions close to the failure occurrence. [ABSTRACT FROM AUTHOR]

In this paper, a current-mode Class-DE (CMCDE) power amplifier is presented. The CMCDE with linear shunt capacitance under zero-current switching (ZCS) and zero current-derivative switching (ZCDS) conditions at any active time is analyzed, simulated, and fabricated. An analytical theory along with the design simulation and verification by experimental results at active time \tau d= \pi / 2 are given. It was shown that the peak switch voltage can be adjusted with active time \tau d. The proposed amplifier offers several desirable features, such as simple structure and possibility to include the parasitic inductance and shunt capacitance of the mosfet into a load network, so that ZCS condition is maintained. The results show that the switch voltage and current obtained in CMCDE amplifier are inversed in comparison to the voltage-mode Class-DE (VMCDE) amplifier by using a simple output matching network and series inductance. Also, we could control the harmonics in one resonator in comparison to multiple resonators used in some high-efficiency power amplifiers. The measured maximum drain efficiency of 88% and power gain of 22 dB at 42-dBm output power was obtained at 4 MHz for CMCDE amplifier at active time \tau d= \pi / 2. [ABSTRACT FROM AUTHOR]

The main objective of this work is to provide an overview and evaluation of discrete model-predictive control (MPC)-based maximum power point tracking (MPPT) for photovoltaic systems. A large number of MPC-based MPPT methods have been recently introduced in the literature with very promising performance; however, an in-depth investigation and comparison of these methods has not been carried out yet. Therefore, this paper has set out to provide an in-depth analysis and evaluation of MPC-based MPPT methods applied to various common power converter topologies. The performance of MPC-based MPPT is directly linked with the converter topology, and it is also affected by the accurate determination of the converter parameters; sensitivity to converter parameter variations is also investigated. The static and dynamic performance of the trackers is assessed according to the EN 50530 standard, using detailed simulation models, and validated by experimental tests. The analysis in this work aims to present useful insight for practicing engineers and academic researchers when selecting the maximum power point tracker for their application. [ABSTRACT FROM AUTHOR]

Resonant power conversion leads to advantages such as soft switching and high-frequency operation; however, analysis and design of a resonant converter require an efficient methodology. In general, conventional methodologies use a design-oriented architecture, which requires previously specifications and iterative circuit-level simulations. This procedure is the simplest; notwithstanding, it can be time consuming and inaccurate for more complex systems, as resonant converters. This paper proposes a result-oriented architecture that is independent of specifications; in other words, real circuit parameters are waived in exchange for generalized results. A normalization procedure is proposed by using an equivalence transformation to modeling the system with a state vector composed of terms as the square roots of the stored energy in the reactive components. The system is represented in a dimensionless state-space model, in which the terms of the state-space matrices are composed of resonant parameters, such as normalized resonant frequencies and quality factor; thereby, the system is independent of circuit parameters, such as inductances, capacitances, and resistances. The sixth-order hybrid Ćuk converter is used to derivate the equations. Simulation results and an implementation of a 500-kHz hybrid buck converter are shown to compare theoretical, simulation, and experimental results. [ABSTRACT FROM AUTHOR]

Three-phase three-leg inverter is one of the most popular topologies for inverters. When short-circuit fault occurs, the inverter is generally switched to the current-controlled mode from voltage-controlled mode to limit the fault currents. In this situation, the inverter becomes equivalent to a symmetric, three-phase, positive sequence current source. However, the voltage limiting may occur under asymmetrical fault. In this paper, a closed-loop model based on time-domain is originally developed as a means to investigate the fault current characteristics under asymmetrical fault. Based on the proposed model, a more intuitive insight into fault currents is presented as follows. 1) The positive sequence fundamental component of three-phase currents can still track the symmetric current references. 2) The magnitude of fault phase currents (ignoring the harmonics) will vary between 1 and $\sqrt 3 $ times of magnitude of current limiting references. Based on the conclusion, although the magnitudes of fault phase currents can be reduced by adopting smaller current limiting references, the actual magnitudes of fault phase currents will still vary in a range depending on the load impendence of healthy phase. Therefore, the reliable action of the protection devices is greatly affected and the selective protection cannot be realized. Furthermore, in order to achieve completely controllable fault currents under asymmetrical fault, two alternative current limiting strategies are presented with reverse current limiting references, and with current limiting references based on the introduced phase angle regulation. The theoretical results are validated by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper introduces a hybrid modular multilevel converter (MMC) with the full-bridge submodules (FBSMs) inserted in the ac side. It is intended for redistributing arm powers of the MMC system to reduce the submodule (SM) capacitor voltage fluctuation by injecting high-frequency powers in upper and lower arms without disturbing the output voltage. New power distribution of the hybrid MMC system can be realized by controlling the SMs and FBSMs working under the high-frequency powers. The proposed FBSMs in the hybrid MMC system also perform as the harmonic power generator to eliminate the common-mode voltages in the ac side. Since the FBSMs locate in the ac side of the hybrid MMC system, the traditional MMC control method can be directly applied in arm control of the hybrid MMC system. Meanwhile, relationship between the arm powers and SM capacitor voltage has been analyzed in detail to reduce the SM capacitor voltage ripples by redistributing the frequency spectrum of arm powers. Simulation and experimental results have also verified the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a direct space-vector modulation (DSVM) method that can reduce the common-mode voltage (CMV) as well as the switching losses for matrix converters in a high voltage transfer ratio. Even though the previous DSVM improvements can reduce the CMV peak value to 42%, compared to the conventional DSVM method, they incur high switching losses. The DSVM method proposed in this paper provides the same CMV peak value as previous methods with lower switching losses. The switching losses are theoretically analyzed through the accumulated switched voltage in a switching period and compared to those of previous methods. Simulation and experimental results are given to verify the input/output waveforms, CMV reduction, and lower switching losses of the proposed DSVM method. [ABSTRACT FROM AUTHOR]

This paper presents a finite-element-based simulation methodology to improve on multiscale modeling and analysis limitations of power electronics development. The method utilizes homogenization and nonmatching grid concepts to offer a high degree of flexibility and reduce computational effort. The applied homogenization method provides effective material properties to realize full-chip modeling performance without the need to model geometric details. The concept of nonmatching grids allows the inclusion of a subregion with substantially finer mesh than its surrounding regions. This allows the flexible integration of micrometer scale geometries with a high degree of detail within the full-chip model. Both concepts are thoroughly introduced and an application to a state-of-the-art power electronics semiconductor technology is presented. This paper focuses on electrothermal interaction and is experimentally verified on a dedicated test structure. The presented results provide electrothermal insights in current power electronic technologies and emphasize their potential to further improve the robustness and reliability of next generation technologies. [ABSTRACT FROM PUBLISHER]

A virtual space vector modulation technique reducing both magnitude and third-order harmonic component of the common-mode voltage (CMV) in a two-level voltage-source inverter (VSI) is proposed in this paper. The presented method employs a set of virtual space vectors constructed from original stationary space vectors to conduct modulation. Since the created virtual vectors have the lowest instantaneous and zero average CMVs, both the magnitude and third-order harmonic component of the generated CMV are reduced, contributing to better overall CMV performance and common-mode filter design in VSI applications. Three variants of the proposed modulation method using different virtual space vector combinations are presented. The concept of the virtual space vector modulation technique demonstrated with two-level inverter in this paper can also be extended to multilevel inverters. Simulation and experimental results, as well as comparisons with existing methods are provided to verify the proposed technique. [ABSTRACT FROM AUTHOR]

This paper presents an alternative approach to address the control and modulation problem of single-phase three-level converters applied in the high-speed railway electrical traction drive system. Following the principle of deadbeat predictive direct torque control of ac motors, this paper discusses an improved direct power control (DPC) method based on a deadbeat active and reactive power prediction technique. Comparing with the conventional PI-based DPC scheme, the proposed deadbeat predictive DPC scheme can provide these advantageous features: lower current harmonics and THD index, lower active and reactive power ripples, and fewer adjusted parameters. Moreover, compared with PI-based DPC with the PI parameters optimization, this approach can also easily obtain fast dynamic response but without the main voltage orientation. A single-phase three-level space vector pulse width modulation (SVPWM) with inherent neutral-point voltage balancing capability is adopted, which can be combined with DPC scheme as an overall control and modulation system. A series of simulation and experimental tests have been conducted to demonstrate an excellent performance of the deadbeat predictive DPC. In addition, the neutral-point-voltage balancing ability of the adopted SVPWM method has been verified. [ABSTRACT FROM PUBLISHER]

One limitation of many battery charge equalizers is their slow equalization speed, especially when there are a large number of batteries in the series-string in high-voltage and high-power applications. This paper presents a new architecture for battery charge equalization. In this architecture, independent equalizers are placed in different layers and all the layers can equalize the corresponding batteries simultaneously, thus reducing equalization time by 50%. We explore the operation, performance characteristics, and the design of the architecture. Both simulation and experimental results are presented to validate the analysis in this paper. [ABSTRACT FROM AUTHOR]

In this paper, we propose model predictive control methods to reduce the common-mode voltage of three-phase voltage source inverters (VSIs). In the reduced common-mode voltage-model predictive control (RCMV-MPC) methods proposed in this paper, only nonzero voltage vectors are utilized to reduce the common-mode voltage as well as to control the load currents. In addition, two nonzero voltage vectors are selected from the cost function at every sampling period, instead of using only one optimal vector during one sampling period. The two selected nonzero vectors are distributed in one sampling period in such a way as to minimize the error between the measured load current and the reference. Without utilizing the zero vectors, the common-mode voltage controlled by the proposed RCMV-MPC algorithms can be restricted within ±Vdc/6. Furthermore, application of the two nonzero vectors with optimal time sharing between them can yield satisfactory load current ripple performance without using the zero vectors. Thus, the proposed RCMV-MPC methods can reduce the common-mode voltage as well as control the load currents with fast transient response and satisfactory load current ripple performance compared with the conventional model predictive control method. Simulation and experimental results are included to verify the effectiveness of the proposed RCMV-MPC methods. [ABSTRACT FROM AUTHOR]

This paper presents a fast and generalized space vector pulse width modulation (SVPWM) scheme for any multilevel inverter. The SVPWM scheme generates all the available switching states and switching sequences based on two simple and general mappings, and calculates the duty cycles simply as if for a two-level SVPWM, thus independent of the level number of the inverter. Because the switching states, duty cycles, and switching sequences are all obtained by simple calculation in the proposed SVPWM scheme, no lookup table is needed and the scheme is computationally fast. The generalized method of generating the switching states (first mapping), calculating the duty cycles, and determining the switching sequence (second mapping) is described in this paper. The scheme is suitable for any reference vector with any modulation index, and can be conveniently extended to meet specific requirements, such as symmetric switching sequences. Compared with prior methods, the SVPWM scheme proposed in this paper provides two more degrees of freedom, i.e., the adjustable switching sequences and duty cycles, thus offering significant flexibility for optimizing the performance of multilevel inverters. The influence of redundant switching sequences in the output phase voltage of inverters is demonstrated for a nine-level inverter. This paper also thoroughly compares the proposed SVPWM scheme with prior methods. Both simulation and experimental results are given. [ABSTRACT FROM AUTHOR]

In this paper, analytical expressions for waveforms and design relationships are derived for the class-E power amplifier with the MOSFET nonlinear drain-to-source parasitic capacitance under the subnominal operation, i.e., only zero-voltage switching (ZVS) condition, for any grading coefficient m of the MOSFET body junction diode and 50% duty ratio. Only the MOSFET nonlinear drain-to-source parasitic capacitance is used for the analysis of the class-E ZVS power amplifier, and its nonlinearity is determined by the grading coefficient m. The switch voltage waveform does not satisfy the class-E ZVS switching condition when only the linear shunt capacitance is considered. The grading coefficient m is used as an adjustment parameter that provides accurate design to satisfy the given output power and peak switch voltage simultaneously. Therefore, the grading coefficient m is the important parameter to satisfy the class-E ZVS condition and given design specifications, which is the most important result in this paper. Additionally, the output power capability and maximum operating frequency are affected by the grading coefficient m. The analytical expressions are obtained by considering the grading coefficient m as an adjustment parameter, which is validated by PSpice simulations and laboratory experiments. The measurement and PSpice simulation results agreed with the analytical expressions quantitatively, which denotes the usefulness and effectiveness of our obtained analytical expressions. [ABSTRACT FROM AUTHOR]

Insertion of dead time, transfer links between micro control unit (MCU) and voltage source inverter (VSI), VSI's nonideal characteristics all lead to deviation that cannot be ignored between the actual output voltage and the command voltage, which seriously affects the performance of the ac induction motor (ACIM) control system. Among many dead-time effect compensation methods, VSI usually operates under an open-loop condition, thus making complete compensation hard to achieve. This paper studies methods to obtain the two key elements of compensation voltage amplitude and current polarity and a novel phase voltage compensation method is proposed. In this method, a simple hardware circuit is applied to obtain the actual output of the VSI as feedback with which precise compensation amplitude can be calculated. And judgment of current polarity is accurately realized by reconstructing phase current from filtered current components under M-T coordinate with a Kalman filter. The compensation in a zero-crossing region is also closely discussed in this paper. To verify the validity of the method, simulations and experiments are carried out. The experiments emphasize on the efficacy of feedback, steady-state, and transient performance of current reconstruction; and the performance of a conventional method to that of the proposed method are also compared. Results show that the proposed method proves to be effective. [ABSTRACT FROM AUTHOR]

This paper presents the design, modeling, implementation, and experimental results of an advanced current-sensorless control scheme for voltage source converter–power factor correction rectifiers. This proposal is aimed to reduce the complexity of the control while maintaining desirable features for ac/dc conversion, such as unity power factor, low total harmonic distortion in input current, continuous regulation of the dc voltage even facing ac voltage sags and dynamic load changes. Unlike other proposals, this scheme has a single feedback proportional-integral loop, uses few mathematical operations, and the dq0 reference frame is not included in the control scheme. These characteristics simplify the implementation of the proposed control thus improving its efficiency. The theoretical analysis and simulation validate the technical feasibility of the proposed control, and finally, various cases of study and experimental results obtained with a laboratory scale-down prototype are presented to confirm the viability and performance of the control. [ABSTRACT FROM PUBLISHER]

Recently, a magnetic pad called the tripolar pad (TPP) has been introduced for inductive power transfer (IPT) systems. This paper evaluates the effective coupling factor and leakage magnetic field of a 20-kW IPT system that uses a combination of TPP and circular pad (CP) topologies over a range of lateral displacements. The results show that the effective coupling factor and the leakage magnetic field of the TPP–TPP system are substantially better when the secondary is displaced away from ideal alignment. Leakage magnetic field is reduced up to 43% compared to the CP–CP system at the worst-case misalignment, which is due to the ability of the TPP–TPP system to generate and capture different types of magnetic field shapes. Simulation methods for both the TPP and CP are validated in the laboratory using a 2-kW system operating at 85 kHz. [ABSTRACT FROM PUBLISHER]

Power allocation in hybrid energy storage systems (HESSs) is an important issue for dc microgrids. In this paper, an integral droop (ID), inspired by the electrical characteristics of capacitor charging/discharging process, is proposed and applied to a cluster of energy storages (ESs) with high ramp rates. Through the coordination of the ID and conventional V-P droop, the transient power allocation in HESSs can be intrinsically realized in a decentralized manner. The high-frequency components of power demand can be compensated by the ESs with ID, whereas the ESs with V-P droop respond to the smooth change of load power. Additionally, the ID coefficient can be designed according to the nominal ramp rate of the ESs with slow response, which helps to extend the lifespan of the HESS. On the other hand, to easily assess the stability of the system feeding constant power loads, a minimum relative impedance criterion (MRIC) is developed. Based on MRIC, it is revealed that the proposed ID can shape the output impedance of the HESS and stabilize the entire system. The feasibility and effectiveness of ID are verified by both simulations and experimental results. [ABSTRACT FROM PUBLISHER]

This paper proposes a star-channel modular multilevel converter (MMC). It overcomes the zero/low-fundamental-frequency operation issues of conventional MMC while not injecting the common-mode voltage (CMV). The proposed converter is characterized by the cross connections of upper three arms and lower three arms through two sets of star-channel branches. These star-channel branches rebalance the power among three phase legs, resulting in minimized submodule capacitor voltage ripples even at zero/low-fundamental-frequency operation without CMV injection. This feature enables the proposed converter to interface medium/high-voltage DC and variable-frequency AC systems. A 4160-V 1-MW simulation model is performed in MATLAB/Simulink, and a 208-V 5-kW experimental setup is constructed in the lab. Both of the simulation and experimental results verify the feasibility of the proposal. [ABSTRACT FROM PUBLISHER]

This paper proposes a new device by combining features of an interline dual H-bridge current flow controller with the core idea of a hybrid HVdc circuit breaker for meshed HVdc grid application. The proposed device can substitute two dc circuit breakers at a dc bus with at least two adjacent transmission lines. In addition to the current interruption action, the current in one of the adjacent lines can be controlled by the embedded current flow controller. The system-level behavior of the proposed current flow controlling hybrid dc circuit breaker is similar to that of the typical hybrid dc circuit breaker and the interline dual H-bridge current flow controller. The operation principles of the proposed device are introduced and analyzed in this work. The component ratings are compared to the existing solution, and the functionality of the proposed device is verified by simulation. [ABSTRACT FROM AUTHOR]

This paper addresses the harmonic stability resulting from the current-control interactions of the multiparalleled, LCL-filtered voltage-source converters. First, an alternative impedance model is proposed for the single-loop current control. The control output admittance of the converter is decomposed into a passive filter output admittance in series with an active admittance, which is dependent on the current controller and the time delay. The frequency-domain passivity theory is then applied to the active admittance for system stability analysis. It reveals that the stability region of the single-loop grid current control is not only dependent on the time delay, but affected also by the resonance frequency of the converter-side filter inductor and filter capacitor. Further on, the damping injection based on the discrete derivative controller is proposed to enhance the passivity of individual converters and thereby stabilizing the paralleled converters. Finally, simulation studies and laboratory tests validate the effectiveness of theoretical analysis and controller design. [ABSTRACT FROM AUTHOR]

For maximizing the power transfer in an inductive power transfer system, the operating frequency of the system is normally designed to be the same as the resonant frequency of the secondary power pick-up. But the load deviation reflected from secondary side to primary side will result in the frequency mismatch issue. Therefore, the contactless load detection technique is significant to ensure the power transfer efficiency and capacity. The emerging technique taking advantages of the amplitude decay rate in a transient process is promising. The robustness and practicability can get enhanced and the complicated steady circuit model is avoided. However, the accuracy for the small resistance application is still a challenge even with sophisticated compensation algorithms. This paper classified the system detectable region through the root locus method. The transient process in different subregions is excavated mathematically. It is revealed that the variation of the system from the second order to fourth order is the key issue for the detection error in the small load resistance application. The analysis brings out a novel automatic contactless load detection method to extend the detection range. Both simulation and experimental results verified the effectiveness of the proposed theory and detection method. [ABSTRACT FROM AUTHOR]

This paper presents an instantaneous torque control method for cascaded doubly fed induction machines (CDFIMs) with a rated torque-sharing ratio feature under steady-state operation. A CDFIM includes two coupled main and auxiliary doubly fed induction machines, and the rated torque-sharing ratio herein means that the machine torques are proportional to the machine ratings. The proposed method is established based on transferring the torque equations of the two machines into the rotor-flux reference frame of the auxiliary machine. Then, the instantaneous torque and the rated torque-sharing ratio are controlled via the stator current components of the auxiliary machine, while machine fluxes are within allowable ranges. To verify the method and evaluate its capabilities, the suggested method is used for the speed control of a CDFIM experimental setup including two 4-kW doubly fed induction machines and a 4-kW dc machine to apply a sudden mechanical load change to the CDFIM. Further, a case study including 12-kW and 4-kW DFIMs is also simulated to evaluate the performance of the torque control method for a CDFIM with different machine ratings. The test results confirm that the proposed control schemes achieve the desired performances without exceeding the ratings of the machines under various test scenarios. [ABSTRACT FROM AUTHOR]

Over recent years, the output power of micro-inverters [module-incorporated inverter (MIC)] is progressively pushed to higher levels, following the current photovoltaic (PV) modules market trends. The interleaved Flyback inverter—under discontinuous conduction mode of operation (DCM)—is an appealing solution for PV applications which are based on MIC technology. This topology provides increased power level for distributed PV generation exploitation with simple control configuration, high efficiency, and reduced filter size. In this paper, the harmonic injection capability is incorporated into the interleaved Flyback inverter for the implementation of an active anti-islanding scheme. A suitable technical solution is proposed that bypasses the unfolding H-bridge, without affecting the active power generation of the inverter and without requiring any hardware modification. In addition, a mathematical model based on the instantaneous power balance theory is presented, being a powerful analysis tool for inverters operating under complete magnetic discharge such as the Flyback inverter (either conventional or interleaved) under DCM or boundary conduction mode of operation. The proposed model predicts accurately the steady-state operational behavior of the Flyback inverter under current harmonic injection, either in grid-tied or islanding operation. The proposed technical implementation method and mathematical model are verified through simulation and experimental results. Finally, an anti-islanding set-up based on the proposed harmonic injection technique is presented and implemented into the Flyback micro-inverter. The proposed set-up is verified through experimental results on various quality factor values, as well as for weak grid conditions. [ABSTRACT FROM AUTHOR]

An asymmetric three-level neutral point diode clamped converter for switched reluctance motor drives is proposed in this paper. The modulation method, the dc-link voltage balancing algorithm, and the current control scheme of this converter are presented. The proposed three-level converter is compared with the conventional two-level asymmetric half-bridge converter in terms of cost, current ripple, noise, and power losses. Compared to the conventional two-level converter, the proposed three-level converter has much lower current ripple, lower noise, and higher efficiency. The effectiveness of the proposed converter is verified by both simulation and experimental results. [ABSTRACT FROM AUTHOR]

High-order wide-output (HOWO) impedance-source converters (ISCs) have been presented for ac inverter applications that require voltage step-up ability. With intrinsic passive impedance networks as energy sources, these converters are able to achieve voltage boosting with either polarity, leading to improved dc-link voltage utilization compared with the conventional two-level converter. However, HOWO-ISCs suffer from transfer functions giving low bandwidth, a penalty of increased passive devices and right-half-plane zeros, which result in lower order distortion of the ac output power. In this paper, a modified plug-in repetitive control scheme is presented for HOWO-ISCs with accurate reference tracking (hence low distortion), fast dynamic response, and enhanced robustness. By using zero-phase-shift finite impulse response filters in both the internal model of the repetitive controller and its compensation network, the proposed method achieves zero steady-state error and an extended closed-loop bandwidth. For HOWO-ISC cases, this method outperforms conventional proportional-integral (PI) control, which has considerable steady-state error. It also eliminates the need of parallel loops for several frequencies when proportional resonant control or orthogonal transformation-based PI schemes are used to remove lower order distortion. The design process and performance analysis of the proposed repetitive control strategy are based on a novel three-phase HOWO-ISC configuration with a reduced number of switches. Simulation and experimental results confirm the feasibility and effectiveness of the proposed control approach. [ABSTRACT FROM AUTHOR]

This paper proposes an iterative learning control (ILC) scheme for a dual-mode flyback inverter operating in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). In dealing with more than 200-W power applications, the dual-mode flyback inverter takes advantage of both DCM and CCM operations. However, it is difficult to control the output current because the system gain is quite low in DCM and the system transfer function has a right-half plane zero in CCM. To overcome the problems occurring in DCM and CCM operations, we propose an ILC scheme with multiple phase-lead compensation. The ILC is proposed to achieve accurate reference tracking and to reject periodic disturbances. The multiple phase-lead compensation technique is then employed to compensate for the effect of different system dynamics. As a theoretical result, we derive the asymptotic stability of the closed-loop system. We also performed the numerical simulations and experimental tests to validate the proposed control approach. [ABSTRACT FROM AUTHOR]