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Pulsewidth-modulated (PWM) current-source converters (CSCs) have the features of simple configuration, reliable short-circuit protection, and sinusoidal ac output voltages. The conventional space-vector modulation (SVM) scheme usually generates high-magnitude low-order harmonics in CSCs with low switching frequency. In this article, two modified SVM schemes, namely MSVM1 and MSVM2, are proposed to improve the harmonic performance for PWM CSCs in the high-power applications with low switching frequencies. The MSVM1 scheme focuses on eliminating the average dwell-time error of current vectors within each sampling period, while the MSVM2 scheme is targeted to achieve the accurate dwell time of current vectors as that of the natural sampling-based SVM scheme. The theoretical analysis and the calculation equations of dwell time are derived for both MSVM1 and MSVM2. The experiments are given to verify the effectiveness of the two modified SVM schemes in improving the harmonic performance of high-power CSCs with low switching frequencies. [ABSTRACT FROM AUTHOR]

A feedback linearization based direct torque control (FL-DTC) scheme is designed for interior permanent magnet synchronous motors drives. Several main aspects related to FL are studied thoroughly. A proper choice of two new state variables (the torque and the squared amplitude of stator flux) yields the exact input–output linearization decoupling of the closed-loop system. The FL-DTC frame is obtained after finding a feasible diffeomorphism. For the partially linearized subsystem, i.e., the independent torque and flux loops, two FL-DTC-based controller design solutions are provided. The control problem of internal dynamics is converted to an absolute tracking problem of an equivalent Lur'e system. [ABSTRACT FROM AUTHOR]

In this paper, a novel space vector modulation (SVM) strategy is proposed and designed for dual three-phase three-level motor drives based on vector space decomposition (VSD), which could be applied for high-power and high-reliability applications. The key of the proposed method is to design two decoupled groups of voltage vector candidates for synthesis on α − β subspace and x − y subspace, respectively. The two decoupled groups of voltage vectors will synthesize respective voltage references on α − β subspace and x − y subspace, while having no impact on each other. The redundant small voltage vectors and zero-sequence voltage vectors are utilized to mitigate voltage oscillation in midpoint of dc link and suppress zero-sequence current component for dual three-phase windings with a common neutral. For comparison, another VSD-SVM strategy is designed based on traditional solution, which cannot offer closed-loop control on x − y subspace. Both simulation and experiments have been given to verify that the proposed decoupled VSD-SVM can suppress harmonic components on x − y subspace besides tracking torque components on α − β subspace. Furthermore, the harmonic performance of the proposed decoupled VSD-SVM has been compared with the traditional VSD-SVM strategy and the carrier disposition based pulsewidth modulation. [ABSTRACT FROM AUTHOR]

In this paper, a hybrid pulsewidth modulation (PWM) scheme is proposed to suppress the LC resonance for the high-power current-source inverter (CSI) fed drives with low switching frequency. In CSI drive systems, the selective harmonic elimination (SHE) is selected due to the better performance of harmonics, but the LC resonance cannot be effectively damped due to the lack of control flexibility of SHE. In this paper, SHE is only used for the steady-state operation. The modulation scheme is then switched to space vector modulation with dynamic capacitor voltage control when the transient event occurs. The smoothed transitions between different modulation schemes are proposed. The proposed hybrid method effectively solves the resonant issues in CSI drives, while maintaining the power quality. Both simulation and experiments verify the performance of the proposed hybrid PWM scheme. [ABSTRACT FROM AUTHOR]

This letter proposes a fast current control scheme for ac drives by minimizing the latency from current sampling to the updation of a pulsewidth-modulation (PWM) command. By reconstructing the architecture of a linear controller, the minimal necessary steps to obtain the output voltage are deduced as the primary calculation, and the other computation work of the current loop is done in the postcalculation after updating the PWM command. With the proposed method, the computational delay is reduced with negligible loss in the available modulation index, and a higher stability margin or system bandwidth is realized. Also, the developed controller structure exhibits inherited antiwindup characteristics. The technique has been validated by experimental investigations on a permanent magnet synchronous motor. [ABSTRACT FROM AUTHOR]