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This is a panel paper that discusses the use of Artificial Intelligence (AI) technologies to address production and supply chain level problems in semiconductor manufacturing. We have gathered a group of expert semiconductor researchers and practitioners from around the world who have developed AI solutions for various semiconductor problems. This paper aims to provide their answers to an initial set of questions and provide an overview of the AI developments and empirical studies to make suggestions for future directions in this arena. [ABSTRACT FROM AUTHOR]

In manufacturing industries, it is of fundamental importance to detect anomalies in production in order to meet the required quality goals and to limit the number of defective products that are accidentally delivered to the customers. Nevertheless, monitoring systems currently employed in production are typically very simple and rely on a set of univariate control charts that fail to capture the multivariate and complex nature of real-world industrial systems. In such context, Machine Learning (ML)-based approaches for Anomaly Detection (AD) have proven to be extremely effective in increasing anomalies detectability and, in general, in enhancing monitoring procedures. However, industrial data are typically very complex and not suitable to be fed directly to classical ML-based AD tools making feature extraction procedures a necessary step that unfortunately may lead to information loss and low scalability. Deep Learning, has proven very effective at learning useful representations of complex data in an automatic way. In this paper, we propose an AD pipeline that makes use of convolutional autoencoders to extract useful features from two-dimensional, non-image, data. We test our approach on real world Optical Emission Spectroscopy data that are typical of semiconductor manufacturing and we achieve improved performance over classical monitoring methods. Note to Practitioners—Advanced monitoring is one of the most important task in the context of Industry 4.0. Some of the main issues in developing Machine Learning-based solutions in industrial environment are: (i) the lack of reliable tagged data; (ii) the complexity of data structures present in real-world scenarios. In this paper we investigate unsupervised anomaly detection for 2-dimensional data in manufacturing environment: we provide an approach that exploit Deep Learning-based architecture for handling the data at hand. We show the effectiveness of the proposed approach in a real world case study related to optical emission spectroscopy data in semiconductor manufacturing process providing satisfactory classification accuracy. [ABSTRACT FROM AUTHOR]

Semiconductor fabrication involves hundreds of process steps through various manufacturing tools. These processing steps are composed of many manufacturing and inspection steps. Inspection is an important step in the fabrication process to determine whether a process is in or out of control. Abrupt manufacturing or inspection tool excursion can lead to a serious low yield problem. Although commonality analysis is a proven tool for detecting abrupt tool excursion, it has gained only limited success in detecting manufacturing tool excursion outside of inspection tools. Compared with manufacturing tools, only a small number of lots or wafers pass through inspection tools. Therefore, it is difficult to construct a sufficient lot history log for inspection commonality analysis in contrast to that of manufacturing tools. Furthermore, inspection may stress a wafer during its own processing, therefore, the target wafer is changed sequentially or randomly. Accordingly, a lot history is apt to include missing traces, which hinders finding inspection tool excursion effectively. In this paper, we propose a comparative analysis framework for commonality analysis algorithms. Performance measures are suggested. To compare the performance of the algorithms effectively, we use a synthetically generated dataset in a simulation experiment. In addition, we apply the algorithms to a real problem that occurred in the fabrication process. Our proposed algorithm demonstrates superiority over the other commonality analysis algorithms in the experiments. [ABSTRACT FROM AUTHOR]

Equipment at the end of functional life poses several challenges for manufacturing operations and long-term asset sustainability. This is even critical for semiconductor manufacturing where equipment upgrades are capital intensive with a longer return horizon. This demands an objective and quantifiable approach to manage and monitor the end-of-life health of the manufacturing systems. The paper presents a practical three-level approach that brings together engineering, operational, and supply chain factors under a single indicator. A visualization heatmap correlates equipment health to manufacturing impact for engineering and commercial decision-making. The approach is simple yet proven to be effective in fab environments. The proposed analysis applies in formulating system priorities, upgrade strategies, and capital expenditures. Brief guidance on health improvement strategies, application to new fab, and cost-based evaluation are presented for practical use. [ABSTRACT FROM AUTHOR]

The concepts of Industry 4.1 for achieving Zero-Defect (ZD) manufacturing were disclosed in IEEE Robotics and Automation Letters in January 2016. ZD of all the deliverables can be achieved by discarding the defective products via a real-time and online total inspection technology, such as Automatic Virtual Metrology (AVM). Further, the Key-variable Search Algorithm (KSA) of the Intelligent Yield Management (IYM) system developed by our research team can be utilized to find out the root causes of the defects for continuous improvement on those defective products. As such, nearly ZD of all products may be achieved. However, in a multistage manufacturing process (MMP) environment, a workpiece may randomly pass through one of the manufacturing devices with the same function in each stage. Different devices of the same type perform differently in each stage, where the performances will be accumulated through the designated manufacturing process and affect the final yield. KSA can only identify the influence of univariate variables (i.e., single devices) on the yield, yet it cannot detect the manufacturing paths that have significant influence on the yield. In order to cope with this deficiency such that the golden path with a better yield amongst all the MMP paths can be found, this research proposes the Golden Path Search Algorithm (GPSA), which can plan golden paths with high yield under the condition of the number of variables being much larger than that of samples. As a result, it makes the improvement of manufacturing yield be more comprehensive. Note to Practitioners—Traditional scheduling only considers the capacity of the manufacturing devices for allocation; while, the impact on the yield is rarely considered. In fact, in a production process, the production deviations will be gradually accumulated and affect the product quality along with the processing influence of each device. Therefore, the purpose of this paper is to propose the GPSA scheme to quickly search for high-yield manufacturing paths before the production. Manufacturers can then configure production devices based on these paths. According to the experimental results of real manufacturers’ data, GPSA can not only quickly nail down the high-yield paths from a large amount of historical data, but also alert the users to avoid paths that are prone to defective rates for their reference. [ABSTRACT FROM AUTHOR]

Semiconductor manufacturing plays a crucial role in the world’s economic growth and technology development and is the backbone of the high value-added electronic device manufacturing industry. In this paper, a new anomaly detection framework by means of data visualization is proposed for semiconductor manufacturing. Firstly, t-Distributed Stochastic Neighbor Embedding (t-SNE) in unsupervised learning is used to transform the high-dimensional raw trace data, corresponding to normal wafers, into a two-dimensional map, with the purpose of visually observing the distribution of normal wafers. The t-SNE algorithm cannot be used at run time for a new test sample since it requires the whole dataset for the embedding transformation, and is computationally very expensive. The Multilayer Perceptron (MLP) neural network is then applied as a regressor for the real-time t-SNE embedding of a new test data. The envelope of t-SNE score estimates for a set of normal wafers is circumscribed and used as the 2D control boundary based on the Delaunay Triangulation (D.T.). A new test sample with its MLP estimated embedding points outside the D.T boundary is identified as defective. Lastly, a real-world dataset in semiconductor manufacturing is used to illustrate the proposed data visualization tool for anomaly detection. The experimental results show that a multilayer perceptron in combination with t-SNE and Delaunay Triangulation performs very well for data visualization and automated detection of anomalies. [ABSTRACT FROM AUTHOR]

Semiconductors are essential components in many electronic devices. Because wafers are produced quickly and in large quantities, defects occur that adversely affect semiconductor properties. This makes it necessary to install powerful and robust inspection systems which use artificial intelligence techniques in the early stages of the manufacturing chain in order to detect and classify those defects. This paper proposes a method for defect detection and classification on images of semiconductor wafer materials obtained by means of a scanning electron microscope based in the following stages: (i) use of computer vision techniques to isolate the defect from the background; (ii) use of several descriptors based on shape, size, texture, histogram, and key-points to create a feature vector for the characterization of the defect; (iii) application of an exhaustive search as a feature selection method to determine the optimal subset of feature descriptors; and (iv) evaluation of the feature descriptors by using a support vector machine classifier providing the optimal set with highest F1-score metrics. Finally, the effectiveness of the proposed approach is compared with five popular feature selection methods, reporting better classification results than the latter. [ABSTRACT FROM AUTHOR]

Searching for and comparing similar wafer maps can provide crucial information for root cause analysis in the manufacturing process of integrated circuits. Owing to the high dimensionality and complexity of defect patterns, comparison of similar maps in their entirety is inefficient. This paper proposes an automated similarity ranking system with a novel feature set as a reduced representation of wafer maps. To detect systematic failure patterns across wafer maps, we use nonparametric Bayesian clustering based on the Dirichlet process Gaussian mixture model, and hierarchical clustering based on the symmetric Kullback–Leibler divergence. The proposed features are efficient because they require minimal computation and storage; furthermore, they allow for highly discriminative rankings of similar failure patterns. Thus they are suitable for large-scale analysis of wafer maps. The proposed method is experimentally verified using a real wafer map dataset from a semiconductor manufacturing company, and a subset of WM-811K. [ABSTRACT FROM AUTHOR]

This paper describes a chamber and recipe-independent fault detection and classification (FDC) indicator using the example of aluminum sputtering tools. We developed this indicator to detect abnormal discharge in an aluminum sputtering chamber when using a legacy FDC system. Abnormal discharge has several modes in the sputtering chamber, with abnormal discharge to a wafer commonly causing pattern defects. The indicator has been improved to detect only this problem, and to minimize the impact of false alarms that cause a loss of equipment productivity. The indicator can be readily extended to new chambers and the control limits are easily set for all recipes. This is because the equation for the indicator is very simple, and both the equation and the control limits are common to all sputtering chambers and recipes. It can therefore significantly reduce the setup work required of engineers, which is one of the biggest challenges in high-mix semiconductor manufacturing. The indicator is easily applied to newly installed tools at start of production and restrains the number of scrap wafers at minimum level. We also describe the mechanism of trace data changes in abnormal discharge modes using equivalent electrical circuits. [ABSTRACT FROM AUTHOR]