Search

Brittle materials are applied in optical, semi-conductor, electronic and medical industries. To meet the industrial requirements, excellent surface quality is desired, requiring ductile mode machining (DMM). DMM enables small-scale machining of these materials in a ductile manner having nano-/sub-nanometric surface finish with little/no subsurface damage, minimizing the necessity for the intermediate polishing process. DMM can be realized in precision/ultraprecision turning, milling and grinding processes. In these processes, ductile and brittle modes may be induced in brittle materials and the transition between them can be reliably characterized by using appropriate ductile-brittle transition (DBT) mechanisms. The challenge lies in applying the appropriate DBT mechanism in realizing DMM of brittle materials. Researchers have formulated various DBT characterization mechanisms in DMM of brittle materials. This paper firstly provides a brief overview of the material removal mechanisms and process parameters/conditions to realize DMM in these machining processes. Next, it critically summarizes the various mechanisms and machining conditions exploited to characterize DBT in these machining processes for brittle materials. Furthermore, the technical challenges faced by the proposed DBT characterization mechanisms are discussed and important parameters worth considering in developing a unified DBT model for the DMM of brittle materials are suggested as future research scope. Finally, this paper provides a highly technical resource for researchers, scientists and manufacturers working in the precision manufacturing of optics, semi-conductors, electronics and biomaterials for the production of high-quality components. • Review of ductile machining and ductile-brittle transitions in precision/ultraprecision machining of brittle materials. • Material removals, process parameters, conditions and tool geometries in precision/ultraprecision machining processes. • Various ductile-brittle characterization mechanisms are critically provided. • Technical challenges faced by the proposed ductile-brittle characterization mechanisms are discussed. • Important parameters for a unified ductile-brittle characterization mechanism of brittle materials are suggested. [ABSTRACT FROM AUTHOR]

The paper presents a new design of a CP JLTFET, which is a type of transistor with potential applications in various electronic devices. The proposed CP JLTFET design is aimed at improving the ON current and surface potentials of the device. These improvements are essential for enhancing the device's functionality. The source and drain regions in the intrinsic silicon material are induced using appropriate metal work functions. This design choice is made for ease of fabrication, which is a critical consideration in semiconductor device manufacturing. The cavity length is varied between 8 and 10 nm, and different dielectric constants are used in the simulation. These variations are designed to optimize the ON state performance of the device, including ON drive current, potential, and electric field. The increase in tunneling of electrons is attributed to high carrier recombination in the channel region. Carrier recombination is a key factor in device behavior and performance. The paper describes the simulation of various electrical parameters of the proposed device. This likely includes drain current, surface potentials, electric field, and energy bands. The excellent performance parameters of the proposed device, when combined with appropriate materials and the introduction of a cavity, make it suitable for sensing applications of biomolecules. The paper suggests that the excellent performance parameters of the proposed device, when combined with appropriate materials and the introduction of a cavity in the device, make it suitable for sensing applications, particularly for detecting biomolecules. [ABSTRACT FROM AUTHOR]

Prospective authors are requested to submit new, unpublished manuscripts for inclusion in the upcoming event described in this call for papers. [ABSTRACT FROM AUTHOR]

Prospective authors are requested to submit new, unpublished manuscripts for inclusion in the upcoming event described in this call for papers. [ABSTRACT FROM AUTHOR]

Prospective authors are requested to submit new, unpublished manuscripts for inclusion in the upcoming event described in this call for papers. [ABSTRACT FROM AUTHOR]

Prospective authors are requested to submit new, unpublished manuscripts for inclusion in the upcoming event described in this call for papers. [ABSTRACT FROM AUTHOR]

Prospective authors are requested to submit new, unpublished manuscripts for inclusion in the upcoming event described in this call for papers. [ABSTRACT FROM AUTHOR]

Electronegative inductively coupled plasmas (ICPs) are used for conductor etching in the microelectronics industry for semiconductor fabrication. Pulsing of the antenna power and bias voltages provides additional control for optimizing plasma–surface interactions. However, pulsed ICPs are susceptible to capacitive-to-inductive mode transitions at the onset of the power pulse due to there being low electron densities at the end of the prior afterglow. The capacitive (E) to inductive (H) mode transition is sensitive to the spatial configuration of the plasma at the end of the prior afterglow, circuit (matchbox) settings, operating conditions, and reactor configurations, including antenna geometry. In this paper, we discuss results from a computational investigation of E–H transitions in pulsed ICPs sustained in Ar/Cl2 and Ar/O2 gas mixtures while varying operating conditions, including gas mixture, pulse repetition frequency, duty cycle of the power pulse, and antenna geometry. Pulsed ICPs sustained in Ar/Cl2 mixtures are prone to significant E–H transitions due to thermal dissociative attachment reactions with Cl2 during the afterglow which reduce pre-pulse electron densities. These abrupt E–H transitions launch electrostatic waves from the formation of a sheath at the boundaries of the plasma and under the antenna in particular. The smoother E–H transitions observed for Ar/O2 mixture results from the higher electron density at the start of the power pulse due to the lack of thermal electron attaching reactions to O2. Ion energy and angular distributions (IEADs) incident onto the wafer and the dielectric window under the antenna are discussed. The shape of the antenna influences the severity of the E–H transition and the IEADs, with antennas having larger surface areas facing the plasma producing larger capacitive coupling. Validation of the model is performed by comparison of computed electron densities with experimental measurements. [ABSTRACT FROM AUTHOR]

Abstract\nKEY POINTSHigh-purity quartz (HPQ) is the only naturally occurring and economically viable source for the production of silicon. Silicon is a critical mineral, and a key component in modern technologies such as semiconductors and photovoltaic cells. Critical minerals support the move towards a greater reliance on electrification, renewable energy sources and economic security. The global transition to net zero carbon emissions means there is a growing need for new discoveries of HPQ to supply the silicon production chain. HPQ deposits are identified in a multitude of geological settings, including pegmatites, hydrothermal veins, sedimentary accumulations and quartzite; however, deposits of sufficient volume and quality are rare. Quartz is abundant throughout Australia, but the exploration and discovery of HPQ occurrences are notably under-reported, making assessment of the HPQ potential in Australia extremely difficult. This paper presents a much-needed summary of the state of the HPQ industry, exploration and deposit styles in Australia.High-purity quartz (HPQ) is a key material for the manufacture of photovoltaic cells, semiconductors and other high-technology applications.HPQ can be recovered from a variety of different source rocks in a range of geological settings.Currently, the HPQ industry in Australia is under-utilised for high-technology applications, and historical exploration and mining records are under-reported and opaque.This review presents an outline of the characteristics, processing requirements and end uses of HPQ, and a summary of the operations, deposits, exploration targets and known occurrences of HPQ in Australia. [ABSTRACT FROM AUTHOR]

In practical semiconductor processes, the defect analysis for wafer map is a critical step for improving product quality and yield. These defect patterns can provide important process information so that the process engineers can identify the key cause of process anomalies. However, in supervised learning, the manual annotation for wafer maps is an extremely exhausting task, and it can also induce misjudgment when a long-term operation is implemented. Toward this end, this paper proposes a new auto-labeling system based on ensemble classification. The noted VGG16 model is used in ensemble learning as the building block to train the classifier via a limited number of labeled data. Through the model being trained, the auto-labeling procedure is executed to annotate abundant unlabeled data. Therefore, the classification performances between the models trained by supervised and semi-supervised learning can be compared. In addition, the gradient-weighted class activation mapping (Grad-CAM) is also adopted to analyze and verify the quality of auto-labeling by visual inspection. Based on the experimental results, the proposed auto-label system can return a satisfactory classification performance, and then, the manual labeling operation can be drastically reduced. The classification performance for wafer defect patterns can be further assured as the auto-labeled data are given with corresponding confidence scores of specific defect patterns being identified in this study. [ABSTRACT FROM AUTHOR]

This paper introduces a novel wafer-edge quality inspection method based on analysis of curved-edge diffractive fringe patterns, which occur when light is incident and diffracts around the wafer edge. The proposed method aims to identify various defect modes at the wafer edges, including particles, chipping, scratches, thin-film deposition, and hybrid defect cases. The diffraction patterns formed behind the wafer edge are influenced by various factors, including the edge geometry, topography, and the presence of defects. In this study, edge diffractive fringe patterns were obtained from two approaches: (1) a single photodiode collected curved-edge interferometric fringe patterns by scanning the wafer edge and (2) an imaging device coupled with an objective lens captured the fringe image. The first approach allowed the wafer apex characterization, while the second approach enabled simultaneous localization and characterization of wafer quality along two bevels and apex directions. The collected fringe patterns were analyzed by both statistical feature extraction and wavelet transform; corresponding features were also evaluated through logarithm approximation. In sum, both proposed wafer-edge inspection methods can effectively characterize various wafer-edge defect modes. Their potential lies in their applicability to online wafer metrology and inspection applications, thereby contributing to the advancement of wafer manufacturing processes. [ABSTRACT FROM AUTHOR]

Engineering of organic single crystal toward controllable and aligned patterns at microscale is crucial to the realization of highly integrated organic photonic devices and optoelectronics. However, precise positioning and controllable morphology of crystal structures is still challenging due to the strict conditions for crystal growth. In this paper, a solution based crystal regulation strategy with the assistance of template‐constrained growth method and femtosecond laser processing technology is developed to prepare aligned crystalline microribbon arrays. Simple solvent evaporation results in the random distribution and orientation of self‐assembled crystalline microribbons while it tends to form highly crystalline and orderly microribbon arrays assisted by the confined template microchannels. The large‐scale microribbon array can be fabricated as organic photodetectors with sensitive and fast response under 405 nm illumination. By virtue of the femtosecond laser processing technique, the microribbon arrays are precisely processed into a series of crystal subunits and each microribbon subunit can function as an individual microcavity resonator to produce stable, high‐quality organic laser. The facile solution based template‐constrained self‐assembly and femtosecond laser processing method provide novel strategies to generate highly oriented and controllable crystal structures for the potential applications in integrated organic lasers and optoelectronics. [ABSTRACT FROM AUTHOR]

Plasma spraying technology, known for its efficient surface enhancement capabilities, has been widely applied in aerospace, automotive manufacturing, and power generation. Ironbased coatings, due to their superior mechanical properties and wear resistance, have become important materials in these fields. However, under extreme working conditions such as high temperatures, high speeds, and heavy loads, the thermal conductivity of the coating directly affects its service life and stability. Therefore, studying the thermal conductivity of plasma-sprayed iron-based coatings is of great significance. Currently, research on the thermal properties of plasma-sprayed coatings primarily focuses on the surface thermal conductivity, neglecting the complex coupled heat transfer mechanisms within the coating. Moreover, existing research methods often rely on empirical formulas or simplified models, making it challenging to comprehensively reflect the thermal conductivity behavior under actual working conditions. This is especially true in hightemperature and high-pressure environments where the limitations of these methods are more pronounced. This paper establishes a coupled heat transfer model for plasma-sprayed iron-based coatings to explore their thermal conductivity under different working conditions. The study comprises three parts: first, the mathematical derivation of the coupled heat transfer model within the plasma-sprayed iron-based coating; second, the determination of conduction boundary conditions and the calculation of heat transfer coefficients; third, the simulation results of the thermal conductivity characteristics of the plasma-sprayed iron-based coating. This research not only fills the gaps in existing studies but also provides reliable theoretical support and data reference for practical engineering applications. [ABSTRACT FROM AUTHOR]

This paper presents the line-edge-roughness (LER) characterization of the photomask patterns and the lithography-printed patterns by enhanced knife edge interferometry (EKEI) that measures the interferometric fringe patterns occurring when the light is incident on the patterned edge. The LER is defined as a geometric deviation of a feature edge from an ideal sharp edge. The Fresnel number-based computational model was developed to simulate the fringe patterns according to the LER conditions. Based on the computational model, the photomask patterns containing LER features were designed and fabricated. Also, the patterns were printed on the glass wafer by photolithography. The interferometric fringe patterns of those two groups of patterns were measured and compared with the simulation results. By using the cross-correlation method, the LER effects on the fringe patterns were characterized. The simulation and experimental results showed good agreement. It showed that the amplitude of the fringe pattern decreases as the LER increases in both cases: photomask patterns and printed wafer patterns. As a result, the EKEI and its analysis methods showed the potential to be used in photomask design and pattern metrology, and inspection for advancing semiconductor manufacturing processes. • The line-edge-roughness (LER) of the photomask patterns and the lithography-printed patterns was characterized by enhanced knife edge interferometry (EKEI). • The Fresnel number-based computational model was developed to simulate the fringe patterns according to the LER conditions. • The fringe patterns obtained by EKEI were analyzed by the cross-correlation method. As a result, the similarity value decreased as the LER increased. • The EKEI and its analysis methods showed the potential to be utilized in photomask design and pattern metrology and inspection for advancing semiconductor manufacturing processes. [ABSTRACT FROM AUTHOR]

High-performance semiconductor devices and ultra-thin packaging rely on ultra-thin silicon dies. The packaging assembly yield and device reliability are significantly influenced by the quality of ultra-thin wafers and dies. In the semiconductor manufacturing process, a backgrinding process is employed to create ultra-thin wafers. However, abrasive forces can induce subsurface damage (SSD). In particular, SSDs have a negative impact on the mechanical strength and reliability of the die. Additionally, productivity considerations are crucial for industrial applications. Therefore, it is imperative to optimize grinding parameters while considering both SSD and productivity. This paper presents a method for optimizing the polishing parameters of the backgrinding sequence based on the SSD model. Cutting depth and SSD are derived using the analogy between scratch theory and the material removal mechanisms of backgrinding. Subsequently, we calculate an inefficiency score that considers polishing time and SSD to determine the optimal process parameters. Furthermore, we conducted a backgrinding simulation using the optimized parameters to confirm the effects of optimizing the process parameters. To validate the simulation, we performed a grinding sequence using a self-produced back-grinding device and measured the roughness of the ground wafer to compare and verify the trends observed in the simulation. [ABSTRACT FROM AUTHOR]

Electroplated diamond wire sawing is widely used as a processing method to cut hard and brittle difficult-to-machine materials. Currently, obtaining the sawing capability of diamond wire saw through the wire bow is still difficult. In this paper, a method for calculating the sawing capability of diamond wire saw in real-time based on the wire bow is proposed. The influence of the renewed length per round trip, crystal orientation of sapphire, wire speed, and feed rate on the wire sawing capability has been revealed via slicing experiments. The results indicate that renewing the diamond wire saw, and reducing the wire speed and feed rate can delay the reduction in sawing capability. Furthermore, controlling the value of renewed length per round trip can make the diamond wire saw enter a stable cutting state, in which the capability of the wire saw no longer decreases. The sawing capability of diamond wire saw cutting in the A-plane of the sapphire is smaller than that of the C-plane, and a suitable feed rate or wire speed within the range of sawing parameters studied in this study can avoid a rapid decrease in the sawing capability of the wire saw during the cutting process. The knowledge obtained in this study provides a theoretical basis for monitoring the performance of the wire saw, and guidance for the wire cutting process in semiconductor manufacturing. In the future, it may even be possible to provide real-time performance parameters of diamond wire saw for the digital twin model of wire sawing. [ABSTRACT FROM AUTHOR]

This paper presents layer‐by‐layer additive manufacturing (AM) of molten metal microdroplets and dielectric materials to fabricate multilayer hybrid circuit boards featuring interdigitated 3D capacitors. The printed metal lines have a low resistance of 5 mΩ/mm, 12 times lower than state‐of‐the‐art conductive inks. Exploiting the advantages of Sn‐based oxide as an ideal candidate for Electrical Energy Storage Systems (ESS), we successfully fabricated an out‐of‐plane capacitor module using a combination of polymer and metal materials. The fabrication process exhibited an exceptional aspect ratio of 16, illustrating the successful incorporation of 20 metal layers in the out‐of‐plane capacitor module. Q factor obtained for the 3D capacitor was in the range of 66–500. Additionally, a fully automated printing technique was employed to produce a multilayer hybrid electrical printed circuit board (PCB), eliminating the need for post‐processing. This streamlined approach presents an efficient and comprehensive solution for the one‐stop printing of intricate electrical circuits. © 2024 The Authors. IEEJ Transactions on Electrical and Electronic Engineering published by Institute of Electrical Engineer of Japan and Wiley Periodicals LLC. [ABSTRACT FROM AUTHOR]

This is a panel paper that discusses the use of Artificial Intelligence (AI) technologies to address production and supply chain level problems in semiconductor manufacturing. We have gathered a group of expert semiconductor researchers and practitioners from around the world who have developed AI solutions for various semiconductor problems. This paper aims to provide their answers to an initial set of questions and provide an overview of the AI developments and empirical studies to make suggestions for future directions in this arena. [ABSTRACT FROM AUTHOR]

Micro-fabricated vapor cells have applications in a number of emerging quantum technology-based devices including miniaturized atomic magnetometers, atomic clocks, and frequency references for laser systems. Increasing the cell optical path length (OPL) and smallest cell dimension are normally desirable to increase the signal to noise ratio (SNR) and minimize the de-polarization rate due to collisions between atomic or molecular species and the cell walls. This paper presents a fully wafer-level scalable fabrication process to manufacture vapor cells with dimensions approaching those of glass-blown cells. The fabrication process is described, and spectroscopic measurements (optical absorption and magnetic resonance) are reported. A magnetic resonance linewidth of 350 Hz is demonstrated, and this is the smallest linewidth reported to date for a micro-fabricated vapor cell. [ABSTRACT FROM AUTHOR]

The simultaneous monitoring of both the process mean and dispersion has gained considerable attention in statistical process control, especially when the process follows the normal distribution. This paper introduces a novel Bayesian adaptive maximum exponentially weighted moving average (Max-EWMA) control chart, designed to jointly monitor the mean and dispersion of a non-normal process. This is achieved through the utilization of the inverse response function, particularly suitable for processes conforming to a Weibull distribution. To assess the effectiveness of the proposed control chart, we employed the average run length (ARL) and the standard deviation of run length (SDRL). Subsequently, we compared the performance of our proposed control chart with that of an existing Max-EWMA control chart. Our findings suggest that the proposed control chart demonstrates a higher level of sensitivity in detecting out-of-control signals. Finally, to illustrate the effectiveness of our Bayesian Max-EWMA control chart under various Loss Functions (LFs) for a Weibull process, we present a practical case study focusing on the hard-bake process in the semiconductor manufacturing industry. This case study highlights the adaptability of the chart to different scenarios. Our results provide compelling evidence of the exceptional performance of the suggested control chart in rapidly detecting out-of-control signals during the hard-bake process, thereby significantly contributing to the improvement of process monitoring and quality control. [ABSTRACT FROM AUTHOR]

Background: Stress measurement for thin films is crucial in a variety of fields such as in semiconductor manufacturing, the optoelectronics industry, and biomedical science, among others. However, most measurement methods require surface treatment of the thin film. Objective: A label-free measurement method for plane stress states in optical isotropic thin films based on spectroscopic ellipsometry analysis is proposed and verified in this paper. Methods: The proposed method is based on the modulation of the stress-optic effect on reflected spectroscopic ellipsometry. A theoretical model is established to describe the relation between all components of the plane-stress state and the classic ellipsometric parameters (Ψ, Δ). An algorithm is developed to determine all components of a plane-stress state by fitting the model to the experiment data. Results: In the verification experiment, we determined the plane stress state of a Cu film coated on a PI (polyimide) substrate. The results show a reasonable agreement between the experimental measurements from spectroscopic ellipsometry and the theoretical analysis based on the applied loading. Conclusion: The results prove that our method can effectively measure the plane stress state of optical isotropic thin films. [ABSTRACT FROM AUTHOR]

This paper proposes a new enterprise intelligentization framework, by making the transition from process transformation to artificial intelligence (AI) transformation. The novel transformation framework can be decomposed into the conceptual model of AI strategic planning, the procedural model, the operational model, and the analytics model. For leading-edge microchip production, a new AI transformation project regarding the reticle SMIF pod (RSP) transport system designed by a medium-sized semiconductor tool vendor in Taiwan is presented. The technical advantages, gained from the implementation of the presented AI transformation project, over the existing RSP systems are manifold. The throughput and yield rate significantly increase on a semiconductor-fabrication-plant basis. The clean room construction costs less by approximately 3 million dollars per FAB, mainly attributed to the redesigned automatic optical inspection flow. The proposed model-based framework proves to be a viable tool from the process transformation to the AI transformation in the semiconductor manufacturing. [ABSTRACT FROM AUTHOR]

Semiconductor wafer manufacturing relies on the precise control of various performance metrics to ensure the quality and reliability of integrated circuits. In particular, GaN has properties that are advantageous for high voltage and high frequency power devices; however, defects in the substrate growth and manufacturing are preventing vertical devices from performing optimally. This paper explores the application of machine learning techniques utilizing data obtained from optical profilometry as input variables to predict the probability of a wafer meeting performance metrics, specifically the breakdown voltage (Vbk). By incorporating machine learning techniques, it is possible to reliably predict performance metrics that cause devices to fail at low voltage. For diodes that fail at a higher (but still below theoretical) breakdown voltage, alternative inspection methods or a combination of several experimental techniques may be necessary. [ABSTRACT FROM AUTHOR]

With the rapid development of intelligent manufacturing and electronic information technology, integrated circuits play a vital role in high-end chips. The semiconductor chip manufacturing process requires precise operation and strict control to ensure chip quality. The traditional manual visual inspection method has a high workforce cost and intense subjectivity and is accompanied by a high level of misdetection and leakage. Computer vision-based wafer defect detection technology is gaining popularity in the industry. However, previous methods still find it challenging to meet the production requirements regarding accuracy. To solve the problem, we propose a defect detection network based on a coding and decoding structure, Dense Skip-Connection U-Net (DSCU-Net), which optimizes the skip connection between the encoder and decoder and enhances the profound fusion of high-level semantics and low-level semantics to improve accuracy. To verify the effectiveness of DSCU-Net, we validate it in actual microelectromechanical systems (MEMS) data, and the results show that DSCU-Net reaches an optimal level. Therefore, the DSCU-Net proposed in this paper effectively solves the defect detection problem in semiconductor chip manufacturing. This method reduces workforce cost and subjectivity interference and improves inspection efficiency and accuracy. It will help to promote further development in the field of intelligent manufacturing and electronic information technology. [ABSTRACT FROM AUTHOR]

In semiconductor manufacturing, defect inspection in non-patterned wafer production lines is essential to ensure high-quality integrated circuits. However, in actual production lines, achieving both high efficiency and high sensitivity at the same time is a significant challenge due to their mutual constraints. To achieve a reasonable trade-off between detection efficiency and sensitivity, this paper integrates the time delay integration (TDI) technology into dark-field microscopy. The TDI image sensor is utilized instead of a photomultiplier tube to realize multi-point simultaneous scanning. Experiments illustrate that the increase in the number of TDI stages and reduction in the column fixed pattern noise effectively improve the signal-to-noise ratio of particle defects without sacrificing the detecting efficiency. [ABSTRACT FROM AUTHOR]

This paper proposes a linear regression model for scalar-valued responses and two-way functional (bivariate) predictors. Our motivation stems from the quality evaluation of products based on optical emission spectroscopy data from virtual metrology of semiconductor manufacturing. We focus on multivariate cases where the smoothness and shapes of the data vary significantly across variables. We propose a two-step solution to this problem, consisting of decomposition and prediction. First, we decompose the two-way functional data into pairs of component functions using functional singular value decomposition. Next, we build functional linear models for the decomposed functional variables and obtain the final predictor by averaging the models. Results from numerical studies, including simulation studies and real data analysis, demonstrate the promising empirical properties of the proposed approach, especially when the number of predictors is large. [ABSTRACT FROM AUTHOR]

In this paper, an ultracompact combined sensor for displacement and angle-synchronous measurement is proposed based on the self-imaging effect of optical microgratings. Using a two-grating structure, linear and angular displacement can be measured by detecting the change of phase and amplitude of the optical transmission, respectively, within one single structure in the meantime. The optically transmitted properties of the two-grating structure are investigated in both theory and simulation. Simulated results indicate that optical transmission changes in a sinusoidal relationship to the input linear displacement. Meanwhile, the amplitude of the curve decreases with an input pitch angle, indicating the ability for synchronous measurement within one single compact structure. The synchronous measurement of the linear displacement and the angle is also demonstrated experimentally. The results show a resolution down to 4 nm for linear displacement measurement and a maximum sensitivity of 0.26 mV/arcsec within a range of ±1° for angle measurement. Benefiting from a simple common-path structure without using optical components, including reflectors and polarizers, the sensor shows ultra-high compactness for multiple-degrees-of-freedom measuring, indicating the great potential for this sensor in fields such as integrated mechanical positioning and semiconductor fabrication. [ABSTRACT FROM AUTHOR]

Summary: As the scale of the integrated circuit increases, the distance between transistors decreases, a trend that reduces the critical charge of the sensitive nodes of the memory cell. Consequently, Static Random Access Memory cells in high radiation environments are very prone to soft errors. A novel radiation‐hardened memory cell, the Polarity Reinforcement Feature (PRF)‐18T, is proposed in this paper, which uses the polarity reinforcement feature to reduce the number of sensitive nodes in the memory cell and can entirely and effectively tolerate single event upset and double node upset. A comparison is made in this paper with DICE‐12T, Quatro‐10T, SEA‐14T, RHBD‐14T, NASA‐13T, and SCCS‐18T memory cells in a simulation environment with Semiconductor Manufacturing International Corporation 55 nm process, the supply voltage of 1.2 V, and temperature of 25°C. In comparison, the PRF‐18T proposed in this paper has the highest critical charge value, improving by more than 15× and 3.1× compared to the DICE‐12T and RHBD‐14T, respectively, and by more than 79% and 17.6% compared to the Quatro‐10T and SEA‐14T, respectively. In the high hold static noise margin comparison, the improvement over the SEA‐14T, DICE‐12T, RHBD‐14T, and Quatro‐10T is 26.7%, 3.8×, 1.5×, and 1.2×, respectively. In the write static noise margin comparison, the results were similar to the Quatro‐10T, DICE‐12T, and SEA‐14T, with a 68.5% improvement compared to the RHBD‐14T. Finally, the robustness of the proposed cell to process, voltage, and temperature variations is verified by temperature change experiments and 2000 Monte Carlo model simulations. [ABSTRACT FROM AUTHOR]

Prospective authors are requested to submit new, unpublished manuscripts for inclusion in the upcoming event described in this call for papers. [ABSTRACT FROM AUTHOR]

We are pleased to announce that the June 2022 issue of the IEEE Transactions on Dielectrics and Electrical Insulation (TDEI) will be a special issue on electrets and related phenomena. This issue is open to all authors. Presenters of papers at the IEEE 18th International Symposium on Electrets (ISE18) to be held during September 24–28, 2021 in Shanghai (China) are especially encouraged to submit their work to this special issue. For more information on ISE18 please go to https://ise18.tongji.edu.cn/. [ABSTRACT FROM AUTHOR]

Prospective authors are requested to submit new, unpublished manuscripts for inclusion in the upcoming event described in this call for papers. [ABSTRACT FROM AUTHOR]

In the current industry, quality inspection in semiconductor manufacturing is of immense significance. Significant achievements have been made in fault diagnosis in fabricated semiconductor wafer manufacturing due to the development of machine learning. Since real-time intermediate signals are non-linear and time-varying, the signals undergo various distortions due to changes in equipment, material, and process. This leads to a drastic change in information in intermediate signals. This paper presents a fault diagnosis model for semiconductor manufacturing processes using a generative adversarial network (GAN). The study aims to address the challenges associated with efficient and accurate fault identification in these complex processes. Our approach involves the extraction of relevant components, development of a paired generator model, and implementation of a deep convolutional neural network. Experimental evaluations were conducted using a comprehensive dataset and compared against six existing models. The results demonstrate the superiority of our proposed model, showcasing higher accuracy, specificity, and sensitivity across various shift tasks. This research contributes to the field by introducing a novel approach for fault diagnosis, paving the way for improved process control and product quality in semiconductor manufacturing. Future work will focus on further optimizing the model and extending its applicability to other manufacturing domains. [ABSTRACT FROM AUTHOR]

Purpose: Wafer bonding is a key process for 3 D advanced packaging of integrated circuits. It requires very high accuracy for the wafer alignment. To solve the problems of large movement stroke, position calibration error and low production efficiency in optical alignment, this paper aims to propose a new wafer magnetic alignment technology (MAT) which is based on tunnel magneto resistance effect. MAT can realize micro distance alignment and reduces the design and manufacturing difficulty of wafer bonding equipment. Design/methodology/approach: The current methods and existing problems of wafer optical alignment are introduced, and the mechanism and realization process of wafer magnetic alignment are proposed. Micro magnetic column (MMC) marks are designed on the wafer by the semiconductor manufacturing process. The mathematical model of the space magnetic field of the MMC is established, and the magnetic field distribution of the MMC alignment is numerically simulated and visualized. The relationship between the alignment accuracy and the MMC diameter, MMC remanence, MMC thickness and sensor measurement height was studied. Findings: The simulation analysis shows that the overlapping double MMCs can align the wafer with accuracy within 1 µm and can control the bonding distance within the micrometer range to improve the alignment efficiency. Originality/value: Magnetic alignment technology provides a new idea for wafer bonding alignment, which is expected to improve the accuracy and efficiency of wafer bonding. [ABSTRACT FROM AUTHOR]

Industrial mixers are equipment used in food, drug, chemical and semiconductor industries. Chaotic mixing has been proposed to improve the degree of homogeneity and reduce the energy consumption. This paper deals with dynamical studies of a mixer model with complex rotational movements. The complexity is generated by an inductance with hysteretic characteristics. Mathematical methods and numerical simulations are used to display the different dynamical states which are period-nT, pulse, bursting and chaotic signals. Good agreement is found between the mathematical and numerical results. In general, it is found that chaos is highly abundant in the model. [ABSTRACT FROM AUTHOR]

The technology of big data analysis and artificial intelligence deep learning has been actively cross-combined with various fields to increase the effect of its original low single field. Precision components commonly used in electronic products use changes in the conductivity of semiconductors to process information. This study aims to review key milestones and recent developments in the semiconductor industry using artificial intelligence methods. For this systematic review, we searched academic networks between 2015 and 2022, including Nature, Elsevier, Springer, Taylor & Francis Online, Multidisciplinary Digital Publishing Institute, and the Institute of Electrical and Electronics Engineers. The literature reviewed is based on conference proceedings and journal articles, specifically covering the key achievements of the discussion paper, the key technologies used, experimental results, opportunities, and future research pathways. After searching on an academic website, we selected six major studies. In five of these studies, visual object detection, surface defect detection, machine production scheduling application, fault diagnosis and prediction, and monitoring of the manufacturing process were made using artificial neural networks, machine learning methods, and hybrid models. In addition, the studies covered independent, single methods or used more than two types of technologies for performance comparison. Finally, we reviewed the strengths and weaknesses of the literature. We also analysed various datasets, acquisition systems, and experimental scenarios. The review shows that as the number of studies conducted in manufacturing continues to increase, more research is needed to unearth key information that is often overlooked, all of which are challenges in refining science and overcoming real-world scenarios. [ABSTRACT FROM AUTHOR]

This paper studies the problem of scheduling machines in the photolithography area of a semiconductor manufacturing facility. The scheduling problem is characterized as an unrelated parallel machine scheduling problem with machine eligibilities, sequence- and machine-dependent setup times, auxiliary resources and transfer times for the auxiliary resources. Each job requires two auxiliary resources: a reticle and a pod. Reticles are handled in pods and a pod contains multiple reticles. Both reticles and pods are used on multiple machines and a transfer time is required if transferred from one machine to another. A novel constraint programming (CP) approach is proposed and is benchmarked against a mixed-integer programming (MIP) method. The results of the study, consisting of a real-world case study at a global semiconductor manufacturer, demonstrate that the CP approach significantly outperforms the MIP method and produces high-quality solutions for multiple real-world instances, although optimality cannot be guaranteed. [ABSTRACT FROM AUTHOR]

Semiconductor manufacturing has been extensively exploiting machine-learning (ML) to process equipment sensory data (ESD) for near-real time anomaly detection (AD). ESD characteristics are highly diversified and data lengths vary among processing steps and cycles. Cleansing ESD with minimum distortion (CMD) to fit the fixed-length input requirement by ML-based AD is critical to AD effectiveness and is challenging. This paper presents a novel CMD method of four innovations: i) statistical mode-based equalization of step data lengths for the least number of step data length changes, ii) importance indicator value (IIV) of a data sample based on its relative difference with the subsequent sample, and iii) step data segmentation into groups based on samples of significant IIVs and the least-entropy-group-to-cleanse-first rule, and iv) cleansing the least IIV sample(s) in the selected group for step data length equalization. CMD application to ESD demonstrates its characteristics preservation property. Simulation experiments are on an integration of data cleansing with an unsupervised ML-based AD system, STALAD. Comparisons with two benchmark methods over AD scenarios of small-scale drifts and shifts show that CMD not only is superior in facilitating accurate detection by STALAD but also helps detect anomaly much earlier than using the two benchmarks. [ABSTRACT FROM AUTHOR]

With the establishment and rapid development of the national carbon emission trading market, new energy system participates in the carbon emission trading market. Analysing the potentiality of virtual power plant trading in carbon emission trading market, this paper designs a two-stage joint trading mechanism for electricity and carbon market with a weekly cycle according to their characteristics, which contain multiple transaction types for both markets. In addition, this paper introduces a carbon capture system (CCS) in gas turbine, which reduces the actual carbon emissions and increases the carbon market income of virtual power plant. Furthermore, it improves the comprehensive and flexible operation capability by adjusting the operation level of CCS, which is conducive to the timely consumption of renewable energy. Aiming at the uncertainty of renewable energy output and electricity price, the paper adopts a multiscenario analysis method to deal with it and establishes a stochastic optimization model to maximize joint earnings. Finally, through example analysis with GAMS, the effectiveness of the scheduling model is verified with simulation results. The overall income of the virtual power plant is improved, and the low carbon power is realized. [ABSTRACT FROM AUTHOR]