This paper presents a novel realization concept for Clock-and-Data-Recovery circuits. Our Design uses a nonlinear phase detector architecture, which is based on the Alexander phase detection method. In order to ensure circuit functionality in the RF region, we use very fast switching HLO-Flip-Flops (high-speed latching operation flip-flop) in our design. The primal goal in our design was the minimization of self induced jitter of the phase detector. The accuracy of our circuit design and the functionality in the GHz regime is confirmed by various circuit simulations executed with the SPECTRE Simulator. [ABSTRACT FROM AUTHOR]
In this paper we discuss the expected impact of quantum effects in nanostructured CMOS circuits. In order to describe transport in mesoscopic electronic systems our group develops a 1-d numerical simulation packet based on the "non equilibrium Green's functions" (NEGF) formalism. By means of the obtained simulation results we develop extended SPICE circuit models. With these SPICE models the influence of quantum effects to the functionality of classical circuit concepts can be studied. Using these results it is our intention to develop circuits with a higher robustness against these quantum effects. For the illustration of our simulation concept we discuss some results of some circuit examples. [ABSTRACT FROM AUTHOR]