Search

This paper presents a novel realization concept for Clock-and-Data-Recovery circuits. Our Design uses a nonlinear phase detector architecture, which is based on the Alexander phase detection method. In order to ensure circuit functionality in the RF region, we use very fast switching HLO-Flip-Flops (high-speed latching operation flip-flop) in our design. The primal goal in our design was the minimization of self induced jitter of the phase detector. The accuracy of our circuit design and the functionality in the GHz regime is confirmed by various circuit simulations executed with the SPECTRE Simulator. [ABSTRACT FROM AUTHOR]