Search

This paper describes a flow control of the dye in the paper mill with the quasi-Z-source indirect matrix converter (QZSIMC) fed induction motor drive. More than a decade the voltage-source inverter (VSI) and current-source inverter (CSI) have been used to control the speed of the induction motor, which in turns controls the flow of dye. Recently, the matrix converter (MC) has been an excellent competitor for the VSI or CSI for its compactness. The voltage transfer ratio of the VSI, CSI, and MC has been limited to 0.866. Thus, the efficiency of these converters is less. To improve the voltage transfer ratio the quasi-Z-source network (QZSN) is to be used between voltage source and indirect MC (IMC). The modification in the shoot-through duty ratio of the QZSN varies the voltage transfer ratio greater than 0.866. Different voltage transfer ratios are needed for different voltage sag conditions. For a variation of the duty ratio of the QZSN, the fuzzy logic controller has been presented. To control the IMC vector control with space vector modulation has been presented. This paper proposes the implementation of QZSIMC adjustable speed drive for the flow control of dye in paper mill during different voltage sag conditions. A 4-kW prototype has been built and the effectiveness of the proposed system is verified with simulation results and experimental setup. Simulation is done in MATLAB, Simulink platform. Experimental setup is done with the aid of a TMS320F2812 (Texas Instrument) processor. The experimental results validate the maintenance of the speed of an induction motor at the set condition, thus controlling the perfect flow of dye in paper manufacturing technology. [ABSTRACT FROM AUTHOR]

[Display omitted] • Aramid-based energy storage capacitor was synthesized by a convenient method. • Electrical breakdown strength was optimized by the interface engineering. • Good dielectric constant thermal stability from RT to 300 °C was achieved. • Our finds promoted the energy storage capacitors in commercial use. Polymer-based dielectric energy storage capacitors show more potential than conventional rigidity ceramic-based capacitors. Recent studies were classified into two categories: the excellent room temperature performance in poly (vinylidene fluoride) (PVDF) systems and the enhanced thermal stability in polyimide-based systems. Only now, however, both of them are still far from commercial use because of their inferior heat resistance or poor processability. By adding BaTiO 3 (BT) particles in maturely used aramid nanofibers, we synthesized the aramid nanofiber (ANF)/BT-based flexible paper capacitors through a convenient industrialized technology in this work. Due to the intrinsic laminated structure of ANF and the uniform distribution of BT particles, the composite film with BT addition of 8 vol% exhibits outstanding dielectric thermal stability. With the help of the interfacial resistance in the organic–inorganic interface, which protected the ANF matrix from being breakdown too early by optimizing the electrical field distribution, a high and stable energy storage density of 6.70 J/cm3 was obtained in ANF/BT5. In addition, excellent energy storage frequency stability with ultrafast discharge speed was also achieved. This work offered a highly repeatable way to synthesize commercially used flexible capacitors, bridging the lab investigation and commercial use in high-power density energy storage polymers. [ABSTRACT FROM AUTHOR]

Graphite, an allotrope of carbon, is also a moderately good conductor of electricity. The shading pencil lead consists of graphite mixed with clay and, therefore, can conduct electricity, allowing one to construct and demonstrate different properties and the underlying concepts of circuit elements. The grade displayed on the pencil relates to the graphite-to-clay ratio, with higher B grades indicating a higher graphite-to-clay ratio. In this paper, the main objective is to show the dependence of resistance and capacitors on different physical parameters and to calculate the value of π electrically. The materials used in this activity are readily available, affordable, and suitable for demonstration purposes. The materials used to perform these activities are shading pencils of different grades, A-4 size papers, crocodile clips, and an LCR meter. [ABSTRACT FROM AUTHOR]

To effectively improve the power density and rate capability of layered double hydroxide (LDH) based supercapacitors, a hybrid supercapacitor (HSC) comprising of hierarchical ultrathin NiAl-LDH nanosheet arrays on carbon nanotube paper (CNP-LDH) is developed with porous graphene nanosheets as the negative electrode for the first time. SEM image shows that hierarchical NiAl LDH nanosheet arrays are assembled by numerous ultrathin nanosheets with thickness of a few to tens of nanometers. Remarkably, with an operating voltage of 1.6 V, the HSC possesses a high energy density of 50.0 Wh kg −1 at an average power density of 467 W kg −1 . Even at a fast discharging time of 3.9 s, a high energy density (23.3 Wh kg −1 ) could also be retained at a power density of 21.5 kW kg −1 . Moreover, the HSC exhibits cycling stability with a retention rate of 78% after 5000-cycle charge-discharge test at 5 A g −1 . The results inspire us to propose our high-performance CNP-LDH as a promising electrode for energy storage applications. [ABSTRACT FROM AUTHOR]

Active thermography using pulsed heating is a fast and reliable method for detecting flaws in composite and metallic materials. This paper analyzes the temperature decay that occurs immediately after flash heating the front surface of stainless steel specimens as a function of time, based on a novel application of the equivalent circuit approach (ECA). The temperature decay from the front surface is equated to the discharge of a capacitor. The ECA is based on the charging (temperature rise due to flash heating) of a capacitor, followed by its discharge (temperature decay) through a series of resistors (which depends on the conductivity of the material) and capacitance (which depends on the thermal capacitance of the layers) through which the heat is dissipated. The proposed approach analyzes the sequences of temperature data obtained at each pixel location during cooling from a step wedge and a specimen with multiple flat-bottom holes. Time constant maps derived from the analysis are used to ascertain the thickness of the step wedge, detect the flaws, and evaluate the remnant thickness of the flaws. A correlation has been established between the thickness and the time constants. The above approach has been used to estimate the diameter of the flat-bottom holes. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase, transformer-less, seven-level inverter that utilizes eight switches, three capacitors, and two diodes to produce seven voltage levels with triple boosting ability. The availability of the common-ground point eliminates the leakage current in PV applications. The proposed Transformer-Less Triple-Boosting Seven-Level Inverter (TLTB7LI) has the ability to feed different types of loads from non-unity to unity power factors. The voltage balancing of capacitors takes place naturally without the need for auxiliary circuits and complicated control strategies. This paper investigates the appropriateness of the proposed TLTB7LI for grid-connected application. The Peak Current Controller (PCC) is employed to generate the switching pulses and regulate the active/reactive power transfer between the converter and the output, which guarantees the high quality of injected current to the output. Moreover, the operational principles, its control technique, as well as the design procedure of the key components of the proposed inverter have been presented. The superiority of the proposed inverter over existing counterparts has been verified through comparative analysis. The simulation and experimental analysis validated the proper operation of the proposed TLTB7LI. [ABSTRACT FROM AUTHOR]

Summary: A setting‐zero analysis method is presented to facilitate the prediction of zeros in multistage amplifiers. The main objective of this method is to simplify the analysis process of such amplifiers while improving the overall performance, and the feasibility is confirmed by various examples presented in this paper. By proposing a single‐capacitor cascode Miller compensation three‐stage amplifier using setting‐zero analysis, this paper has theoretically verified that the addition of a grounding second‐stage compensation capacitor is unnecessary. Measurement results show that this amplifier consumes a current of 38 μA at a 1.2 V supply voltage, with a 103 dB open‐loop gain. When driving a 1 nF load capacitor, this design achieves 1.88 MHz gain bandwidth and 73° phase margin, with a 3.33 V/μs average slew rate and an average 1% settling time of 0.40 μs under the unity‐gain configuration. [ABSTRACT FROM AUTHOR]

Power converters enhance the DC-AC power supply by using multi-level inverters based on switched capacitor technology. The voltage stress on the switches in switched capacitor-based multi-level inverters decreases as the number of switches rises, and vice versa when the number of switches falls. This paper suggests a quadruple boost nine-level inverter based on a switched capacitor with a single voltage source to address this issue. Only nine switches are used in the suggested architecture to implement the inverter with two diodes and two capacitors. Since the diodes and capacitors are linked to the low voltage input side, the total voltage stress of the inverter is kept low even at the elevated for quadruple boost output voltage. The theoretical study, computations, and design parameters of the nine-level inverter are presented in this paper. The switching specifics of the seven-level boost extension topology are also reported in this work. Simulations and laboratory tests on a 120 W inverter prototype have confirmed the viability of the suggested topology. [ABSTRACT FROM AUTHOR]

Lengthened ion pathway in porous carbon cathode, especially under high mass loading and packing state, severely impeded the ion transport, thus leading to a far unsatisfactory energy/power out of Zn//C capacitors. Here, we report a novel kapok-derived quasi-2D thin-walled porous carbon tile (CT) with proper curvature and rich doping used as stacked bricks. Together with high conductivity single-walled carbon nanotubes, a porous yet relatively packed self-standing carbon cathode was constructed, which features a hierarchical ion path including short ion pathways inside thin-walled porous CTs and adequate channels "highways" caused by rational sub-micron interlayer spacing, thus leading to an excellent combination of rate and gravimetric/volumetric/areal performance at practical mass loading (12 mg cm−2). [Display omitted] • A porous thin-walled layered carbon tile with proper curvature was prepared as bricks. • Porous yet packed cathode feathers hierarchical paths for fast ion/charge transfer. • High rate and gravimetric/volumetric capacity remain in high loading cathode. • The areal capacity increases linearly with the mass loading of cathode. Long ion pathway inside large-sized carbon particle or stacked 2D assembly greatly limit the electrochemical performance of practical carbon cathode (>10 mg cm−2) in Zn//C capacitors. Highly porous activated carbon and holy graphene can alleviate such ion-transport issue, but usually suffer from a far lower packing density and severe restacking, respectively. Herein, a kapok-derived quasi-2D thin-walled microporous carbon tile (CT) with optimized curvature and rich doping was developed and used as bricks. Assisted with single-walled carbon nanotubes (SWNTs), a porous yet relatively packed paper cathode was constructed. The unique doped thin wall (∼700 nm) can effectively shorten the ion-penetration pathways from electrolyte deep into pore structure inside CTs, and thus enlarge ion-accessible surface areas. Combined with rational sub-micron interlayer spacing among proper-curved CTs and bridged-like SWNTs, the continuous ion/charge transport "highways" are fabricated. As a result, such self-standing carbon cathode delivers outstanding rate and gravimetric/areal performance (114 mAh g−1/1.37 mAh cm−2) without sacrificing volumetric capacity even at high mass loading (12 mg cm−2). [ABSTRACT FROM AUTHOR]

In this study, the multifunctionality of structural dielectric capacitor made by integrating graphene oxide paper into carbon fibre reinforced composite has been investigated. The study is based on an earlier work on the use of graphene oxide for dielectric material in the structural dielectric capacitor, in which electrical properties have been characterized. In this work, an in-depth study on electrical and mechanical properties of this kind of structural dielectric capacitor have been carried out. In addition, the multifunctional efficiency of structural dielectric capacitors were evaluated and compared with existing structural dielectric capacitors. Through experiments, it is revealed that both electrical and mechanical properties of the structural dielectric capacitors were significantly enhanced by interleaving a graphene oxide paper in the middle of composite. Therefore, the multifunctional efficiency of this kind of structural dielectric capacitors has been ultimately improved, indicating the excellent potential of graphene oxide paper in the development of multifunctional materials for energy storage, potentially for high-strength required applications, such as electric vehicles and unmanned aerial vehicles. [ABSTRACT FROM AUTHOR]

Supercapacitors have drawn numerous attentions in recent years since they can deliver relatively high power and energy densities. This article introduces an all-printed paper based surface mountable supercapacitor (SMS), which could withstand the reflow soldering process when integrated into microelectronic systems. The device was fabricated by screen printing and stencil printing processes, contributing to low cost and large-scale fabrication. Furthermore, building electronic devices on ubiquitous paper substrates had advantages of light weight, low cost, and eco-friendliness, etc. Based on activated carbon electrode material and ionic liquid electrolyte, the capacity of the supercapacitor could reach 14 mF at the device volume of 3.2 mm ? 2.5 mm ? 0.175 mm, besides, the specific volumetric capacity was superior than most of the commercial SMS devices. [ABSTRACT FROM PUBLISHER]

Electronic capacitors were constructed via hand-printing on paper using pencil graphite. Graphite traces were used to draw conductive connections and capacitor plates on opposing sides of a sheet of standard notebook paper. The paper served as the dielectric separating the plates. Capacitance of the devices was generally < 1000 pF and scaled with surface area of the plate electrodes. By combining a pencil-drawn capacitor with an additional resistive pencil trace, an RC low-pass filter was demonstrated. Further utility of the pencil-on-paper devices was demonstrated through description of a capacitive force transducer and reversible chemical sensing. The latter was achieved for water vapor when the hygroscopic cellulose matrix of the paper capacitor’s dielectric adsorbed water. The construction and demonstration of pencil-on-paper capacitive elements broadens the scope of paper-based electronic circuits while allowing new opportunities in the rapidly expanding field of paper-based sensors. [ABSTRACT FROM AUTHOR]

In photovoltaic grid-connected systems, the interaction between grid-connected inverters and the grid may cause harmonic oscillation, which severely affects the normal operation of the system. To improve the quality of the output electrical energy, photovoltaic grid-connected systems often use LCL filters as output filters to filter out high-frequency harmonics. Taking the three-phase LCL-type photovoltaic grid-connected inverter system as an example, this paper addresses the issue of harmonic resonance. Firstly, based on the harmonic linearization method and considering the impact of the coupling compensation term on the grid-side voltage, a modular positive and negative sequence impedance modeling method is proposed, which simplifies the secondary modeling process of the converter under feedback control. Then, the stability analysis is conducted using the Nyquist criterion, revealing the mechanism of high-frequency resonance in photovoltaic grid-connected systems. Furthermore, this paper delves into the impact of changes in system parameters on impedance characteristics and system stability. The results indicate that the proportional coefficient of the internal loop current controller has a significant influence on system impedance characteristics. Additionally, this paper proposes an active damping design method that combines lead correction and capacitor current feedback to impedance-reconstruct the easily oscillating frequency band. Finally, the effectiveness of this method is verified in the simulation platform. Simulation results confirm the effectiveness of this method in suppressing harmonic resonance while maintaining rapid dynamic response. [ABSTRACT FROM AUTHOR]

The identification and quantification of chemicals play a vital role in evaluation and surveillance of environmental health and safety. However, current techniques usually depend on costly equipment, professional staff, and/or essential infrastructure, limiting their accessibility. In this work, we develop paper-based capacitive sensors (PCSs) that allow simple, rapid identification and quantification of various chemicals from microliter size samples with the aid of a handheld multimeter. PCSs are low-cost parallel-plate capacitors (~$0.01 per sensor) assembled from layers of aluminum foil and filter paper via double-sided tape. The developed PCSs can identify different kinds of fluids ( e.g. , organic chemicals) and quantify diverse concentrations of substances ( e.g. , heavy metal ions) based on differences in dielectric properties, including capacitance, frequency spectrum, and dielectric loss tangent. The PCS-based method enables chemical identification and quantification to take place much cheaply, simply, and quickly at the point-of-care (POC), holding great promise for environmental monitoring in resource-limited settings. [ABSTRACT FROM AUTHOR]

Industrial applications tend to involve a substantial assemblage of electronic devices, and it is imperative to consider diverse charging requirements while charging these devices. This paper proposes a three‐coil single‐input‐and‐dual‐output (SIDO) inductive power transfer (IPT) system to meet the charging requirements of different devices. The system includes two independent output ports, providing constant voltage (CV) output and constant current (CC) output for different loads, respectively. In addition, the zero‐phase angle (ZPA) operation can be achieved, thus avoiding injection of reactive power and improving energy transfer efficiency. Unlike previous related studies, the receiver of the proposed SIDO IPT system only includes one receiving coil to pick up energy, eliminating unnecessary cross‐coupling and complex decoupling circuits in traditional IPT systems with multiple outputs. This study first analyzes the CC/CV output theory of the proposed SIDO IPT system in detail, and designs and optimizes the parameters by establishing an equivalent model. Then, the conditions for achieving zero‐voltage switching (ZVS) operation of the inverter are obtained by analyzing the sensitivity of CC/CV performance to the variation of the compensation capacitors. Finally, a verification experimental prototype with 2.5A CC output and 72 V CV output is established to verify the effectiveness of the proposed IPT system. [ABSTRACT FROM AUTHOR]

In this paper, a new modular‐isolated‐forward‐based active snubber cell (SC) for power switches is designed. In the proposed new SC, the zero voltage transition (ZVT) technique is implemented with a forward converter although the current counterparts generally use a flyback converter. In the converter with the new SC, the main switch is turned on with ZVT (full zero voltage switching [ZVS]) and turned off with ZVS, the main diode is turned off with zero current switching (ZCS), the auxiliary switch is turned on with ZCS and turned off with ZVS, and the parasitic capacitor energies are recovered. In addition, thanks to the forward converter, it has been possible to minimize the transformer leakage inductance and greatly reduce the current values of devices in the new SC. The new cell is applied to a single‐phase, grid‐connected, T‐type three‐level inverter (T2‐3LI) as an example. A detailed steady‐state analysis of this inverter was made, and the theoretical analysis was confirmed with measurement results taken from a prototype with 100 kHz and 3.3 kW values. Compared to its hard switching (HS) equivalent, in the converter with soft switching (SS) cell, the total circuit loss was reduced from about 248 W to 86 W, thus achieving an increase in the total efficiency from 92.5% to 97.4%. [ABSTRACT FROM AUTHOR]

Summary: The article proposes a new DC‐link voltage balancing method for a single‐phase, five‐level DC/AC neutral point clamped (NPC) inverter. Nowadays, the NPC converter is a suitable solution for various applications; however, the unequal voltage of the DC‐link capacitors is a significant disadvantage of this topology. In this paper, a simple auxiliary unit is inserted in the DC‐link to enable a self‐balancing capacitor voltage. The auxiliary circuit is composed of two capacitors and four active switching devices. The idea of the proposed method is to construct an active DC‐link bus; thus, the two DC‐link capacitors can be connected in series during the charging process and in parallel during the discharging process. As a result, its capacitance and root mean square (RMS) current are greatly reduced. Unlike other auxiliary circuits, the new method requires no additional storage elements or complex control systems. The operating principle and switching schemes are analyzed. The effectiveness of the introduced method is evaluated experimentally using the balancing circuits under different load conditions and different value of modulation indices. [ABSTRACT FROM AUTHOR]

This paper discusses in detail a new 17-level inverter that employs a switched-capacitor (SC)-based configuration. The proposed SC-based inverters require just a single DC power supply, three capacitors, four diodes and 13 switches. The peak inverse voltage of the proposed 17-level SC-based inverter half-bridge is cut in half when compared to the prior arrangement, which was published not long ago. The blocking voltage is reduced by an order of magnitude as well. Many of the features of the proposed SC-based inverter, such as a high boosting gain factor (G) of eight times, self-balanced capacitor voltage and decreased voltage ripples in capacitors, have been carried over to other SC-based MLIs. The circuit description, working theory, PWM modulation techniques and capacitor voltage ripples are all examined. Finally, the results of the experiments show without a doubt that the proposed SC-based inverter can be made. [ABSTRACT FROM AUTHOR]

A power tracking method based on improved variable‐step perturbation observation approach has been proposed in this paper. This method is aimed at addressing the detuning issues caused by capacitor parameter drift in MCR‐WPT systems based on S‐S compensation circuits. Compared with traditional tuning methods, the proposed method has fast response, high accuracy, low complexity, and less prone to over‐tracking. Firstly, a mathematical model of the system based on the detuning factor has been established. Secondly, the impact of different detuning conditions on the system at the initial resonant frequency has been studied. Thirdly, the response characteristics of the system to different frequencies under different detuning conditions have been studied. Fourthly, based on the above researches, an improved variable‐step perturbation observation method based on the single‐step power drop factor has been proposed. Finally, an experimental platform was constructed, and relevant experiments were conducted. Experimental results validate the effectiveness of power tracking under different detuning conditions, with the lowest transmission efficiency being 81.51%. [ABSTRACT FROM AUTHOR]

Summary This paper describes a novel seven‐level (7L) inverter. The suggested topology offers a 7L output voltage and a threefold gain by using proper capacitor values. The suggested topology reduces the spike current induced by the capacitor by the use of a resonant inductor. The suggested inverter's performance under various loads and situations is compared with those found in existing literature. The simulation findings confirm the system's strong performance in terms of component count, control circuit simplicity, and possible cost reductions, while retaining similar or enhanced performance metrics as compared with the aforementioned topologies. A laboratory setup is used to validate the feasibility of the suggested topology and provide solid evidence of its effectiveness. Furthermore, discussions about the possible uses of this structure in energy conversion are conducted. [ABSTRACT FROM AUTHOR]

This paper introduces a resonant switched capacitor converter (RSCC) topology that enhances the operational efficiency by utilizing devices with reduced ratings. The RSCC eliminates bulky magnetic elements, yielding increased power density, modular structure, and compact size compared with switched inductor topologies. Significantly, all the switched capacitors in the proposed converter and approximately 50% of the switching power devices are explicitly rated for the input voltage enabling its use for high‐power applications. A compact inductor is utilized for resonant operation, and the switching frequency of the converter is significantly reduced leading to reduced switching losses and improved efficiency. Zero current turn‐ON and turn‐OFF of the switching devices is achieved. Elimination of load‐side bulky capacitor using inherent output voltage ripple reduction is achieved by aligning the switching phases of the converter such that individual capacitor voltage ripple gets cancelled out. The work extensively covers the analysis of the converter in steady‐state and the effect of non‐idealities during the resonant operation. Further, a detailed design of the topology with a discussion on component selection is presented. The operation of the proposed converter is systematically analyzed through a series of simulation results generated, and the converter is further validated by developing an experimental prototype at a power of 200 W with an efficiency of 95.83%. [ABSTRACT FROM AUTHOR]

This paper presents a novel topology for Z-source inverters (ZSI). The new Z-Source network is based on the coupled-inductors and active switched boost. Features of the topology include high voltage boost ability, single magnetic-core, low voltage stress on the active switch, and capacitors. The principles of operation, analysis, voltage and current equations of each component, and the converter voltage gain in the steady-state are presented. A comparison with other topologies has also been performed to determine the advantages and disadvantages of the proposed ZSI. Finally, experimental results of the laboratory prototype are presented to confirm the performance of the proposed topology. [ABSTRACT FROM AUTHOR]

The present paper is concerned with a magnetorheological (MR)-damper-based vibration-reduction system with energy harvesting capability considering sprung mass changes. The system represents a mechanical harmonic oscillator with electrical coupling, set in motion by kinematic excitation. The authors examine the system performance in the case when the MR damper control coil (damper control coil) is powered directly by the alternating current resulting from the voltage generated in an electromagnetic harvester in the assumed frequency range of sine excitation. Such a system is able to attenuate vibration in the near-resonance frequency range when the current in the damper control coil increases; however, its drawback is vibration amplification at higher frequencies. To eliminate this negative feature, it is proposed to connect shunt capacitors in parallel with the damper control coil. Then, the system can be tested experimentally in terms of current in the damper control coil, sprung mass, and the capacity of shunt capacitors in order to evaluate system performance according to the assumed performance index. The obtained results demonstrate significant improvement in system performance at higher frequencies of excitation. [ABSTRACT FROM AUTHOR]

With the increasing demand for high energy density and reliable dielectric capacitors in the field of power electronics, the research and manufacture of ceramic capacitor materials face significant challenges. At present, the traditional design ideas of dielectric ceramic materials have gradually formalized, and the system is complex and similar, whether it can design dielectric ceramic materials with high performance from a new viewpoint and explore the underlying mechanism remains a great challenge. This paper is based on ceramic capacitors with high energy storage performance, a series of high-entropy perovskite oxide ceramics designed by the concept of "entropy engineering" in the past five years are reviewed. The relationship between microstructure and macroscopic energy storage performance of materials is discussed based on the four effects of high-entropy ceramics. We predict that "entropy engineering" will be a successful strategy to break through the bottleneck of dielectric materials with high energy storage performance. This review guides the custom design of composition-structure-properties in high-entropy energy storage ceramics. [ABSTRACT FROM AUTHOR]

In this paper, using a combination of pulse testing measurements and piezoresponse force microscopy (PFM), an investigation of the polarization reversal behavior and the accompanying resistive switching in the Al0.72Sc0.28N thin film capacitors is reported. The obtained results reveal a transition from the nucleation‐limited switching (NLS) in the low field range toward the more uniform switching described by the Kolmogorov–Avrami–Ishibashi (KAI) model in the high field range. It is found that the Al0.72Sc0.28N capacitors exhibit an unusually steep change in the switching time– it decreases by five orders of magnitude with a moderate increase of the applied field. This feature is caused by a significantly higher activation field value (≈126 MV cm−1) in comparison with the conventional perovskite ferroelectrics. PFM visualization of the field‐induced domain dynamics has allowed the evaluation of the nucleation rate and domain wall velocity. Furthermore, capacitors in the polydomain state generated by partial switching of polarization exhibit a significant (up to two orders of magnitude) increase in the steady‐state conductance. This effect is likely caused by the injection of strongly inclined conducting 180° domain walls. Resistance tunability offers additional functionalities to the Al1‐xScxN devices where conductive domain walls are used as active elements. [ABSTRACT FROM AUTHOR]

This paper presents a novel generalized step‐up switched‐capacitor multilevel inverter (SCMLI) appropriate for low/medium voltage input applications. To reduce the overall number of power switches, the suggested topology makes use of reduction switch count (SC) technology. The complementary working mechanism of each pair of switches simplifies the modulation method. The complete inductive‐load capability is taken into account in the proposed inverter. Furthermore, because capacitor voltages are automatically balanced, complex voltage control circuitry is not necessary. Due to a reduction in current spikes on the devices, the topology also has the ability to soft‐charge the capacitors in a quasi‐resonant manner. Performance is also enhanced by extending the lifetime and dependability of the inverters. The construction, operation, modulation method, values of the capacitors, and circuit losses are explained to demonstrate how the suggested topology should function. One of the inverter's primary differentiators from the others is its double‐boosting capability based on reduced components. Based on loss calculations, a thorough analysis of the suggested topology's efficiency of 98.31% is presented. Next, the benefits of the suggested inverter are compared to those of other inverters that have been recently suggested. The steady‐state and dynamic performance of the suggested topology is then confirmed by modeling the system on the Simulink platform and performing experiments using a DSP‐based prototype experimental setup. [ABSTRACT FROM AUTHOR]

This paper presents a high-resolution 18-bit SAR ADC with a high 10-bit capacitor DAC and a low 8-bit resistor DAC. The total required number of the unit capacitors is decreased to 512. Foreground digital calibration based on capacitive recombination is introduced to improve linearity. Preamplifiers and output offset storage(OOS) enhance the noise and offset performance of the comparator. As a result, the design under 180 nm process achieves a signal-to-noise and distortion ratio(SNDR) of 105.5dB and a spurious-free dynamic range (SFDR) of 116.3dB under 1 MS/s sampling rate with a single channel. The effective number of bits (ENOB) can reach 17.23 bits with a Nyquist-rate input while consuming 46 mW from a 5 V supply. The resultant Schreier and Walden figures of merit (FoM) are 178.92 dB and 295.34 fJ/conversion-step, respectively. The proposed SAR ADC occupies an actual area of 3850 μ m by 2810 μ m. [ABSTRACT FROM AUTHOR]

Capacitors are crucial components in power electronic converters, responsible for harmonic elimination, energy buffering, and voltage stabilization. However, they are also the most susceptible to damage due to their operational environment. Accurate temperature estimation of capacitors is essential for monitoring their condition and ensuring the reliability of the converter system. This paper presents a novel method for estimating the core temperature of capacitors using a long short-term memory (LSTM) algorithm. The approach incorporates a continued training mechanism to adapt to variable load conditions in converters. Experimental results demonstrate the proposed method's high accuracy and robustness, making it suitable for real-time capacitor temperature monitoring in practical applications. [ABSTRACT FROM AUTHOR]

Model predictive control (MPC) is recognized as an efficient control method for the modular multilevel converter (MMC), owing to its advantages, such as good robustness, rapid dynamic response, and multi-objective control. However, due to the coupling relationship between the ac-side current and the circulating current, the existing MPC has an impact on the ac-side current while suppressing the circulating current. In this paper, the relationship between the ac-side current performance and circulating current suppression is discussed in detail, and a three-stage MPC (TS-MPC) strategy is proposed to optimize the comprehensive performance. With the ac-side current control, circulating current control, and comprehensive optimization control, the optimum performance of both the ac-side current and circulating current suppression is realized while maintaining a low computational burden. Moreover, a grouping sorting algorithm is designed to reduce the calculation burden and to balance the capacitor voltages. The steady-state and transient performances of the proposed TS-MPC strategy have been verified by experimental results, which validates its correctness and effectiveness. [ABSTRACT FROM AUTHOR]

Summary: The four‐level hybrid clamp converter (4L‐HCC) is one of the next‐generation multilevel topologies due to its simplified structure and excellent performance. However, it consists of several DC‐link and flying capacitors, which must be precharged to the rated voltage before the normal operation. Without proper control, those internal capacitors could easily induce inrush currents and cause system fatal failure due to the unsymmetrical circuit structure. This paper proposes soft start‐up control methods for both single‐phase and three‐phase HCCs. The precharging mathematical models of DC‐link and flying capacitors are established. A straightforward algorithm using the selected switching states and rotating regions is developed to build precharging circuits properly. A full‐scale simulation model and a downscale laboratory prototype of the 4L‐HCC are established to validate the superiority of the proposed method. Results demonstrate that the proposed approach is effective in charging all capacitors through internal elements rapidly with suppressed and controllable charging currents. [ABSTRACT FROM AUTHOR]

Summary: The modular‐multilevel converter (MMC) faces the problem of second order ripples in the sub‐module DC capacitor voltage during the low frequency operation at the load side. To sort out this problem, this paper demonstrates a three‐phase modified MMC that includes a novel circuit placed between upper and lower arms of each phase, where load is connected through proposed circuit. The aim of the proposed circuit is to reduce the magnitude of the ripples in each sub‐module's DC capacitor voltage; moreover, it also uses a less number of components compared with the conventional circuits. In order to keep the capacitor voltage at its rated value and to prevent the development of common mode voltage, the proposed circuit uses the high frequency‐based power transfer control channel for balancing power between the upper or top and lower or bottom arms. Furthermore, the mathematical analysis, operating principle, and proposed control is explained in detail for the conventional MMC and modified MMC. The simulation results have been obtained for the modified MMC with resistive load by using MATLAB and Simulink. An experimental test results have been verified with simulation results for the modified MMC topology. [ABSTRACT FROM AUTHOR]

Conventional 5-level active neutral-point-clamped (5L-ANPC) topology and state-of-the-art 5-level hybrid active neutral-point-clamped (5L-HANPC) topology are popular for inverter applications. However, their dc-link voltage utilization is limited to only 50%. With the maximum voltage level generated by only half dc-link voltage, these inverters are not capable of boosting voltage in their ac output. To resolve these drawbacks, this paper proposes a family of four novel 5-level boost-active neutral-point-clamped (5L-BANPC) inverters. Without requiring any flying capacitors, the proposed topologies can generate five voltage levels by effectively using the dc-link capacitors. The dc-link voltage utilization of the proposed 5L-BANPC inverters is twice that of the 5L-ANPC and 5L-HANPC topologies. While generating the five-level ac output voltage, natural voltage balancing of both dc-link capacitors and voltage boosting are achieved. Ease of implementation is another noteworthy merit of the proposed 5L-BANPC inverters because they can be implemented using six widely available commercial half-bridge modules without requiring a dedicated circuit design. The operation of the proposed topologies is analyzed. Experimental results are presented for verification. [ABSTRACT FROM AUTHOR]

Trans-impedance amplifier (TIA) based capacitance–voltage (C–V) readout circuits are widely used in micro-machined gyroscopes' control system. In this work, the noise performance of a TIA and charge sensitive amplifier (CSA) based C–V readout circuit is analyzed in detail. The theoretical derivation and simulation experiments carried out in this paper show that the thermal noise of high value feedback resistors in TIA dominates the output noise of the circuit, while a CSA-based readout circuit can overcome this shortcoming. Then, a CSA-based C–V readout circuit is designed with a 1.8 V transistor on a 180 nm complementary metal-oxide-semiconductor. This C–V-based readout circuit occupies an area of 0.039 mm2, which is smaller than the area of a 0603 package resistor. When 1 V bias voltage (Vb) is added to the capacitors under test, the tested C–V gain of this circuit is as high as 225 dB, and the tested output noise of the circuit is less than 150 n V / H z . Finally, the fabricated chip achieved a resolution of 840 z F / H z at Vb as low as 1 V. This CSA-based C–V readout circuit has more advantages in terms of noise and area over the TIA circuit and is more suitable for integration into the interface integrated circuit for micro-gyroscopes. [ABSTRACT FROM AUTHOR]

In this paper, a new structure for a 1-bit full adder is proposed based on dynamic logic methodology, which utilises pass transistors. The clocking operation falls into two phases. The clocking operation consists of a pre-discharged cycle, during which pseudo capacitors are reset to zero when the clock signal is high, and an evaluation cycle, during which the circuit outputs the adder function when the clock signal is low. The circuit uses a combination of 12 pass-transistors to better implement the full adder logic function with the maximum of a NMOS threshold voltage drop. Moreover, the circuit has no direct connection to the power-supply node and so this can possibly save the power dissipation. Our new adder outperforms other 1-bit full adder structures in terms of power-delay factor, according to simulation results. [ABSTRACT FROM AUTHOR]

Summary: The present study is devoted to articulating a modified folded‐cascode circuit, to make folded‐cascode structures an attractive configuration as a transimpedance amplifier (TIA) for being employed in Giga‐bit per second optical communication receiver systems. Giga‐bps communication receivers are highly necessitating circuits to isolate the input parasitic capacitance of the photodiode. The present modification makes folded cascodes comparable to the famous regulated cascode (RGC) structures by isolating this parasitic capacitor almost by the same quantity. The system is shown to be capable of operating at 2.5 Gbps up to 8 Gbps data rate with a fixed bandwidth. The paper analyzes and evaluates the designed circuit mathematically, and the obtained simulated results from Cadence using TSMC 65 nm CMOS validate the suitability of the modified circuit as a TIA. [ABSTRACT FROM AUTHOR]

This article presents a novel 3-Φ inverter that operates from a single direct current source and is based on the idea of switched-capacitor (SC) techniques. Each phase leg of the proposed topology (PT) consists of eight switches, two capacitors, and a diode. This configuration enables the generation of seven levels (line-to-line) voltage waveforms. The proposed design has several advantages, such as the capacitors' natural balancing, the ability to boost, minimum voltage stresses on the power switches, and fewer switching components. When compared to the conventional two-stage design, single-stage dc–ac power converters with boost capabilities present an intriguing option. This paper introduces a novel boost-type inverter for use in a wide variety of applications, including rolling mills, fans, pumps, maritime appliances, mining, tractions, and more. The study explains the proposed design, principle, control mechanism, and loss analysis in great depth. The advantages of the PT have been demonstrated through comparison with recently published SC topologies. Finally, a 1550-W downscale prototype is used to experimentally verify its viability and performance, with an estimated efficiency of around 96.6%. [ABSTRACT FROM AUTHOR]

Modular multilevel converter-based solid-state transformers (MMC-SST) usually use the input series output parallel structure or the dual active bridge (DAB) structure. These two structures suffer from low power supply reliability and high economic costs, respectively. Therefore, based on hybrid frequency modulation, this paper proposes an arm integrated double capacitor submodule (AIDCSM)-type MMC-SST topology. This topology effectively reduces the number of switching devices by integrating the submodule arms, while enabling the topology to possess DC short-circuit fault ride-through capability. When compared to the DAB-type MMC-SST with half-bridge submodules, the proposed AIDCSM-type MMC-SST saves 2/5 switching devices and 1/2 high-frequency transformers, and enables uninterrupted operation under DC short-circuit faults. At the same time, the control strategy of the proposed AIDCSM-type MMC-SST is thoroughly investigated under both normal operating and DC short-circuit conditions. Simulation and experimental results demonstrate the correctness and effectiveness of the proposed topology and control method. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMC) have the characteristics of high modularity, good availability and high-power quality. Thus, they are widely used in medium and high-power applications. To meet large capacity application requirements, a large number of capacitors is applied in parallel and series. However, capacitors are one of the most vulnerable components in MMCs. To identify abnormal capacitors, a condition monitoring method for capacitors is proposed in this paper using the cumulative sum detection of the sliding window algorithm. First, the bilateral cumulative sum algorithm of the sliding window is proposed to extract the switch-on time and switch-off time of the submodules (SMs). Second, the capacitance is calculated using the monitored capacitor voltage and arm current during the switch-on status. Finally, the accuracy and effectiveness of the proposed method are verified by an MMC system operating condition simulated experiment platform. The proposed condition monitoring method simplifies the calculation of capacitance with a high accuracy by removing the requirement of measuring the switching signal. In addition, it does not have an adverse influence on the normal operation of MMC systems. [ABSTRACT FROM AUTHOR]

A newly designed third-order mixed-mode orthogonally tuned quadrature oscillator, generating sinusoidal voltage and current waveforms, is introduced in this paper. The reported circuit is realized using two dual-X current conveyor transconductance amplifiers (DXCCTAs), two active MOS-based grounded resistors and three grounded capacitors. MOS-C realization of the proposed oscillator with all grounded capacitors is the best choice for modern integration. In this study, the ideal and non-ideal analyses and frequency stability aspect of the circuit are elucidated. The proposed third-order oscillator circuit has the advantages of orthogonally controllable frequency of oscillation & condition of oscillation, very good operating frequency (34.25 MHz) and low total harmonic distortion (within 1.8%). The theoretical analyses have been validated by both pre-layout and post-layout simulations using general process design kit 0.18 μ m technology and the results have been compared with relevant state-of-the-art works. Layout of the used active block, DXCCTA, is developed with Cadence Virtuoso that measures an area of 38 μ m × 2 1 μ m. [ABSTRACT FROM AUTHOR]

This paper presents an investigation into the performance of radial distribution systems (DS) with the installation of series capacitors in feeder sections. While the use of shunt capacitors to enhance voltage profile in DS has been acknowledged, the benefits of series capacitors have only been explored to a limited extent. Load flow analysis, while commonly used for offline evaluation of DS, can at times yield inconclusive results due to convergence issues. To mitigate this, an alternative approach is proposed using Artificial Neural Networks (ANN) to directly determine system performance. The viability of the proposed technique is evaluated for IEEE 12 and IEEE 33 bus DS's having series capacitor in feeder section for voltage improvement and line loss minimization. Therefore, this paper serves to contributes to the two main novelties namely, (1) Development of efficient ANN model to directly determine the maximum voltage regulation and line losses and (2) improvement of voltage and line losses reduction through series capacitor installation in feeder section of the DS. The results show that the utilization of an ANN model enhances accuracy and speeds up predictions, while the installation of series capacitors in feeder sections improves voltage regulation and reduces line losses. [ABSTRACT FROM AUTHOR]

This paper presents the performance analysis of a five-level T-type multilevel inverter (MLI) based six-phase induction motor drive (SPIMD) for high-power industrial applications. In the adopted T-type MLI, the sensorless self-capacitor voltage balancing control is designed, which controls the voltage across the capacitor at half the magnitude of the direct current (DC) source value, creating a symmetrical five-level output voltage waveform. Moreover, self-capacitor voltage balancing control reduces complexity and improves system performance. The SPIMD with distributed neutral is taken as the load, and the whole system is simulated using MATLAB/Simulink software. The system's performance is determined by considering the power loss and efficiency. This paper also presents a comparative performance analysis of the adopted T-type, cascaded h-bridge (CHB) and Flying Capacitor (FC) MLI-based SPIMD. Finally, a prototype is developed as a proof of concept and tested experimentally to validate the analytical development of the adopted system. [ABSTRACT FROM AUTHOR]

The capacitor voltage unbalancing is the common problem in modular multilevel converter. This problem occurs even at the fundamental frequency due to the modulation technique which generates the unequal periods of the gate signals. To reduce this problem, this paper introduced a new submodule (SM)-based modular multilevel converter (MMC). The proposed MMC can generate the 2N + 1 level at the load side. By properly controlling the arm current of the converter, DC capacitor voltage in each submodule is balanced at its base voltage and improves the circulating current during unequal periods of the gate signals without using controller. This paper presents the performance of new submodule-based modular multilevel converter. Finally, the proposed converter is compared with the conventional modular multilevel converter topologies with and without third harmonic injection method. Further the proposed structure and presented techniques have been simulated in the MATLAB/SIMULINK, and the practical implementation has been done using hardware-in-the-loop (HIL) test. [ABSTRACT FROM AUTHOR]

In this paper, a portable low-power low dropout regulator (LDO) with no output capacitance has been designed in 0.18- μ m CMOS technology. In this paper, a PMOS power transistor is used and combined with an overshoot and undershoot suppression circuit to improve the transient response of the circuit. A modified Class-AB operational transconductance amplifier (OTA) is used to reduce power consumption and act as an error amplifier to eliminate low frequency poles. At the same time, a super source follower and a Miller capacitor are used for frequency compensation of the system. Finally, the system can provide a stable voltage for a load step from 0.2 to 25 mA in 500 ns edge-time for 140 pF-load capacitance. The test results show that the circuit achieves a good voltage regulation rate and high transient response. [ABSTRACT FROM AUTHOR]

Nano gap capacitors have recently received significant interest as a key component in a wide range of implementations including photonics, Nanoelectronics, and sensing applications. Many exploratory research projects are being conducted to investigate the electrical characteristics of these nano capacitors. One essential issue that this paper addresses is the need for highly sensitive nano gap capacitors which can be adopted for ultra-low power sensing implementations. In this paper, gold is utilized as the electrode material owing to its superb chemical stability, electrical conductivity, and biocompatibility. The fabrication process is started by designing the mask namely nano gap pad electrodes using AutoCAD software. Subsequently, the designs are finally transferred and fabricated onto a chrome glass surface. In this work, after a combination of conventional photolithography and size reduction approach used to fabricate the device, conventional photolithography is applied to transfer the nano gap pattern onto the gold surface. In order to achieve the desired dimension of the nano gap, a size reduction technique is employed. Describe the most important thing in 2-3 sentences only). Visual inspection using a High Power Microscope (HPM), 3D nano profiler, X-Ray diffractions (XRD), and Field Emission Scanning Electron Microscope (FESEM) have been employed to observe and validate the fabricated structures. Results show that a 2.5 nano Ampere is measured as the applied voltage increases to 10 mV. This firmly demonstrates the ultra-low power consumption, several Pico watts, of these nano gap capacitors. Further, our findings show that the fabricated 4nm gap structure can achieve an approximately 300 nano farad capacitor at low frequencies, which is advantageous for adoption in highly sensitive biosensors. [ABSTRACT FROM AUTHOR]

Purpose: This paper aims to better design the resonant tank parameters for LLC resonant converter. And, it is found that under heavy load, the voltage gain is affected by junction capacitors of the primary side switching and the parasitic parameters of the secondary side diodes converted to the primary side, which will cause the voltage gain decreased when the switching frequency decreased. Design/methodology/approach: This paper proposes an optimization parameters design method to solve this problem, which was based on impedance model considering the parasitic parameters of switching devices and diodes. Findings: The effectiveness of the proposed method is verified by impedance Bode plots and experimental results. Originality/value: From the perspective of impedance modeling, this paper finds the reasons for the insufficient voltage regulation capability of LLC resonant converters under heavy load and finds solutions through analysis. [ABSTRACT FROM AUTHOR]

A capacitor formed of fluid-impregnated paper metalized on one side and a polymer film results in a relaxation peak caused by the much more rapid polarization of the dielectric fluid impregnated paper relative to the polymer film. This results in the capacitance being a function of frequency, with a substantial increase in capacitance at very low frequencies. A theory for such a capacitor is developed and compared with measurements on actual capacitors with relatively good agreement. The implications of the theory for discharge current and discharge efficiency are discussed. [ABSTRACT FROM AUTHOR]

In this paper, hierarchical structure design method is proposed for improving the dielectric performance of polypropylene (PP) for metallized film capacitors. The results show that the composite film with 0.02 wt% terephthalaldehyde doping and functional layer thickness occupying 25% shows the best dielectric properties. The leakage conductivity declines by 89.0%–94.3%, the DC breakdown strength grows by 15.6%–19.7% and the discharged energy density improves by 50.6%–53.4%. Terephthalaldehyde doping introduces sites that could capture free holes, thereby blocking the carrier migration path. The hierarchical structure design results in the holes accumulating in the functional layer and the reverse electric field formed suppresses the charge injection from the anode. Furthermore, the probability of intrinsic charge excitation due to the band gap width reduction is greatly reduced. The method provides a reference for improving the dielectric performance of PP films from the perspective of regulating the charge transmission behavior. [ABSTRACT FROM AUTHOR]

This paper presents a background calibration method assisted with noise-shaping, for a 10-b bridged SAR ADC. It proposes calibrating the mismatches from the MSB capacitors using the LSBs. First-order noise-shaping has been employed to facilitate the calibration as well as the analog-to-digital conversion. Since noise-shaping is able to shape both the comparator input and quantization noise, it is expected to improve the calibration effects as well as the SNR, for the SAR ADC. Measurement results show, upon the proposed calibration, the SAR's INL and SNR are improved by 3 LSB and 9 dB, respectively, compared to when the noise shaping is off. Fabricated using a 55 nm CMOS MOMCAP technology and tested with a −2.5 dB sinewave input, the bridged SAR ADC achieves an SNR of 62.2 dB and an INL better than 1 LSB, when consuming a power of 7 2 μ W , at a supply voltage of 1.2 V and sampling frequency of 50 kHz. The ADC's active area is 3 0 0 × 3 8 0 μ m 2 . [ABSTRACT FROM AUTHOR]

Measurements of capacitors made with paper sheets reveal a significant decrease in capacitance with increasing frequency from 10 to 100,000 Hz, offering a simple demonstration of complex dielectric phenomena using common equipment. [ABSTRACT FROM AUTHOR]

In this paper, the nanolamination of a ZrO2 insulator by Al2O3 for metal insulator metal capacitor applications has been studied. The insulating layers (ZrO2 and Al2O3) were deposited by atomic layer deposition and the electrodes were made of TiN. Different configurations of ZrO2 and Al2O3 alternations were studied, including 1 to 16 Al2O3 inclusions in the ZrO2 layer. X-ray diffraction of the insulator configurations showed that with four or more Al2O3 inclusions, the structure loses its crystalline orientation and becomes amorphous. Electrical characterizations have been conducted to study the capacitance, breakdown field, and leakage current for every insulator configuration. The capacitance density significantly decreases as the number of Al2O3 layers increases, except when an amorphous transition occurs; at this point, a local maximum of 17 nF/mm2 was found. A 19% increase of the breakdown field of samples with two or more Al2O3 inclusions has been correlated with an increase of leakage current explained by the emergence of the Fowler–Nordeim conduction mechanism at electrical fields higher than 4 MV/cm. [ABSTRACT FROM AUTHOR]