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The nine papers in this special section focus on new developments in agile software and reports on applications for its use. A key aspect for the extensive use of agile software is that it supports developers with coping with the growing uncertainty and turbulence in technological and market environments. Feedback and change are at the core of Agile for a dynamic, evolving, and organic, rather than static, predefined, and mechanistic development process advocated by waterfall management. To create timely, high-quality, cost-efficient, and innovative solutions, Agile developers organized in small, colocated, autonomous teams, build and test software in rapid iterative cycles, actively involving users to gather feedback, updating the project scope, and plan "on-the-fly," using face-to-face communication as opposed to documentation. These papers contribute to the state-of-the-art of agile research by offering a rich, up-todate account of the dynamics occurring when expanding Agile into "not-just-software" contexts of the key challenges and perils related to the scaling and of the possible solutions to them. [ABSTRACT FROM AUTHOR]

3D object recognition is a hot research topic. Particularly, view-based methods, which represent a 3D object with a collection of its rendered views on the 2D domain, play an important role in this field. Currently, view-based researches tend to aggregate information from multiple views via pooling based strategies to endow the models with the characteristic of view permutation invariance, at the cost of inevitable loss of useful features. In this paper, we introduce a new method that learns a more comprehensive descriptor for a 3D object from its views while successfully keeping its robustness to the variation of view permutation. Our method disentangles the information in the set of multi-view images into a global category-related feature and a set of view-permutation related features. To unbind these two parts, an encode-decoder based disentangling architecture is proposed, which barely bring extra computations compared to the baseline model. Systematic experiments are conducted for this new method to demonstrates the effectiveness and the competitive performance based on ModelNet40, ModelNet10, and ShapeNetCore55 datasets. Codes for our paper will be released soon on “ https://github.com/hjjpku/multi%5fview%5fsort ”. [ABSTRACT FROM AUTHOR]

Tensor Cores have been an important unit to accelerate Fused Matrix Multiplication Accumulation (MMA) in all NVIDIA GPUs since Volta Architecture. To program Tensor Cores, users have to use either legacy wmma APIs or current mma APIs. Legacy wmma APIs are more easy-to-use but can only exploit limited features and power of Tensor Cores. Specifically, wmma APIs support fewer operand shapes and can not leverage the new sparse matrix multiplication feature of the newest Ampere Tensor Cores. However, the performance of current programming interface has not been well explored. Furthermore, the computation numeric behaviors of low-precision floating points (TF32, BF16, and FP16) supported by the newest Ampere Tensor Cores are also mysterious. In this paper, we explore the throughput and latency of current programming APIs. We also intuitively study the numeric behaviors of Tensor Cores MMA and profile the intermediate operations including multiplication, addition of inner product, and accumulation. All codes used in this work can be found in https://github.com/sunlex0717/DissectingTensorCores. [ABSTRACT FROM AUTHOR]

The tridiagonal solver is an important kernel and is widely supported in mainstream numerical libraries. While parallel algorithms have been studied for many-core architectures, the performance of current algorithms and implementations is still hindered by input size sensitivity and cross-platform portability. In this paper, we propose a novel algorithm WM-pGE for the batched solution of diagonally dominant tridiagonal systems. The algorithm balances the key design objectives, including computation complexity, memory complexity, parallelism, and input size sensitivity, better than existing algorithms. Moreover, an elegant formulation is presented to show the implementation and cross-platform optimization without loss of efficiency and generality, by extracting the platform-dependent works into only four vector operators. The results from our batched tridiagonal experiments show that the proposed algorithm outperforms the prior work PCR-pThomas by 25% and 12% on NVIDIA Tesla V100 in single and double precision, respectively. On Intel KNL, our method achieves a 10% improvement in performance over PCR-pThomas in double precision. [ABSTRACT FROM AUTHOR]

In recent years, remarkable progress in zero-shot learning (ZSL) has been achieved by generative adversarial networks (GAN). To compensate for the lack of training samples in ZSL, a surge of GAN architectures have been developed by human experts through trial-and-error testing. Despite their efficacy, however, there is still no guarantee that these hand-crafted models can consistently achieve good performance across diversified datasets or scenarios. Accordingly, in this paper, we turn to neural architecture search (NAS) and make the first attempt to bring NAS techniques into the ZSL realm. Specifically, we propose a differentiable GAN architecture search method over a specifically designed search space for zero-shot learning, referred to as ZeroNAS. Considering the relevance and balance of the generator and discriminator, ZeroNAS jointly searches their architectures in a min-max player game via adversarial training. Extensive experiments conducted on four widely used benchmark datasets demonstrate that ZeroNAS is capable of discovering desirable architectures that perform favorably against state-of-the-art ZSL and generalized zero-shot learning (GZSL) approaches. Source code is at https://github.com/caixiay/ZeroNAS. [ABSTRACT FROM AUTHOR]

In recent years, remarkable progress in zero-shot learning (ZSL) has been achieved by generative adversarial networks (GAN). To compensate for the lack of training samples in ZSL, a surge of GAN architectures have been developed by human experts through trial-and-error testing. Despite their efficacy, however, there is still no guarantee that these hand-crafted models can consistently achieve good performance across diversified datasets or scenarios. Accordingly, in this paper, we turn to neural architecture search (NAS) and make the first attempt to bring NAS techniques into the ZSL realm. Specifically, we propose a differentiable GAN architecture search method over a specifically designed search space for zero-shot learning, referred to as ZeroNAS. Considering the relevance and balance of the generator and discriminator, ZeroNAS jointly searches their architectures in a min-max player game via adversarial training. Extensive experiments conducted on four widely used benchmark datasets demonstrate that ZeroNAS is capable of discovering desirable architectures that perform favorably against state-of-the-art ZSL and generalized zero-shot learning (GZSL) approaches. Source code is at https://github.com/caixiay/ZeroNAS. [ABSTRACT FROM AUTHOR]

This paper presents a deep architecture, called pyramidal semantic correspondence networks (PSCNet), that estimates locally-varying affine transformation fields across semantically similar images. To deal with large appearance and shape variations that commonly exist among different instances within the same object category, we leverage a pyramidal model where the affine transformation fields are progressively estimated in a coarse-to-fine manner so that the smoothness constraint is naturally imposed. Different from the previous methods which directly estimate global or local deformations, our method first starts to estimate the transformation from an entire image and then progressively increases the degree of freedom of the transformation by dividing coarse cell into finer ones. To this end, we propose two spatial pyramid models by dividing an image in a form of quad-tree rectangles or into multiple semantic elements of an object. Additionally, to overcome the limitation of insufficient training data, a novel weakly-supervised training scheme is introduced that generates progressively evolving supervisions through the spatial pyramid models by leveraging a correspondence consistency across image pairs. Extensive experimental results on various benchmarks including TSS, Proposal Flow-WILLOW, Proposal Flow-PASCAL, Caltech-101, and SPair-71k demonstrate that the proposed method outperforms the lastest methods for dense semantic correspondence. [ABSTRACT FROM AUTHOR]

Recent work has shown that convolutional networks can be substantially deeper, more accurate, and efficient to train if they contain shorter connections between layers close to the input and those close to the output. In this paper, we embrace this observation and introduce the Dense Convolutional Network (DenseNet), which connects each layer to every other layer in a feed-forward fashion. Whereas traditional convolutional networks with $L$ L layers have $L$ L connections—one between each layer and its subsequent layer—our network has $\frac{L(L+1)}{2}$ L (L + 1) 2 direct connections. For each layer, the feature-maps of all preceding layers are used as inputs, and its own feature-maps are used as inputs into all subsequent layers. DenseNets have several compelling advantages: they alleviate the vanishing-gradient problem, encourage feature reuse and substantially improve parameter efficiency. We evaluate our proposed architecture on four highly competitive object recognition benchmark tasks (CIFAR-10, CIFAR-100, SVHN, and ImageNet). DenseNets obtain significant improvements over the state-of-the-art on most of them, whilst requiring less parameters and computation to achieve high performance. [ABSTRACT FROM AUTHOR]

Functional and nonfunctional characteristics of software systems are defined by their architecture. Therefore, research streams such as Internet-of-Things (IoT) or component-based software engineering provide researchers and practitioners with construction guidelines for selected architectural characteristics. Current systems can be categorized in delivering services to the user and being engineered in a smart way. For example, services being provided by IoT-Systems must fulfill users’ goals in a highly dynamic and ad-hoc way. Consequently, this survey aims at answering various research questions regarding the methodical composition of system components and services. Furthermore, new research opportunities are sketched that should be tackled to make the scientific progress available to practitioners. Based on a systematic literature review from a software architecture point of view, in this paper we identify 75 primary studies for domain-specific IoT component composition approaches and architectures. Initial results show that current integration approaches mainly focus on performance evaluation of their integration solutions, which may be too narrow for fulfilling user goals by utilizing of IoT architectures. [ABSTRACT FROM AUTHOR]

Parallelism and data reuse are the most critical issues for the design of hardware acceleration in a deep learning processor. Besides, abundant on-chip memories and precise data management are intrinsic design requirements because most of deep learning algorithms are data-driven and memory-bound. In this paper, we propose a compiler-architecture co-design scheme targeting a reconfigurable and algorithm-oriented array processor, named ReAAP. Given specific deep neural networks, the proposed co-design scheme is effective to perform parallelism and data reuse optimization on compute-intensive layers for guiding reconfigurable computing in hardware. Especially, the systemic optimization is performed in our proposed domain-specific compiler to deal with the intrinsic tensions between parallelism and data locality, for the purpose of automatically mapping diverse layer-level workloads onto our proposed reconfigurable array architecture. In this architecture, abundant on-chip memories are software-controlled and its massive data access is precisely handled by compiler-generated instructions. In our experiments, the ReAAP is implemented on an embedded FPGA platform. Experimental results demonstrate that our proposed co-design scheme is effective to integrate software flexibility with hardware parallelism for accelerating diverse deep learning workloads. As a whole system, ReAAP achieves a consistently high utilization of hardware resource for accelerating all the diverse compute-intensive layers in ResNet, MobileNet, and BERT. [ABSTRACT FROM AUTHOR]

Long short-term memory (LSTM) is a type of powerful deep neural network that has been widely used in many sequence analysis and modeling applications. However, the large model size problem of LSTM networks make their practical deployment still very challenging, especially for the video recognition tasks that require high-dimensional input data. Aiming to overcome this limitation and fully unlock the potentials of LSTM models, in this paper we propose to perform algorithm and hardware co-design towards high-performance energy-efficient LSTM networks. At algorithm level, we propose to develop fully decomposed hierarchical Tucker (FDHT) structure-based LSTM, namely FDHT-LSTM, which enjoys ultra-low model complexity while still achieving high accuracy. In order to fully reap such attractive algorithmic benefit, we further develop the corresponding customized hardware architecture to support the efficient execution of the proposed FDHT-LSTM model. With the delicate design of memory access scheme, the complicated matrix transformation can be efficiently supported by the underlying hardware without any access conflict in an on-the-fly way. Our evaluation results show that both the proposed ultra-compact FDHT-LSTM models and the corresponding hardware accelerator achieve very high performance. Compared with the state-of-the-art compressed LSTM models, FDHT-LSTM enjoys both order-of-magnitude reduction (more than $1000 \times$ 1000 × ) in model size and significant accuracy improvement (0.6% to 12.7%) across different video recognition datasets. Meanwhile, compared with the state-of-the-art tensor decomposed model-oriented hardware TIE, our proposed FDHT-LSTM architecture achieve $2.5\times$ 2. 5 × , $1.46\times$ 1. 46 × and $2.41\times$ 2. 41 × increase in throughput, area efficiency and energy efficiency, respectively on LSTM-Youtube workload. For LSTM-UCF workload, our proposed design also outperforms TIE with $1.9\times$ 1. 9 × higher throughput, $1.83\times$ 1. 83 × higher energy efficiency and comparable area efficiency. [ABSTRACT FROM AUTHOR]

Edge systems are required to autonomously make real-time decisions based on large quantities of input data under strict power, performance, area, and other constraints. Meeting these constraints is only possible by specializing systems through hardware accelerators purposefully built for machine learning and data analysis algorithms. However, data science evolves at a quick pace, and manual design of custom accelerators has high non-recurrent engineering costs: general solutions are needed to automatically and rapidly transition from the formulation of a new algorithm to the deployment of a dedicated hardware implementation. Our solution is the SOftware Defined Architectures (SODA) Synthesizer, an end-to-end, multi-level, modular, extensible compiler toolchain providing a direct path from machine learning tools to hardware. The SODA Synthesizer frontend is based on the multilevel intermediate representation (MLIR) framework; it ingests pre-trained machine learning models, identifies kernels suited for acceleration, performs high-level optimizations, and prepares them for hardware synthesis. In the backend, SODA leverages state-of-the-art high-level synthesis techniques to generate highly efficient accelerators, targeting both field programmable devices (FPGAs) and application-specific circuits (ASICs). In this paper, we describe how the SODA Synthesizer can also assemble the generated accelerators (based on the finite state machine with datapath model) in a custom system driven by a distributed controller, building a coarse-grained dataflow architecture that does not require a host processor to orchestrate parallel execution of multiple accelerators. We show the effectiveness of our approach by automatically generating ASIC accelerators for layers of popular deep neural networks (DNNs). Our high-level optimizations result in up to 74x speedup on isolated accelerators for individual DNN layers, and our dynamically scheduled architecture yields an additional 3x performance improvement when combining accelerators to handle streaming inputs. [ABSTRACT FROM AUTHOR]

The performance of a single neural network can vary unexpectedly corresponding to different classification tasks, and thus the network with fixed structure may lack flexibility and often lead to overfitting or underfitting. It is urgent, also the main objective of this paper, to deal with the limitation of the fixed neural network structure on classifying radar signals in different electromagnetic environments. We in this paper propose a variable network architecture search (NAS) mechanism, called balanced-NAS framework, and apply it in specific emitter identification (SEI) to greatly improve the flexibility of model searching. In the proposed balanced-NAS framework, a “block-cell” structure and a controller based recurrent neural network (RNN) are utilized to design models automatically according to external environment. In particular, a balance function is also proposed and utilized in the balanced-NAS framework, acting on the RNN controller to take both the validation accuracy and computational budget into consideration while searching for ideal models. The efficiency of the searching process is further enhanced by exploiting a progressive strategy to design simple and complicate child models where unpromising ones after each evaluation process are obsoleted to release searching space. Simulations and experiments indicate that the proposed balanced-NAS framework is extremely efficient and outperforms the conventional algorithms in classifying radar signals in different environments. [ABSTRACT FROM AUTHOR]

This paper studies the device activity detection problem in a multi-cell massive multiple-input multiple-output (MIMO) system, in which the active devices transmit signature sequences to multiple base stations (BSs) that are connected to a central unit (CU), and the BSs cooperate across multiple cells to detect the active devices based on the sample covariance matrices at the BSs. This paper demonstrates the importance of exploiting the knowledge of channel large-scale fadings in this cooperative detection setting through a phase transition analysis, which characterizes the length of signature sequences needed for successful device activity detection in the massive MIMO regime. It is shown that when the large-scale fadings are known, the phase transition for the multi-cell scenario is approximately the same as that of a single-cell system. In this case, the length of the signature sequences required for reliable activity detection in the multi-cell system can be made to be independent of the number of cells through cooperation, in contrast to the case where the large-scale fadings are not known. Further, this paper considers the case in which the fronthaul links between the BSs and the CU have capacity constraints and proposes a novel cooperation scheme based on the quantization of preliminary detection results at the BSs and the reconstruction of the sample covariance matrices at the CU. Simulations show that the proposed method significantly outperforms the scheme of directly quantizing the sample covariance matrices. [ABSTRACT FROM AUTHOR]

This paper deals with adaptive radar detection problems where several alternative hypotheses may be plausible. This kind of problems naturally extends the conventional binary tests that often occur in radar (as well as in other application fields) by including a further uncertainty degree related to the number of unknown signal parameters (model order). Such a modification consequently leads to multiple composite alternative hypotheses. In the companion paper (Addabbo et al., 2021), we have defined a new design framework which allows us to come up with decision schemes for these hypothesis testing problems by exploiting the Kullback-Leibler Information Criterion and without resorting to heuristic design criteria. The architectures devised within the proposed framework consist of the sum between the compressed log-likelihood ratio and a penalty term inherited from model order selection rules. Such a penalty term accounts for the number of unknown parameters to overcome the limitation of the generalized likelihood ratio test in the presence of nested hypotheses. In the present paper, we apply the new design framework to different detection problems related to both real aperture and (polarimetric) synthetic aperture radar. The analysis is carried out in comparison with suitable competitors (possibly based upon heuristic design criteria) and shows that the architectures devised within the proposed theoretically-founded design framework represent an effective means to deal with detection problems where the uncertainty on some parameters leads to multiple alternative hypotheses. [ABSTRACT FROM AUTHOR]

Safety-critical systems in various industries such as transportation or nuclear energy have been paid more attention with the development of societies due to increased attachment of importance to the life of human, their property, and nature. While developing such systems, detailed availability and safety characteristics are to be taken into account in parallel with architectural design decisions such as synchronization between different computing units or real-time task management. For fulfilling top-level requirements in international standards, ambitious quantitative targets like 0.012 FIT for HW units are to be reached where the industry has difficulties to achieve it. In this paper, this problem is handled by proposing an augmented Markov model for diverse architectures that is superior to the formulas provided in the main safety standard IEC 61508 and previous studies. With the proposed method it is possible to cover all safety-relevant states, which leads to more accuracy and lower hazard rates helping to reach these ambitious quantitative targets. Besides, the reliability parameters are investigated and optimized to increase safety performance. Consequently, the proposed novel model including enhanced reliability parameters is used for an industry application, namely safety-critical computer used for unmanned metro and high-speed rail transportation. The result obtained by the proposed model is compared with the results obtained using state of art models in literature and using the formulas in IEC 61508. As domain independent references IEC 61508 and Markovian approach are used in the paper, this study is applicable to other safety critical areas such as automotive or avionic industry. [ABSTRACT FROM AUTHOR]

While the vehicular network enables geographically distributed cooperative computation, its mature implementation has long been constrained due to the lack of an effective management platform. In this paper, employing the security and privacy attributes of blockchain, we propose a novel Blockchain-enabled Large-scale Parked Vehicular Computing (BLPVC) architecture to utilize the potential solar energy and vehicular computational resources in the outdoor parking lot. However, the uneven green power supply and random arrival time of electric vehicles compose the highly complex environment. Accordingly, in this paper, to handle the efficient utilization of the distributed resources by blockchain technology, we propose an integrated optimization framework which leverages the green energy utilization and service latency limit among the processes of block generation, task computing, and communication, whereas such a design leads to the mixed-timescale stochastic optimization problem. To this end, corresponding to the dynamic solar energy arrival, we propose a shaped deep deterministic policy gradient (DDPG) algorithm to accelerate the learning rate of computational frequency control in the short-term stage; while in the long-term stage, for the mixed-integer programming (MIP) of task offloading and blockchain parameters adjustment, a series of transformation is employed to preserve convexity. Finally, experiments are carried out on Python demonstrating that the proposed scheme achieves a balanced performance between service latency and distributed resources, while the battery depreciation cost is heavily reduced. [ABSTRACT FROM AUTHOR]

Driven by the outstanding performance of neural networks in the structured euclidean domain, recent years have seen a surge of interest in developing neural networks for graphs and data supported on graphs. The graph is leveraged at each layer of the neural network as a parameterization to capture detail at the node level with a reduced number of parameters and computational complexity. Following this rationale, this paper puts forth a general framework that unifies state-of-the-art graph neural networks (GNNs) through the concept of EdgeNet. An EdgeNet is a GNN architecture that allows different nodes to use different parameters to weigh the information of different neighbors. By extrapolating this strategy to more iterations between neighboring nodes, the EdgeNet learns edge- and neighbor-dependent weights to capture local detail. This is a general linear and local operation that a node can perform and encompasses under one formulation all existing graph convolutional neural networks (GCNNs) as well as graph attention networks (GATs). In writing different GNN architectures with a common language, EdgeNets highlight specific architecture advantages and limitations, while providing guidelines to improve their capacity without compromising their local implementation. For instance, we show that GCNNs have a parameter sharing structure that induces permutation equivariance. This can be an advantage or a limitation, depending on the application. In cases where it is a limitation, we propose hybrid approaches and provide insights to develop several other solutions that promote parameter sharing without enforcing permutation equivariance. Another interesting conclusion is the unification of GCNNs and GATs —approaches that have been so far perceived as separate. In particular, we show that GATs are GCNNs on a graph that is learned from the features. This particularization opens the doors to develop alternative attention mechanisms for improving discriminatory power. [ABSTRACT FROM AUTHOR]

Weight sharing promises to make neural architecture search (NAS) tractable even on commodity hardware. Existing methods in this space rely on a diverse set of heuristics to design and train the shared-weight backbone network, a.k.a. the super-net. Since heuristics substantially vary across different methods and have not been carefully studied, it is unclear to which extent they impact super-net training and hence the weight-sharing NAS algorithms. In this paper, we disentangle super-net training from the search algorithm, isolate 14 frequently-used training heuristics, and evaluate them over three benchmark search spaces. Our analysis uncovers that several commonly-used heuristics negatively impact the correlation between super-net and stand-alone performance, whereas simple, but often overlooked factors, such as proper hyper-parameter settings, are key to achieve strong performance. Equipped with this knowledge, we show that simple random search achieves competitive performance to complex state-of-the-art NAS algorithms when the super-net is properly trained. [ABSTRACT FROM AUTHOR]

Modern methods for counting people in crowded scenes rely on deep networks to estimate people densities in individual images. As such, only very few take advantage of temporal consistency in video sequences, and those that do only impose weak smoothness constraints across consecutive frames. In this paper, we advocate estimating people flows across image locations between consecutive images and inferring the people densities from these flows instead of directly regressing them. This enables us to impose much stronger constraints encoding the conservation of the number of people. As a result, it significantly boosts performance without requiring a more complex architecture. Furthermore, it allows us to exploit the correlation between people flow and optical flow to further improve the results. We also show that leveraging people conservation constraints in both a spatial and temporal manner makes it possible to train a deep crowd counting model in an active learning setting with much fewer annotations. This significantly reduces the annotation cost while still leading to similar performance to the full supervision case. [ABSTRACT FROM AUTHOR]

The cell-free massive multiple-input multiple-output (CFmMIMO) aims to provide uniform quality of service (QoS) for all users, and can be used in small-area scenarios such as indoor industrial networks. This paper studies the CFmMIMO system for indoor industrial scenarios. Firstly, an access point (AP) grouping based hierarchical network topology is proposed. Based on this, we propose an effective AP selection method. To reduce pilot contamination, a pilot assignment scheme based on inspection robot (IR) location is proposed. Considering the high reliability requirement of industrial data transmission, the power control and backhaul combining are jointly optimized to maximize the minimum signal to interference plus noise ratio (SINR). The scalability of the proposed CFmMIMO system is analyzed, and a scalable power control method is proposed. The simulations demonstrate the effectiveness of the AP selection method, pilot assignment scheme, and the joint optimization algorithm for power control and backhaul combining. Moreover, the impact of network scale and network load on system performance is evaluated and analyzed in the simulations. [ABSTRACT FROM AUTHOR]

Millimeter wave (mmWave) frequency spectrum offers orders of magnitude greater spectrum to mitigate the severe spectrum shortage in conventional cellular bands. To overcome the high propagation loss in the mmWave band, massive multiple-input and multiple-output (MIMO) can be adopted at both transmitter and receiver to provide large beamforming gains. At the same time, hybrid architecture is applied to reduce the huge power consumption caused by devices operating at radio frequency (RF). However, because of the hybrid architecture and large number of antennas, it is hard to obtain the channel state information (CSI) which is crucial for obtaining desirable beamforming gains. Off-grid error and sparsity pattern (SP) estimation error are two main limiting factors of the performance of most existing compressive sensing (CS) based channel estimation (CE) algorithms. Off-grid error presents when the true angle does not lie on the discretized angle grid of mmWave channel in the spatial domain. In this paper, we first propose a fast Bayesian matching pursuit method with ‘virtual sparsity’ to improve the accuracy of SP estimation and name it as the improved Bayesian matching pursuit (IBMP). Then an enhanced algorithm, named off-grid IBMP (OG-IBMP), is developed to mitigate the off-grid problem, followed by a theoretical analysis of OG-IBMP. This method iteratively updates the selected grid points and updates the corresponding parameters based on the maximum a posteriori (MAP) criterion. Numerical simulations are performed to validate our theoretical analysis and evaluate the performance of the proposed method. Compared to other existing methods, the results show that our proposed OG-IBMP algorithm greatly reduces the off-grid error and significantly enhances the accuracy of the SP estimation with low computational complexity. [ABSTRACT FROM AUTHOR]

Deep Neural Networks (DNN) are gaining higher commercial values in computer vision applications, e.g., image classification, video analytics, etc. This calls for urgent demands of the intellectual property (IP) protection of DNN models. In this paper, we present a novel watermarking scheme to achieve the ownership verification of DNN architectures. Existing works all embedded watermarks into the model parameters while treating the architecture as public property. These solutions were proven to be vulnerable by an adversary to detect or remove the watermarks. In contrast, we claim the model architectures as an important IP for model owners, and propose to implant watermarks into the architectures. We design new algorithms based on Neural Architecture Search (NAS) to generate watermarked architectures, which are unique enough to represent the ownership, while maintaining high model usability. Such watermarks can be extracted via side-channel-based model extraction techniques with high fidelity. We conduct comprehensive experiments on watermarked CNN models for image classification tasks and the experimental results show our scheme has negligible impact on the model performance, and exhibits strong robustness against various model transformations and adaptive attacks. [ABSTRACT FROM AUTHOR]

Current edge computing systems are deployed in highly complex application scenarios with dynamically changing requirements. In order to provide the expected performance and energy efficiency values in these situations, the use of heterogeneous hardware/software platforms at the edge has become widespread. However, these computing platforms still suffer from the lack of unified software-driven programming models to efficiently deploy multi-purpose hardware-accelerated solutions. In parallel, edge computing systems also face another huge challenge: operating under multiple conditions that were not taken into account during any of the design stages. Moreover, these conditions may change over time, forcing self-adaptation mechanisms to become a must. This paper presents an integrated architecture to exploit hardware-accelerated data-parallel models and transparent hardware/software multithreading. In particular, the proposed architecture leverages the ARTICo3 framework and ReconOS to allow developers to select the most suitable programming model to deploy their edge computing applications onto run-time reconfigurable hardware devices. An evolvable hardware system is used as an additional architectural component during validation, providing support for continuous lifelong learning in smart edge computing scenarios. In particular, the proposed setup exhibits online learning capabilities that include learning by imitation from software-based reference algorithms. Experimental results show the benefits of the proposed approach, exposing different run-time tradeoffs (e.g., computing performance versus functional correctness of the evolved solutions), and highlighting the benefits of using scalable data-parallel models to perform circuit evolution under dynamically changing application scenarios. [ABSTRACT FROM AUTHOR]

Training jobs of deep neural networks (DNNs) can be accelerated through distributed variants of stochastic gradient descent (SGD), where multiple nodes process training examples and exchange updates. The total throughput of the nodes depends not only on their computing power, but also on their networking speeds and coordination mechanism (synchronous or asynchronous, centralized or decentralized), since communication bottlenecks and stragglers can result in sublinear scaling when additional nodes are provisioned. In this paper, we propose two classes of performance models to predict throughput of distributed SGD: fine-grained models, representing many elementary computation/communication operations and their dependencies; and coarse-grained models, where SGD steps at each node are represented as a sequence of high-level phases without parallelism between computation and communication. Using a PyTorch implementation, real-world DNN models and different cloud environments, our experimental evaluation illustrates that, while fine-grained models are more accurate and can be easily adapted to new variants of distributed SGD, coarse-grained models can provide similarly accurate predictions when augmented with ad hoc heuristics, and their parameters can be estimated with profiling information that is easier to collect. [ABSTRACT FROM AUTHOR]