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In this paper, the problem of power efficiency evaluation for n -ports physical systems is investigated. The efficiency analysis that we perform highlights the necessary and sufficient conditions for the system to be passive, and outlines the guidelines for the efficiency maps computation. After addressing the problem from a formal point of view, the analysis is deepened for the case of two-ports linear and nonlinear physical systems, and for the cases of three and four-ports linear systems. The efficiency analysis and the computation of the efficiency maps are addressed as a function of the power variables characterizing all the energetic ports of the considered systems. Furthermore, the salient properties of the efficiency are highlighted and discussed. The theoretical analysis which is developed is then applied to some physical systems of interest for industries and engineers working in the electromechanical, hydraulic and automotive fields: a DC electric motor driving an hydraulic pump for the two-ports systems class, a single-stage planetary gear set for the three-ports systems class, and a Ravigneaux planetary gear set for the four-ports systems class. • Power efficiency modeling and efficiency maps computation for physical systems. • Interchangeable efficiency maps computed on the different systems energetic ports. • Highlighting of intrinsic properties and of a design parameter for two-ports systems. • Efficiency maps computation and intrinsic characteristics of planetary gear sets. [ABSTRACT FROM AUTHOR]

Inhomogeneous linear ordinary differential equations (ODEs) and systems of ODEs can be solved in a variety of ways. However, hardware circuits that can perform the efficient analog computation to solve them are rarely in the literature. To address such problems, this paper proposes a general method of using a memristor-capacitor (M-C) circuit to solve inhomogeneous linear ODEs and systems of ODEs of any order in initial value problems. The M-C circuit can match the coefficients of the equations sought by adjusting the memristor resistance value according to the coefficient formula proposed in the paper, which has higher programmability. Then, some ODEs and systems of ODEs are given in the paper as examples to evaluate the proposed method. According to the comparison results based on MATLAB software simulation and the simulation based on OrCAD software, the designed M-C circuit has an effective improvement in speed and the accuracy exceeds 99.95% in software simulation. Based on practical verification, this paper gives the actual M-C circuit experiment based on PCB. Moreover, the proposed method can be used to quickly solve the object motion state in the spring mass damping system in actual engineering, and the accuracy can reach 99.98%. [ABSTRACT FROM AUTHOR]

This paper is concerned with the problem of event-triggered optimized control for uncertain nonlinear Itô-type stochastic systems with time-delay and unknown dynamic. By using fuzzy logic systems to approximate two unknown nonlinear functions with the delayed state and current state, respectively. The adaptive identifier is constructed to determine the stochastic system, and the optimized control is designed by using the identifier and adaptive dynamic programming (ADP) of actor-critic architecture. Almost all of the works are concentrated on ADP-based optimal control and it will inevitably cause the complexity of computation and requirements of persistence excitation (PE) assumption. In this paper, the ADP algorithm is obtained based on the negative gradient of a simple positive function (equivalent to the HJB equation), and so the proposed optimal control is simple and can release the PE assumption. Moreover, the event-triggered control approach is proposed to reduce computing burden and communication resources. Furthermore, we prove that the states of system and FLSs parameter errors are semi-globally uniformly ultimately bounded (SGUUB) in mean square via the adaptive identifier and the Lyapunov direct method as well as identifier-actor-critic architecture-based ADP algorithm. Finally, the effectiveness of the proposed method is illustrated through two numerical examples. [ABSTRACT FROM AUTHOR]

In this paper, we present a compact memristor model for bipolar neuromorphic ReRAM devices. The proposed model focuses on the high level description of the device, and it reproduces some of the most important characteristics (i.e. conductance, energy dissipation) without needing a detailed electrical simulation. Its functionality is shown by using it to model the behavior of three different ReRAM devices that were fabricated and measured at the CNR-IMM, MDM Laboratory. The parameters extraction procedure is also discussed. The obtained results clearly show that the model proposed in this paper is able to capture the influence of the programming pulse parameters (i.e. pulse duration and height) changes. This is accomplished by the introduction of a parameter, which is related to the specific device technology. [ABSTRACT FROM AUTHOR]

This paper addresses and experimentally demonstrates a programmable linear equation solver by analog computation. A set of differential equations using transconductance devices directly translated from circuit theory converges to the linear equation solution. These energy-efficient analog techniques are experimentally demonstrated in a configurable analog platform. The resulting analog linear equation solution circuits are effectively analog filters. The paper analyzes the algorithmic issues and analog numerical analysis issues, including accuracy, convergence time, and the interpretation of condition number for analog solutions. [ABSTRACT FROM AUTHOR]

Solving continuous problems on digital computers gives generally only approximations of the continuous solutions. It is therefore crucial that the error between the continuous solution and the digital approximation can effectively be controlled. This paper investigates the possibility of simulating linear, time-invariant (LTI) systems on Turing machines. It is shown that there exist elementary LTI systems for which an admissible and computable input signal results in a non-computable output signal. For these LTI systems, the paper gives sharp characterizations of input spaces such that the output is guaranteed to be computable. The second part of the paper discusses the computability of the impulse and step response of LTI systems. It is shown that the computability of the step response implies not the computability of the impulse response. Moreover, there exist impulse responses which cannot be computed from the transfer function using the inverse Laplace transform. Finally, the paper gives a stronger version of a classical non-computability result, showing that there exist admissible and computable initial values for the wave equation so that the solution cannot be computed at certain points in space and time. [ABSTRACT FROM AUTHOR]

In recent years, hardware modeling for various parts of the body’s sensitive organs, including the brain and nervous system, heart and eyes, has been considered for the treatment of diseases and rehabilitation, as well as for moving towards the construction of artificial prostheses. The retina is a thin layer that is the innermost layer of the human eye. In this paper, low-cost hardware implementation for retinal cone cells is performed. Existing mathematical models for implementing the behavior of these cells include a series of nonlinear functions that, if implemented directly, would require a large amount of hardware and, in addition, would not have the desired speed. The proposed model uses multi-linear functions to approximate the nonlinear terms and eliminate the multiplication expressions. The simulation results show that the proposed model tracks the behavior of the original model with high precision. There is also a good match between the main model and the proposed model in terms of dynamic behaviors. The results of hardware implementation using the virtex5 XC5VLX20T (2FF323) reconfigurable board (FPGA) show that the proposed model is fully valid and has a lower hardware volume as well as a 4 times higher frequency, and 22% less power consumption than the original model. [ABSTRACT FROM AUTHOR]

This paper presents a high-performance solar energy harvesting system with improved adaptive maximum power point tracking (AMPPT) method utilizing neural network (NN) model as assistance. Under the guidance of the negative feedback control (NFC) model, a BJT based voltage control oscillator with three off-chip reconfigurable resistors is designed in this paper to improve the reusability of the solar energy harvesting system. Meanwhile, the AMPPT accuracy has much improvement by co-simulation of MATLAB/Simulink and Virtuoso with the help of NN model of Photovoltaic (PV) Cell. The complete system with output voltage of 4.2V to power the battery is designed and fabricated in $0.18~\mu \text{m}$ CMOS technology. According to the test results, the system can track the maximum power points (MPP) successfully with average voltage tracking errors of 0.23% (0.01-0.51%) of PV cell 1 and 0.29% (0.01-0.5%) of PV cell 2 when the light intensity changes from 3000lux to 10000lux. Without power hungry current sensor or voltage sensor and other complicated control circuits, the peak efficiency is about 89.39% @ 3000lux. [ABSTRACT FROM AUTHOR]

This paper presents the design of an optimal controller for solving tracking problems subject to unmeasurable disturbances and unknown system dynamics using reinforcement learning (RL). Many existing RL control methods take disturbance into account by directly measuring it and manipulating it for exploration during the learning process, thereby preventing any disturbance induced bias in the control estimates. However, in most practical scenarios, disturbance is neither measurable nor manipulable. The main contribution of this article is the introduction of a combination of a bias compensation mechanism and the integral action in the Q-learning framework to remove the need to measure or manipulate the disturbance, while preventing disturbance induced bias in the optimal control estimates. A bias compensated Q-learning scheme is presented that learns the disturbance induced bias terms separately from the optimal control parameters and ensures the convergence of the control parameters to the optimal solution even in the presence of unmeasurable disturbances. Both state feedback and output feedback algorithms are developed based on policy iteration (PI) and value iteration (VI) that guarantee the convergence of the tracking error to zero. The feasibility of the design is validated on a practical optimal control application of a heating, ventilating, and air conditioning (HVAC) zone controller. [ABSTRACT FROM AUTHOR]

The common mode (CM) current in differential circuits generates CM noise which radiates in the environment and causes electromagnetic interference (EMI) with electronic devices in proximity. This noise is generated due to imbalance in the charging and discharging paths of the driver circuit and asymmetric equalization. A systematic study of how asymmetric equalizer increase the CM noise is still lacking. Few active on-chip solutions are proposed for wireline transmitters up to 20-Gbps speed. However, these solution does not suppress CM noise by the equalizer and they could not support four-level pulse amplitude modulation (PAM-4) optical transmitters. This paper analyzes two potential sources of EMI-related CM noise, the common mode logic (CML) driver and feed forward equalization (FFE) circuit, and presents a novel on-chip active circuit technique for automatic CM noise cancellation in high-speed PAM-4 transmitter. This solution provides the benefits of small size and low cost by eliminating the need for discrete components to suppress EMI. The post-layout simulation demonstrates that the CM noise cancellation circuit (CMNC) efficiently mitigate the EMI by suppressing the CM noise up to 90% and consumes 5 mW, with core area of $17 \mu m \times 9 \mu m$. [ABSTRACT FROM AUTHOR]

On the emerging development of SiC MOSFET, the switching frequency of power converters has been pushed to the order of hundreds of kilohertz or even megahertz to improve power density. However, the state-of-the-art simulations for such high-frequency power electronics circuits are usually time-consuming, blocking the studies of long dynamics such as several seconds. What’s worse, adopting physical models to simulate the turn-on and turn-off transients leads to high stiffness and therefore convergence problems. In this paper, an event-driven approach is proposed to improve the solving speed and simulation stability of SiC based high-frequency converters. A time-scale hierarchical automaton is proposed to model the system, where piecewise analytical transient model for SiC MOSFET is established as the second layer in the automaton to simulate the switching transients with improved numerical stability. Simulation of the system is driven by discrete events in the automaton. A 3.3 kW 79.1 kHz wireless power transfer system for the wireless charging of electric vehicle is studied. Compared with ideal switch model in Simulink and physical switch model in LTspice, 60-fold and 400-fold increases in terms of simulation speed with same level of accuracy are achieved respectively. The simulated results are also attested to by experimental verifications. [ABSTRACT FROM AUTHOR]

Regarding as a basic circuit component with special nonlinearity, memristor has been widely applied in chaotic circuits and neuromorphic circuits. However, discrete memristor (DM) has not been received much attention, yet. To this end, this paper reports a general DM model and its unified mapping model. Using the general DM model, four representations of DMs are given and their pinched hysteresis loops are exhibited. Based on the unified DM mapping model, four two-dimensional (2D) DM maps are generated and their parameter-relied and initials-relied behaviors are explored using multiple numerical measures. The results demonstrate that all the four 2D DM maps can generate hyperchaos with coexisting bi-stable or memristor initial-boosted behavior, and their sequences have excellent performance indictors. A hardware device is constructed to implement these maps and the analog voltage signals are experimentally acquired. Moreover, pseudo-random number generators (PRNGs) are designed using these DM maps and the test results show that the generated pseudo-random numbers (PRNs) have high randomness. [ABSTRACT FROM AUTHOR]

This paper proposes a power-up calibration scheme to mitigate the offset of a capacitive-gain chopper instrumentation amplifier (CCIA), thus suppressing the offset-induced output ripple. In this design, the first stage of the error amplifier is formed by multiple identical slices. Before normal operation, the offset polarity of each slice is determined by reusing the second stage of the amplifier as a comparator. With such polarity information, slices of the first stage are regrouped to achieve a statistical offset reduction. The proposed amplifier has been fabricated in a standard $0.18~\mu \text{m}$ CMOS process with an area of 0.57 mm2, achieving an average peak-to-peak output ripple of 58 mV. The amplifier consumes $1.53~\mu \text{W}$ with a 1.2 V supply. Compared to the state-of-the-art, the calibration time of the proposed scheme is much shorter (14 clock cycles) and the overhead logic consumes no static power after calibration. In addition, the slicing technique provides an extra degree of freedom to the amplifier for bandwidth and noise scaling. [ABSTRACT FROM AUTHOR]

In this paper a fairly complete mathematical model of CP-PLL, which reliable enough to serve as a tool for credible analysis of dynamical properties of these circuits, is studied. We refine relevant mathematical definitions of the hold-in and pull-in ranges related to the local and global stability. Stability analysis of the steady state for the charge-pump phase locked loop is non-trivial: straight-forward linearization of available CP-PLL models may lead to incorrect conclusions, because the system is not smooth near the steady state and may experience overload. In this work necessary details for local stability analysis are presented and the hold-in range is computed. An upper estimate of the pull-in range is obtained via the analysis of limit cycles. The study provided an answer to Gardner’s conjecture on the similarity of transient responses of CP-PLL and equivalent classical PLL and to conjectures on the infinite pull-in range of CP-PLL with proportionally-integrating filter. [ABSTRACT FROM AUTHOR]

Analysis of ac electrical systems can be performed via frame transformations in the time-domain or via harmonic transfer functions (HTFs) in the frequency-domain. The two approaches each have unique advantages but are hard to reconcile because the coupling effect in the frequency-domain leads to infinite dimensional HTF matrices that need to be truncated. This paper explores the relation between the two representations and shows that applying a frame transformation on the input-output signals creates a direct equivalence to a similarity transformation to the HTF matrix of the system. Under certain conditions, such similarity transformations have a diagonalizing effect which, essentially, reduces the HTF matrix order from infinity to two or one, making the matrix tractable mathematically without truncation or approximation. This theory is applied to a droop-controlled voltage source inverter as an illustrative example. A stability criterion is derived in the frequency-domain which agrees with the conventional state-space model but offers greater insights into the mechanism of instability in terms of the negative damping (non-passivity) under droop control. Therefore, the paper not only establishes a unified view in theory but also offers an effective practical tool for stability assessment. [ABSTRACT FROM AUTHOR]

This paper presents the theory of a novel memcomputing paradigm based upon a memristive version of standard Cellular Nonlinear Networks. The insertion of a nonvolatile memristor in the circuit of each cell endows the dynamic array with the capability to store and retrieve data into and from the resistance switching memories, obviating the current need for extra memory blocks. Choosing the parameters of each cell circuit so that the memristors may undergo solely sharp transitions between two states, each processing element may be approximately described at any time as one of two first-order systems. Under this assumption, the classical Dynamic Route Map may be employed to synthesise and analyse the data storage and retrieval genes. A new system-theoretic methodology, called Second-Order Dynamic Route Map, is also introduced for the first time in this paper. This technique allows to study the operating principles of arrays with second-order processing elements, as is the case, in the proposed network, if the set up of cell circuit parameters induces analogue memristive dynamics. This paper shows how the novel tool may be adopted to investigate the operating mechanisms of a cellular array with second-order cells, which compute the element-wise logical OR between two binary images. [ABSTRACT FROM AUTHOR]

This paper presents an energy-efficient spectral analysis method for the Internet of Things (IoT). The objective of this paper is to reduce the energy consumption of edge devices. The proposed method uses an autoregressive (AR) model for spectral analysis instead of the discrete Fourier transform, and its calculation process is distributed to the edge device and a base station by considering the energy consumption tradeoff of the data processing and the data communication. In this paper, the Yule–Walker method is employed for the AR coefficient calculation. The calculation process of Yule–Walker method can be divided into two parts: an autocorrelation calculation and an AR coefficient calculation. The autocorrelation calculation is implemented in the edge devices, and its dedicated hardware is designed using Verilog HDL. Meanwhile, the AR coefficient is calculated in the base station and is used for the spectral analysis. According to this distributed processing approach, the energy consumption of the edge device can be reduced compared with conventional DFT approaches using the fast Fourier transform (FFT). The system level energy consumption is evaluated assuming the IoT edge device, which has a wireless transceiver using Bluetooth low energy. The evaluation results show that the proposed method can reduce 79% of the edge device energy consumption for spectral analysis in a practical application. [ABSTRACT FROM AUTHOR]

In this paper, hybrid dynamical systems theory is applied to the analysis and control of switched converters with Pulse-Width Modulated (PWM) inputs. The system is described by a state-space model with continuous flows and discrete jumps, without averaged equations. The modulation effects are captured in full without using time-dependent signals, by enlarging the state vector to include the PWM waveform generation process. Furthermore, the sample-and-hold mechanism associated with the sampling frequency is also taken into account with this approach. A control law is proposed based on a Lyapunov function candidate. Furthermore, convergence sets and the steady state jitter, inherent to PWM-based controllers, are analyzed estimating limit sets for the augmented state. Consequently, output chattering can be bounded. By using hybrid dynamical system theory, the control designer gains a deeper understanding of the effect of modulation in the closed-loop dynamics, avoiding the problems associated with the use averaged models. Experimental results validate the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a method for offline training of inverter-based memristive neural networks (IM-NNs), called ERIM, is presented. In this method, the output voltage of the inverter is modeled very accurately by considering the loading effect of the memristive crossbar. To properly choose the size of each inverter, its output load and the required slope of its voltage transfer characteristic (VTC) for an acceptable level of resiliency to the circuit element non-idealities are taken into account. The efficacy of ERIM is investigated by comparing its accuracy to those of two recently proposed offline training methods for IM-NNs (RIM and PHAX). The study is performed using IRIS, BCW, MNIST, and Fashion MNIST datasets. Simulation results show that 72% (56%) reduction in average energy consumption of the trained networks is achieved compared to RIM (PHAX) thanks to proper sizing of the inverters. In addition, due to the higher accuracy of the NN mathematical model, ERIM results in significant improvements in the match between the results of high-level modeling and HSPICE simulations while exhibiting lower sensitivity to circuit element variations. [ABSTRACT FROM AUTHOR]

In this paper a novel triple hole block layer (HBL) structure of the OLED is proposed that depicts an enhanced luminescence of 25285 cd/m2 with an improvement of 47% over multilayered OLED architecture. It also owes 74% improvement in luminous power efficiency. An in-depth numerical analysis based on Poisson and drift diffusion equation is undertaken and validated against the internal device analysis. The analysis results highlight an enhanced recombination rate within the proposed device. High electron injection and efficient hole blocking contributes to improved recombination rate. Triple HBL OLED is therefore used for diagnosis of ovarian cancer. The device illustrated good response towards varying wavelengths generating a maximum photo current value of 93 mA. A healthy person can be differentiated from an oncological cancer patient based on fluorescence produced by their urine. The fluorescence values for healthy person and oncological cancer patient are in the range of 420 and 440 nm, correspondingly. The cathode current produced by OLED corresponding to these two wavelengths are 5 and 1 mA respectively. Hence, the proposed device can successfully diagnose the ovarian cancer patient. Further, the methodology proposed for diagnosis of ovarian cancer can help in developing a portable, flexible low cost biomedical sensor. [ABSTRACT FROM AUTHOR]

Power consumption is an important limitation in designing analog-to-digital converters (ADCs) used in low-power sensing applications. This paper estimates analytically the power bound of a two-step multi-stage noise-shaping successive-approximation-register incremental ADC (two-step MASH NS-SAR IADC) proposed in our previous work. Our model considers the impacts of thermal noise, mismatch, and CMOS process (minimum feature size in CMOS technologies) on the power bounds of the proposed IADC. The analytic results show that thermal noise and CMOS process requirements determine the power consumption lower bounds in high and low resolutions, respectively. A comparison with the most competitive single-loop delta-sigma (ΔΣ) IADC shows a 3-dB higher theoretical figure-of-merit (FoM) for our proposed IADC when the resolutions are higher than 12-bit. Our proposed systematic analysis can be used to estimate the power bounds of amplifier-based NS-SAR ADCs used in either ΔΣ or incremental mode with multi-stage and multi-step topologies designed in various CMOS technologies. The reported analytic results are confirmed by experimental results of previously reported implementations. [ABSTRACT FROM AUTHOR]

In this paper, a nonlinear analysis of cross- coupled super-regenerative oscillators (SROs) is presented. The start-up and decay envelopes of the oscillator output are studied in relation to the input. The SRO start-up time and the maximal achievable quenching frequency are investigated. For phase modulation purposes, the relation between the initial phases of the input and output signals is investigated. In addition, a frequency-domain analysis is performed to ease the characterization of circuit prototypes at frequencies where time-domain measurements are not possible. The analytical results are verified by circuit-level simulations and measurements of a 2.4-GHz SRO. This study provides design guidelines for the design of SROs in cross-coupled architectures and helps in determining the optimal system parameters when targeting both amplitude and phase modulations. To the authors’ best knowledge, this is the first study investigating analytically the phase relation between the SRO input and output signals and the nonlinear large-signal behavior of SROs. [ABSTRACT FROM AUTHOR]

In this paper, a broadband receiver front end for 0.1 to 40 GHz application, fabricated using 0.15-μm GaAs E-mode pHEMT process, is reported. The receiver front end consists of a broadband low-noise amplifier (LNA) and a broadband mixer. To achieve low noise and significant bandwidth extension, a three-stage LNA, cascading one stage cascode amplifier with feedback and bandwidth extension techniques, to two stage cascode Darlington amplifiers with feedback, is proposed. The bandwidth extension principles of LNA are analyzed theoretically and verified experimentally. Measurement results show that the proposed LNA exhibits an average gain of 23.7 dB with ± 1.5-dB variation, a typical noise figure of 3.8 dB, maximum OP1dB of 8.7 dBm in the frequency range from 0.1 to 40 GHz. A symmetric distributed drain mixer (SDDM) is proposed to provide broad bandwidth while ensuring an IP1dB of up to 5.8 dBm. The design procedure of SDDM is presented in detail. Experimental results indicate that the SDDM features a less than 7-dB conversion loss, an IP1dB of up to 5.8 dBm with zero dc dissipation and better than 15-dB isolation of LO-to-RF and IF-to-RF ports from 0.1 to 40 GHz. Finally, the LNA and SDDM are integrated as a 0.1 to 40-GHz receiver front end. Measurements illustrate that the receiver front end shows good matching with better than 10-dB return loss at RF and LO ports, and larger than 15-dB conversion gain in 0.1 to 40-GHz frequency range. The receiver occupies only 1.89-mm2 chip area including test pads. To the best of the authors’ knowledge, the designed receiver front end has the widest bandwidth among reported receivers fabricated by using GaAs process. [ABSTRACT FROM AUTHOR]

Recent studies have utilized evolutionary mechanisms to impede the emergence of drug-resistant populations. In this paper, we develop a mathematical model that integrates hormonal treatment, immunotherapy, and the interactions among three cell types: drug-sensitive cancer cells, drug-resistant cancer cells and immune effector cells. Dynamical analysis is performed, examining the existence and stability of equilibria, thereby confirming the model's interpretability. Model parameters are calibrated using available prostate cancer data and literature. Through bifurcation analysis for drug sensitivity under different immune effector cells recruitment responses, we find that resistant cancer cells grow rapidly under weak recruitment response, maintain at a low level under strong recruitment response, and both may occur under moderate recruitment response. To quantify the competitiveness of sensitive and resistant cells, we introduce the comprehensive measures R 1 and R 2 , respectively, which determine the outcome of competition. Additionally, we introduce the quantitative indicators C I E 1 and C I E 2 as comprehensive measures of the immune effects on sensitive and resistant cancer cells, respectively. These two indicators determine whether the corresponding cancer cells can maintain at a low level. Our work shows that the immune system is an important factor affecting the evolution of drug resistance and provides insights into how to enhance immune response to control resistance. • The proposed model is validated by theoretical analysis and experimental data fitting. • MTD treatment promotes and no treatment inhibits resistant cells. • Weaker recruitment of immune effector cells makes drug resistance more likely to occur. • Different drug strategies are suit to patients with varied immune responses. [ABSTRACT FROM AUTHOR]

In this paper, we present an approach to nonlinear system approximation, called the lattice trajectory piecewise linear (LTPWL) model. The approach involves determining a lattice piecewise linear (PWL) approximation to the state trajectory of a nonlinear system. It has been shown in the literature that the lattice PWL expression can represent any PWL function in any dimension. After the LTPWL approximation has been obtained, the order of each model piece is reduced using a Krylov projection technique. Compared to existing trajectory piecewise linear (TPWL) models, which are quasi-PWL in the whole region, LTPWL models are virtually linear in each subregion. Besides, the single output LTPWL model can be seen as a special kind of TPWL model, in which only one weight is 1, and the other weights are 0. In general, for multiple output LTPWL model, the weights set to be 1 for each component are different, which makes the LTPWL model more flexible in approximation of nonlinear function. The proposed strategy is applied to simulate diode circuits, and the experimental results show that the performance of the LTPWL model is better than that of the traditional TPWL model in terms of approximation accuracy and generalization ability. [ABSTRACT FROM AUTHOR]

Robust stability problem of discrete-time fractional-order systems (DTFOSs) with interval uncertainties is investigated in this paper. Firstly, a new theorem for matrix root-clustering in union-region is established. Based on this theorem, the stability regions of DTFOSs are described as the union-region of closed sub-regions, and sufficient conditions for stability of DTFOSs are presented. Then, new sufficient conditions for robust stability of DTFOSs with interval uncertainties are derived. All the results are obtained in terms of linear matrix inequalities (LMIs) which are more tractable than the existing ones. Finally, numerical examples are given to show that our results are valid and less conservative than the existing ones. [ABSTRACT FROM AUTHOR]

In this paper we are going to analyze the settling-time in single-, two- and three-stage amplifiers with the intent of deriving approximate but useful design equations that include the effects of the zeros and of the slew-rate limitations. The analysis is mainly devoted to the definition of an approach for the design of three-stage CMOS operational transconductance amplifiers from settling-time specifications. A design example is carried out to validate the proposed approach. [ABSTRACT FROM AUTHOR]

The interaction between the resonant wireless power transfer (WPT) component and the dc/dc converter may weaken the system stability, causing overshoot and oscillation in the dynamic process of such WPT system. Nevertheless, both the mechanism and the solutions of the above problems are not fully researched for the WPT systems. This paper first analyzes the small-signal impedance characteristics of such systems and points out the cause of the instability phenomenon. Then, a novel control strategy is proposed to regulate the system impedance characteristics, which can suppress the interaction and improve the system dynamic performance. Small-signal analysis and experiment results demonstrate that the proposed strategy has the advantages of fast response and less overshoot compared with traditional PI control, and is suitable for different operating conditions. [ABSTRACT FROM AUTHOR]

Neurons are the basic blocks in the Central Nervous System (CNS). Simulation and hardware realization of these blocks are vital in neuromorphic engineering. This paper presents a set of multiplierless mathematical equations based on $2^{X}$ terms to achieve a low-cost, high-speed, and high-accuracy digital implementation of Hodgkin-Huxley (HH) neuron model. The HH model is the most complicated and high-accuracy among the mathematical neuron models. The proposed model can reproduce spiking behaviors of the original HH model with high precision. To validate the mathematical simulation results, the proposed model has been synthesized and implemented on Field-Programmable Gate Array (FPGA) development board. Hardware synthesis and physical implementations reveal that the biological behavior of different spiking patterns can be reproduced with higher performance and significantly lower implementation costs compared with the original HH model. Also, in this approach the maximum frequency of 200 MHz is achievable which is valuable in comparison with other similar works. [ABSTRACT FROM AUTHOR]

This paper presents a novel approach to analyze clock jitter influence in the performance of continuous-time sigma–delta modulators. The analysis is based on projecting all the signals and operations over an artificial time-base relative to the sampling clock, on which the sampling period can be considered constant. In the proposed time-base, clock jitter can be modeled as the modulation of the input signal frequency and the integrators gain. Unlike standard techniques, we do not rely on the feedback pulse properties, which enables a broader application of our technique to band-pass or VCO-based $\Sigma \Delta $ modulators. In this paper, we present the basic theory of this technique and its application to some practical examples, showing a good matching between prediction and numerical simulation. [ABSTRACT FROM AUTHOR]

This paper studies the automation of the distortion analysis of multistage operational amplifiers by a symbolic analysis. The goal is to generate the readable closed-form design equations that relate the frequency-dependent harmonic distortion (HD) features, such as dc level, corner frequency, peaking, and zero, to the circuit parameters (including the nonlinearity coefficients). Prior research achieved such kind of characterization by carrying out the traditional signal-flow graph (SFG) analysis, which is highly algebra-involved and depends mainly on the manual derivation. This paper achieves automation by formulating a multiport circuit analysis strategy and applying a topological symbolic analysis method as an intermediate step in generating nodal transfer functions. The frequency-dependent HD factors are then characterized by analytically forming proper virtual current sources associated with the nonlinearity of each stage, modeled by a cubic polynomial. Implementation shows that the proposed tool can generate approximate closed-form HD characterization with comparable accuracy to full transistor-level simulation. The proposed automation tool can substantially mitigate heavy manual derivation work required by the existing SFG-based methods. Theory, software implementation, and circuit application are covered in detail. [ABSTRACT FROM AUTHOR]

S-type locally-active memristor (LAM) has a great potential for brain- inspired neuromorphic computing, where the S-type LAM-based oscillator is a fundamental building block. Concerning the S-type LAM, this paper constructs a material-independent model in simple mathematical expression, which can be relatively easily analyzed. By biasing the memristor into the locally- active region, and connecting it with a capacitor, a second-order oscillator can be built. The small-signal equivalent circuit of the memristor and its frequency response are applied to determine the period oscillation frequency range and compensation capacitance. Hopf bifurcation theory is used to analyze oscillation mechanism of the second-order circuit and appropriate capacitance. By adding an extra inductor into the second-order oscillator, a novel third-order chaotic circuit is developed, where a saddle-focus is derived to create chaos. Its dynamic characteristics are investigated via Lyapunov exponents, bifurcation diagrams, dynamic route map, and so on. The local activities of the single memristor, second-order oscillator, and third-order chaotic circuit are verified through the mathematical analysis. Finally, physical circuit realizations of the S- type LAM-based oscillators, including the memristor emulator, are presented. Both simulation and experimental results demonstrate the practicability of the proposed mathematical model and the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

Resampling technology is becoming increasingly critical, as different frequency components are required to be measured in one device. In this paper, a resampling method based on filter designed by window function is proposed to satisfy the requirements of different sampling rates. The frequency responses of the filter in the resampling model based on the Farrow structure are investigated, and the design criterion of the filter in the resampling model is proposed. A fractional delay filter design model based on window function method is established. A fractional delay filter coefficient matrix, which is expressed by a polynomial form, is constructed. Then, the expression related to the subfilter coefficients is obtained and subfilter coefficients are solved by the least-square method. The simulation results show that the filter designed by the proposed method has better performance when used for resampling as compared those designed by existing methods, and can efficiently prevent the occurrence of frequency aliasing and mirroring components in the process of sampling rate conversion. Therefore, the proposed method meets the conditions for application to existing measurement devices. [ABSTRACT FROM AUTHOR]

Conventional design and optimization of passive compensation network (PCN) for inductive power transfer (IPT) system are based on specific topologies. The demerits of this design method are: i) The topology is mostly chosen by experience; ii) The design parameters are not multi-objective optimal. Aiming at these issues, this paper proposes an optimal PCN design scheme based on evolutionary algorithm (EA) to synchronously optimize the topology and parameters of PCN for IPT system. Firstly, a unified mathematical model of the PCN is presented and derived by transmission matrix. Then, according to the mathematical model, the multi-objective functions (such as output fluctuation and efficiency) as well as the constraints (such as load and coupling coefficient) for the optimal PCN design are established. The EA based multi-objective optimal PCN design algorithm is further constructed. Six optimal results are obtained using the algorithm, and one optimized PCN having minimum output current fluctuation and high-efficiency is chosen to validate the effectiveness of the proposed design scheme in experiment. For the given IPT system with the optimized PCN, the maximum fluctuation of output current is no more than 11%, within 200% of load variation and about 77% of coupling variation. [ABSTRACT FROM AUTHOR]

This paper provides a framework of designing distributed model predictive controller to reach consensus of a heterogeneous time-varying multi-agent system, and the dynamics of heterogeneous agents are modeled by double integrators and Euler-Lagrange (EL) equations. Firstly, a DMPC-based consensus algorithm is proposed, where the constraints in the algorithm depend on the heterogeneous dynamics. We prove that the resultant DMPC optimization problem is feasible with the designed controllers, which is stable when the system reaches consensus. To further reduce communication cost and solve the problem with asynchronous discrete-time information exchange, self-triggered mechanism is introduced into the framework. Trigger intervals are alternatively optimized with the control inputs, and the influence on the system performance is analyzed. Numerical examples are provided to verify the effectiveness and advantages of the proposed algorithms. [ABSTRACT FROM AUTHOR]

Ultra-low-power circuits that can work under a low-voltage supply are in great demand in future wearable biomedical applications, which tend to be integrated with low-output-voltage energy harvesting devices. In this paper, we present a low-voltage low-power continuous-time low-pass filter (CT-LPF), which is indispensable in biomedical systems. When a low-voltage supply is used, it is necessary to make the output quiescent voltage ($\text{V}_{\mathrm {Q}}$) stable in the LPF, otherwise the dynamic range will be reduced. Conventional Source-follower (SF) based topologies can achieve ultra-low-power consumption. However, the difference of the input and output $\text{V}_{\mathrm {Q}}$ is sensitive to process and temperature variations. In this work, a complementary SF based topology with a bulk-common-mode-feedback (B-CMFB) circuit is proposed to keep the output $\text{V}_{\mathrm {Q}}$ tracking the input $\text{V}_{\mathrm {Q}}$ and immune to the process and temperature variations. A 4th-order LPF using the proposed topology has been implemented in a standard $0.18~\mu \text{m}$ CMOS process, which achieves a power consumption of only 3.69-nW under a 0.5-V voltage supply with a bandwidth of 200 Hz. Measurement results show that the input-referred noise is $91.9~\mu \text{V}_{\mathrm {rms}}$. The IIP3 is 5.0 dBm and the dynamic range (DR) is 48.5 dB. The active chip area is only 0.074 mm2. The proposed LPF achieves both ultra-low power consumption with a 0.5-V supply and a stable output $\text{V}_{\mathrm {Q}}$ immune to process and temperature variations, which is suitable for low-supply-voltage biomedical systems. [ABSTRACT FROM AUTHOR]

In this paper, a new phase error analysis is introduced for rotary traveling wave oscillators (RTWOs). Two new analytical approaches are used to extract closed-form equations for the RTWOs phase error arising from asymmetric resonator and inequality of negative transconductors. Derived equations show that the phase error can be cancelled and even controlled by adjusting the bias current of negative transconductors without any undesirable changing in oscillation frequency. This characteristic is then used for introducing a new phase error calibration method for RTWOs. This calibration method is not limited by the problems that limit the usage of the prior calibration technique. Our theoretical results are compared with accurate simulations to evaluate the validity of the proposed analysis and accuracy of the closed-form equations. Simulations have been done in 0. 18- $\mu$ m CMOS technology with a 1.8-V supply voltage. The evaluations show good agreement between analytical phase-error equations and simulation results. Also, appropriate simulations confirm the validity of the calibration method that is introduced in this paper. [ABSTRACT FROM AUTHOR]

This paper presents a wide bandwidth inverter-based continuous time sigma delta (CTSD) analog-to-digital converter (ADC) with a latency-free calibration to suppress the nonlinearity originating from the feedback digital-to-analog converter (DAC). The modulator in the ADC uses a fourth-order architecture with 4-bit quantization. To compensate the excess loop delay (ELD), the proportional-integrating element (PI-element) is employed in the loop filter where the problem of no real solution in conventional PI-element compensation method is solved. In addition, the two-stage inverter-based amplifiers are used in the loop filter to improve power efficiency. To suppress nonlinearity of the 4-bit DAC, a background calibration method based on modified quantizer is proposed which would not introduce additional latency thus ensuring stability of the modulator. The CTSD ADC achieves 64.6 dB SNDR and 71.2 dB SFDR over a 75 MHz signal bandwidth before calibration, and the SNDR and the SFDR can be improved to 67.3 dB and 82.3 dB respectively after calibration. The ADC consumes 38 mW from supply voltages of 1.1/1.8 V with an active area of 0.675 mm2 in 40 nm CMOS. [ABSTRACT FROM AUTHOR]

This paper presents a low bit error rate (BER) strong PUF based on the dynamically amplified subthreshold current array (DA-SCA) with cell-bias-based challenge-response-pairs (CRPs) filtering method. The highly nonlinear subthreshold characteristic of the DA-SCA ensures a strong resilience to machine learning (ML) attacks and it simultaneously achieves low power and compact area. The current difference of two SCAs originated by the manufacturing process is amplified and converted into a voltage difference which is further digitized by the background offset-calibrated oscillator collapse-based comparator. Fabricated in 65 nm CMOS LP technology, the 64-bit DA-SCA PUF shows an average BER of 4.7% in the worst case for the temperature range of −20 to 80° and a supply variation of ±10%. Moreover, the proposed cell-bias-based CRPs filtering method dramatically suppresses the BER to 0.04% while discarding only 9.5% CRPs. The power consumption of the proposed PUF is merely $2.4~\mu \text{W}$ at 125 Kb/s and it occupies 0.024 mm2, including the on-chip calibration circuit. The proposed PUF demonstrates resistance against machine learning (ML) attacks across 100K training samples, limiting the prediction accuracy to ~50%. [ABSTRACT FROM AUTHOR]

This paper presents an iterative and decoupled perturbative stochastic Galerkin (SG) method for the variability analysis of stochastic linear circuits with a large number of uncertain parameters. State-of-the-art implementations of polynomial chaos expansion and SG projection produce a large deterministic circuit that is fully coupled, thus becoming cumbersome to implement and inefficient to solve when the number of random parameters is large. In a perturbative approach, component variability is interpreted as a perturbation of its nominal value. The relaxation of the resulting equations and the application of a SG method lead to a decoupled system of equations, corresponding to a modified equivalent circuit in which each stochastic component is replaced by the nominal element equipped with a parallel current source accounting for the effect of variability. The solution of the perturbation problem is carried out in an iterative manner by suitably updating the equivalent current sources by means of Jacobi- or Gauss-Seidel strategies, until convergence is reached. A sparse implementation allows avoiding the refinement of negligible coefficients, yielding further efficiency improvement. Moreover, for time-invariant circuits, the iterations are effectively performed in post-processing after characterizing the circuit in time or frequency domain by means of a limited number of simulations. Several application examples are used to illustrate the proposed technique and highlight its performance and computational advantages. [ABSTRACT FROM AUTHOR]

This paper addresses a general method for parameter identification in distributed parameter systems (DPSs) based on a reference model and measurement information. Moreover, the developed identification method is used to deal with secure communication problems. Firstly, in combination with the historical information measured by sensors, an iterative approach based on an approximator is put forward. Meanwhile, an execution scheme for the iterative approach is provided by an optimization policy. Subsequently, by bringing new mechanisms into quantum particle swarm optimization (QPSO) algorithm to enhance its search capability, we propose quantum-leading-following-based optimization (QLFBO) algorithm, which serves the optimization policy. Further, the global convergence for QLFBO algorithm is proved combined with the parameter identification problem of DPSs, and the computational complexity on this algorithm is discussed in detail. Finally, simulation experiments on the diffusion-reaction model are carried out by the iterative approach based on QLFBO algorithm under different measurement ways. Simultaneously, secure communication depending on this model is performed in the double-scroll Chua’s circuit and a lotus image via the investigated iterative strategy and encryption-decryption scheme. Simulation results verify the validity and practicability of the developed method. [ABSTRACT FROM AUTHOR]

In this paper, $H_\infty $ control problem is investigated by off-policy integral reinforcement learning (IRL) method for the nonlinear systems with completely unknown dynamics, disturbances, and constrained-input. Firstly, according to a model-based policy iteration (PI) algorithm, a model-free algorithm is proposed based on the derived iterative equation, and the equivalence of model-based PI algorithm and model-free algorithm is proven. Then, the model-free algorithm is implemented by off-policy IRL technology to solve the Hamilton-Jacobi-Isaacs (HJI) equation with the collected system data by the least-square approach, where three neural networks (NNs) are constructed to approximate the value function, control and the disturbance. Finally, our proposed methods are applied to stabilize an autonomous third-order Chua’s chaotic circuit system and a non-autonomous second-order memristive chaotic circuit system to illustrate the efficiency of the proposed method. [ABSTRACT FROM AUTHOR]

In the memristive version of a standard space-invariant Cellular Nonlinear Network, each cell accommodates one first-order non-volatile memristor in parallel with a capacitor. In case, the resistance switching memory may only undergo almost-instantaneous switching transitions between two possible resistive states, acting at any time, as either the on or the off resistor, the processing elements effectively operate as first-order dynamical systems, and the classical Dynamic Route Map technique may be applied to investigate their operating principles. On the contrary, in case the memristors experience smooth conductance changes, as the bioinspired array implements memcomputing paradigms, each cell truly behaves as a second-order dynamical system. The recent extension of the Dynamic Route Map analysis tool to systems with two degrees of freedom constitutes a powerful technique to investigate the nonlinear dynamics of memristive cellular networks in these scenarios. This paper exploits this system-theoretic technique, called Second-Order Dynamic Route Map, to introduce a novel systematic procedure to design memristive arrays, in which a given memcomputing task is executed by ensuring that, depending upon the network inputs and initial conditions, the analogue dynamic routes of the states of the processing elements, namely capacitor voltages and memristor states, asymptotically converge toward pre-defined stable equilibria. [ABSTRACT FROM AUTHOR]

This paper presents a wakeup timer in 40-nm CMOS for Internet-of-Things (IoT) applications based on a bang-bang Digital-intensive Frequency-Locked Loop (DFLL). A self-biased $\Sigma \Delta $ Digitally Controlled Oscillator (DCO) is locked to an RC time constant via a feedback loop consisting of a single-bit chopped comparator and a digital loop filter, thus maximizing the use of digital circuits while keeping only the RC network and the comparator as the sole analog blocks. Analysis and behavior level simulations of the DFLL have been carried out to guide the optimization of the long-term stability and frequency accuracy of the timer. High frequency accuracy and a $10\times $ enhancement of long-term stability is achieved by the adoption of chopping to reduce the effect of comparator offset and 1/f noise and by the use of $\Sigma \Delta $ modulation to improve the DCO resolution. Such highly digitized architecture fully exploits the advantages of advanced CMOS processes, thus enabling operation down to 0.7 V and a small area (0.07 mm2). The proposed timer achieves the excellent energy efficiency (0.57 pJ/cycle at 417 kHz at 0.8-V supply) over prior art while keeping excellent on-par long-term stability (Allan deviation floor < 20 ppm) and temperature stability (33 ppm°Cat 0.8-V supply). [ABSTRACT FROM AUTHOR]

In this paper, we propose new algebraic Gramians for continuous-time switched linear systems, which satisfy generalized Lyapunov equations. The main contribution of this paper is twofold. First, we show that the ranges of those Gramians encode the reachability and observability spaces of a switched linear system. As a consequence, a simple Gramian-based criterion for reachability and observability is established. Second, a balancing-based model order reduction technique is proposed and, under some sufficient conditions, stability preservation and an error bound are shown. Finally, the efficiency of the proposed method is illustrated by means of numerical examples. [ABSTRACT FROM AUTHOR]

In this paper, the start-up response of a digitally controlled dc-dc boost converter with a constant power load is studied. A mathematical expression of the system response during start-up is derived using a nonlinear averaged model. The time-domain response of the system during start-up when the converter is operating under current limitation mode is derived by analytically integrating the mathematical equations describing the dynamic behavior. Numerical simulations from a detailed switched model validate the theoretical results and a good agreement is obtained. A boost converter prototype is built to validate the theoretical finding and the numerical simulations. It is observed that even when the analysis and the simulation predict zero inrush current, the experimental circuit still exhibits an unsuitable initial current peak and an unacceptable transient response during start-up. This phenomenon is mainly attributed to the presence of an unavoidable delay due to the computation time required by the digital control platform. The resulting inrush current is more pronounced in the presence of nonlinear load such as a CPL and saturable inductor. Some solutions are proposed to mitigate the inrush current problems. Simulations results taking into account the delay and experimental measurements demonstrate the validity of the proposed solutions. [ABSTRACT FROM AUTHOR]

This paper introduces a new, reference trajectory following, sliding-mode control strategy for disturbed discrete-time systems. The strategy uses an external trajectory generator based on a switching type reaching law. The trajectory following strategy not only ensures all the properties of the quasi-sliding-mode as defined by Gao et al., but with a certain choice of the control parameters it also guarantees a significant reduction of the quasi-sliding-mode band width and the errors of all the state variables. This paper also considers the problem of error calculation in the discrete-time, reaching law based sliding-mode control systems. It is shown that the limitation of the sliding variable in the sliding phase directly results in bounded errors of all state variables. The results are verified with a simulation example. [ABSTRACT FROM AUTHOR]

In this paper, we investigate the proper orthogonal decomposition (POD) method to numerically solve the forward Kolmogorov equation (FKE). Our method aims to explore the low-dimensional structures in the solution space of the FKE and to develop efficient numerical methods. As an important application and our primary motivation to study the POD method to FKE, we solve the nonlinear filtering (NLF) problems with a real-time algorithm proposed by Yau and Yau combined with the POD method. This algorithm is referred as POD algorithm in this paper. Our POD algorithm consists of offline and online stages. In the offline stage, we construct a small number of POD basis functions that capture the dynamics of the system and compute propagation of the POD basis functions under the FKE operator. In the online stage, we synchronize the coming observations in a real-time manner. Its convergence analysis has also been discussed. Some numerical experiments of the NLF problems are performed to illustrate the feasibility of our algorithm and to verify the convergence rate. Our numerical results show that the POD algorithm provides considerable computational savings over existing numerical methods. [ABSTRACT FROM AUTHOR]

Because of a powerful temporal-difference (TD) with $\lambda $ [TD($\lambda $)] learning method, this paper presents a novel $n$ -step adaptive dynamic programming (ADP) architecture that combines TD($\lambda $) with regular TD learning for solving optimal control problems with reduced iterations. In contrast with a backward view learning of TD($\lambda $) that is required an extra parameter named eligibility traces to update at the end of each episode (offline training), the new design in this paper has forward view learning, which is updated at each time step (online training) without needing the eligibility trace parameter in various applications without mathematical models. Therefore, the new design is called the online model-free $n$ -step action-dependent (AD) heuristic dynamic programming [NSHDP($\lambda $)]. NSHDP($\lambda $) has three neural networks: the critic network (CN) with regular one-step TD [TD(0)], the CN with $n$ -step TD learning [or TD($\lambda $)], and the actor network (AN). Because the forward view learning does not require any extra eligibility traces associated with each state, the NSHDP($\lambda $) architecture has low computational costs and is memory efficient. Furthermore, the stability is proven for NSHDP($\lambda $) under certain conditions by using Lyapunov analysis to obtain the uniformly ultimately bounded (UUB) property. We compare the results with the performance of HDP and traditional action-dependent HDP($\lambda $) [ADHDP($\lambda $)] with different $\lambda $ values. Moreover, a complex nonlinear system and 2-D maze problem are two simulation benchmarks in this paper, and the third one is an inverted pendulum simulation benchmark, which is presented in the supplemental material part of this paper. NSHDP($\lambda $) performance is examined and compared with other ADP methods. [ABSTRACT FROM AUTHOR]

This paper proposes scalable, distributed algorithms for solving linear equations by integrating two mechanisms, termed consensus and conservation, in double-layered multiagent networks. The multiagent network considered in this paper is composed of clusters and each cluster consists of an aggregator and a subnetwork of agents. By achieving consensus and conservation through agent–agent communications in the same cluster and aggregator–aggregator communications among different clusters, respectively, distributed algorithms are devised for agents to cooperatively achieve a solution to the overall linear equation. These algorithms outperform existing algorithms, including but not limited to the following aspects—first, each agent does not have to know as much as a complete row or column of the overall equation; second, each agent only needs to control as few as two scalar states when the number of clusters and the number of agents are sufficiently large; third, the dimensions of agents’ states in the proposed algorithms do not have to be the same (while in contrast, algorithms based on the idea of standard consensus inherently require all agents’ states to be of the same dimension). Both analytical proof and simulation results are provided to validate exponential convergence of the proposed distributed algorithms in solving linear equations. [ABSTRACT FROM AUTHOR]