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This paper presents a new class of switched tank converters (abbreviated as STCs) for high-efficiency high-density nonisolated dc–dc applications where large voltage step down (up) ratios are required. Distinguished from switched capacitor converters, the STCs uniquely employ LC resonant tanks to partially replace the flying capacitors for energy transfer. Full soft charging, soft switching, and minimal device voltage stresses are achieved under all operating conditions. The STCs feature very high efficiency, power density, and robustness against component nonidealities over a wide range of operating conditions. Furthermore, thanks to the full resonant operation, multiple STCs can operate in parallel with inherent droop current sharing, offering the best scalability and control simplicity. These attributes make STC a disruptive and robust technology viable for industry's high volume adoption. A novel equivalent DCX building block principle is introduced to simplify the analysis of STC. A 98.9% efficiency STC product evaluation board (4-to-1, 650 W) has been developed and demonstrated for the next-generation of 48-V bus conversion for data center servers. [ABSTRACT FROM AUTHOR]

In this paper, the design methodology of switched-tank converter (STC) is presented. The power loss breakdown analysis is conducted to point out the directions and paths for components optimization. It is revealed that the switching device conduction loss, printed circuit board (PCB) loss, and inductor loss become significant when output power is >150 W. Power loss of four switches is calculated and compared for switching device selection. The resonant capacitor is carefully designed to meet both current stress and ripple requirements. On the other hand, optimal design of the resonant inductors and PCB layout are fully investigated. The core loss model is provided, and different core materials are compared to minimize the core loss. Besides, a fine-tuned inductor winding structure is designed to achieve the lowest winding loss. Furthermore, PCB layout is optimized to get short loop length for each operation state. In addition to the hardware level optimization, an improved control method is proposed, in which the conduction time of switching devices is tuned to mitigate the circulating power. To verify the optimization work, a prototype of STC is built and tested. The experimental results indicate that a state-of-the-art performance of 98.71% efficiency and a 1000 W/in3 high power density is achieved. [ABSTRACT FROM AUTHOR]