Search

Pulsewidth-modulated (PWM) current-source converters (CSCs) have the features of simple configuration, reliable short-circuit protection, and sinusoidal ac output voltages. The conventional space-vector modulation (SVM) scheme usually generates high-magnitude low-order harmonics in CSCs with low switching frequency. In this article, two modified SVM schemes, namely MSVM1 and MSVM2, are proposed to improve the harmonic performance for PWM CSCs in the high-power applications with low switching frequencies. The MSVM1 scheme focuses on eliminating the average dwell-time error of current vectors within each sampling period, while the MSVM2 scheme is targeted to achieve the accurate dwell time of current vectors as that of the natural sampling-based SVM scheme. The theoretical analysis and the calculation equations of dwell time are derived for both MSVM1 and MSVM2. The experiments are given to verify the effectiveness of the two modified SVM schemes in improving the harmonic performance of high-power CSCs with low switching frequencies. [ABSTRACT FROM AUTHOR]

This article proposes an improved space vector modulation (SVM) for the current-source rectifier (CSR). Due to the overlap time during commutations of power switches, the pulsewidth-modulation (PWM) currents of CSR may suffer from a number of low-order (mainly fifth and seventh) harmonics, which seriously degrade the harmonic performance of currents and voltages on the grid side. Especially, the overlap-time effect becomes an important issue when the increased switching frequency is applied to CSR. To mitigate these low-order harmonics of the PWM converter currents resulted from the overlap-time effect, the relationship between the overlap time and the low-order harmonics in PWM currents and grid currents are analyzed at first. Then, the design process of the LC filter and the proposed SVM with optimal overlap-time distribution is presented in details. Finally, experimental results are conducted on a low power laboratory prototype to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a novel space vector modulation (SVM) strategy is proposed and designed for dual three-phase three-level motor drives based on vector space decomposition (VSD), which could be applied for high-power and high-reliability applications. The key of the proposed method is to design two decoupled groups of voltage vector candidates for synthesis on α − β subspace and x − y subspace, respectively. The two decoupled groups of voltage vectors will synthesize respective voltage references on α − β subspace and x − y subspace, while having no impact on each other. The redundant small voltage vectors and zero-sequence voltage vectors are utilized to mitigate voltage oscillation in midpoint of dc link and suppress zero-sequence current component for dual three-phase windings with a common neutral. For comparison, another VSD-SVM strategy is designed based on traditional solution, which cannot offer closed-loop control on x − y subspace. Both simulation and experiments have been given to verify that the proposed decoupled VSD-SVM can suppress harmonic components on x − y subspace besides tracking torque components on α − β subspace. Furthermore, the harmonic performance of the proposed decoupled VSD-SVM has been compared with the traditional VSD-SVM strategy and the carrier disposition based pulsewidth modulation. [ABSTRACT FROM AUTHOR]

This paper studies and proposes the vector space decomposition-based direct torque control (DTC) scheme for the T-type neutral-point-clamping (T-NPC) three-level inverters-fed double-stator-winding permanent magnet synchronous machine (PMSM) drive, which provides an effective solution for high-power high-reliability applications. The key is to propose a simple but effective space vector modulation (SVM) for DTC of T-NPC double-stator-winding drives-based two-step voltage vector synthesis, in such a way that good dynamic response and harmonic performance are obtained. The closed-loop controllers on harmonic subspace are incorporated to suppress the possible harmonics induced from back electromotive force and unbalanced parameters in phase windings of electrical machine. Furthermore, a hybrid current control is proposed for fault-tolerant operation of the T-NPC double-stator-winding PMSM drives under one-phase open-circuit conditions. In the hybrid current controller, the healthy winding still uses the SVM-DTC control while the faulty winding uses the closed-loop current controller to track the optimized current references. Both simulation and experimental results are presented to verify the performance of the proposed switching strategies and control schemes. [ABSTRACT FROM AUTHOR]

In this paper, three control schemes with variable switching frequencies are proposed and analyzed for the paralleled voltage source inverters (VSIs) fed permanent magnet synchronous motor (PMSM) drive. The proposed schemes could be applied in the low-speed operation region of high-power drive system, where the frequency modulation index is high. First, the field-oriented control (FOC) with phase-shifted chaotic space vector modulation (SVM) under synchronous frame and the FOC with phase-shifted chaotic sinusoidal pulse width modulation under stationary frame is proposed for the paralleled VSIs fed PMSM drive. The proposed phase-shifted chaotic PWM schemes not only eliminate specific switching harmonics completely but also suppress all remaining switching harmonic peaks in the spectrum. The avoidance of inherent circulating current is also considered in designing these two schemes. Second, the direct torque control (DTC) for the paralleled VSIs fed PMSM drive is proposed with circulating current suppression. Besides inheriting the advantages of DTC, the output currents of paralleled VSIs are kept balanced. The working principles of these three methods are presented in detail. Experimental results on a laboratory prototype are given to verify the validity of the three proposed control schemes for the paralleled VSIs fed PMSM with variable switching frequencies. [ABSTRACT FROM PUBLISHER]

In this paper, a current-source-converter (CSC)-based high-power high-speed (HPHS) permanent-magnet synchronous motor drive is proposed for high-speed compressor applications. The most important feature of the proposed CSC-fed HPHS drive is that the switching frequency is limited to 420 Hz at 200-Hz fundamental frequency. In the drive system, the whole operation range is divided into three regions, namely, the high-, medium-, and low-speed regions, where different modulation strategies and control schemes are used with the requirement of switching frequency and output filter. In particular, a two-pulse space vector modulation with dynamic capacitor voltage control is proposed for the high-speed region to achieve better dynamic and harmonic performance. Both simulation and experiments verify the proposed control strategy. [ABSTRACT FROM PUBLISHER]

In this paper, a hybrid pulsewidth modulation (PWM) scheme is proposed to suppress the LC resonance for the high-power current-source inverter (CSI) fed drives with low switching frequency. In CSI drive systems, the selective harmonic elimination (SHE) is selected due to the better performance of harmonics, but the LC resonance cannot be effectively damped due to the lack of control flexibility of SHE. In this paper, SHE is only used for the steady-state operation. The modulation scheme is then switched to space vector modulation with dynamic capacitor voltage control when the transient event occurs. The smoothed transitions between different modulation schemes are proposed. The proposed hybrid method effectively solves the resonant issues in CSI drives, while maintaining the power quality. Both simulation and experiments verify the performance of the proposed hybrid PWM scheme. [ABSTRACT FROM AUTHOR]