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The grid inverters play an important role in renewable energy systems, transferring the dc power to the ac grid. Galvanic isolation is usually needed between the dc source and the grid due to safety reasons and grounding leakage current mitigation. In this article, a soft-switching isolated grid inverter is proposed based on the current-fed matrix-type configuration. The topology of this converter is composed of a current-fed H-bridge on the side of dc source and a direct matrix converter on the grid side, which are linked by a high-frequency transformer. The current-fed H-bridge on the primary-side can smooth the dc-source current and control the dc-source current directly. The avoidance of dc-link energy-storage element in the single-stage matrix converter can prolong the system's life. A space-vector-modulation-based soft-switching scheme is proposed for the matrix converter on the grid side and a model-based commutation method is adopted in the current-fed H-bridge on the dc side. With the proposed modulation methods, the soft switching can be realized for all devices in the converter. Finally, a laboratory prototype of the proposed converter has been built to verify the effectiveness of the proposed method experimentally. [ABSTRACT FROM AUTHOR]

Pulsewidth-modulated (PWM) current-source converters (CSCs) have the features of simple configuration, reliable short-circuit protection, and sinusoidal ac output voltages. The conventional space-vector modulation (SVM) scheme usually generates high-magnitude low-order harmonics in CSCs with low switching frequency. In this article, two modified SVM schemes, namely MSVM1 and MSVM2, are proposed to improve the harmonic performance for PWM CSCs in the high-power applications with low switching frequencies. The MSVM1 scheme focuses on eliminating the average dwell-time error of current vectors within each sampling period, while the MSVM2 scheme is targeted to achieve the accurate dwell time of current vectors as that of the natural sampling-based SVM scheme. The theoretical analysis and the calculation equations of dwell time are derived for both MSVM1 and MSVM2. The experiments are given to verify the effectiveness of the two modified SVM schemes in improving the harmonic performance of high-power CSCs with low switching frequencies. [ABSTRACT FROM AUTHOR]

In this article, the control strategy is studied for the neutral-point-clamped three-level inverter-fed dual three-phase permanent-magnet synchronous motor (PMSM) drive with low switching frequencies. An interleaved finite-control-set model predictive control (MPC) scheme is proposed, where a two-layer MPC is designed to solve the multiobjective optimization problem. The two sets of windings in PMSM are sampled and controlled in an interleaved way so that the control delay and the prediction horizon of the drive system are reduced by half. Moreover, the proposed interleaved control scheme increases the equivalent sampling and control frequency from the perspective of the whole drive system, and thus provides better steady-state performance and dynamic performance. With the switching states of one inverter remaining unchanged, the cross traversal of vector candidate sets between two sets of windings is avoided, and the computational burden can be reduced effectively. Experimental results are given to verify the validity and effectiveness of the proposed interleaved control scheme. [ABSTRACT FROM AUTHOR]

This article proposes an improved space vector modulation (SVM) for the current-source rectifier (CSR). Due to the overlap time during commutations of power switches, the pulsewidth-modulation (PWM) currents of CSR may suffer from a number of low-order (mainly fifth and seventh) harmonics, which seriously degrade the harmonic performance of currents and voltages on the grid side. Especially, the overlap-time effect becomes an important issue when the increased switching frequency is applied to CSR. To mitigate these low-order harmonics of the PWM converter currents resulted from the overlap-time effect, the relationship between the overlap time and the low-order harmonics in PWM currents and grid currents are analyzed at first. Then, the design process of the LC filter and the proposed SVM with optimal overlap-time distribution is presented in details. Finally, experimental results are conducted on a low power laboratory prototype to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

A feedback linearization based direct torque control (FL-DTC) scheme is designed for interior permanent magnet synchronous motors drives. Several main aspects related to FL are studied thoroughly. A proper choice of two new state variables (the torque and the squared amplitude of stator flux) yields the exact input–output linearization decoupling of the closed-loop system. The FL-DTC frame is obtained after finding a feasible diffeomorphism. For the partially linearized subsystem, i.e., the independent torque and flux loops, two FL-DTC-based controller design solutions are provided. The control problem of internal dynamics is converted to an absolute tracking problem of an equivalent Lur'e system. [ABSTRACT FROM AUTHOR]

The silicon carbide (SiC) devices have attracted more and more attention due to the capability of withstanding higher blocking voltage, higher switching frequency, and higher temperature. However, challenges for SiC devices applied in voltage-source-inverter fed motor drives such as electromagnetic interference (EMI) issues and limited over-current capability still limit the further application of SiC devices. In this article, a novel SiC devices based zero-voltage-switching (ZVS) current-source-inverter (CSI) is proposed for permanent-magnet synchronous motor (PMSM) drive. The key is to propose an auxiliary resonant circuit, which achieves ZVS conditions for all switches in power circuits and reduces the dv/dt of high speed SiC devices. The resonant capacitor in the auxiliary circuit can clamp overvoltage caused by possible open-circuit faults. To further reduce the EMI, the random switching frequency pulsewidth modulation is designed for the proposed CSI motor drive. The system configuration, working principle, circuit design, and control schemes are described in detail. Both simulations and experiments are presented to verify the effectiveness of the proposed ZVS-CSI fed PMSM drive system. [ABSTRACT FROM AUTHOR]

In this article, a composite torque regulator is proposed for optimizing the torque tracking performance in direct torque-controlled permanent-magnet synchronous motor drives. In the proposed composite torque regulator, two new variable hysteresis bands are designed and combined with two constant hysteresis bands. In the conventional direct torque control (DTC) scheme, the torque increasing rate and decreasing rate are changed with different speeds and loads. Thus, the average torque will deviate the reference torque seriously under some operation states. With torque deviation, the reference torque can hardly reflect the actual electromagnetic torque, and the torque tracking becomes more difficult and unsatisfactory in dynamic process. On the other hand, the time delay of one sampling period further deteriorates the precision of torque tracking. By introducing the proposed composite torque regulator, both torque deviation and the impact of time delay on the torque ripple can be eliminated. In addition, the advantages of the conventional DTC scheme, namely low switching frequency, fast dynamic response, simple structure, and independence of motor parameters, can be reserved in the proposed DTC scheme with a composite torque regulator. Experimental results are presented to verify the effectiveness of the proposed scheme and compare its performance with the conventional DTC scheme. [ABSTRACT FROM AUTHOR]

In this article, the control scheme and switching strategies are studied for a dual three-phase hybrid permanent-magnet alternating current (PMAC) motor drive. Both high-coercive-force permanent magnets NdFeB and low-coercive-force permanent magnets AlNiCo are mounted on the rotor in order to provide high torque density and adjustable flux for electrical machine. The asymmetric dual three-phase windings can share the large currents for magnetization or demagnetization of AlNiCo, while offering low torque ripple and high fault-tolerant capability in the drive. The operation principle of the dual three-phase hybrid PMAC drive is presented in detail. In particular, a collaborative switching strategy is proposed for the drive based on five-segment space vector modulation. By optimizing the switching sequences of the two three-phase inverters collaboratively, the proposed switching strategy can mitigate the dc-link current ripple effectively under both normal loading condition and flux-tuning processes. Both theoretical analysis and experimental results are given to verify that the proposed switching strategy offers better performance in suppressing the dc-link current ripple compared to previous strategies. It facilitates overcoming the challenges of large current stresses in dc-link capacitors of flux-adjustable PMAC drives. [ABSTRACT FROM AUTHOR]

Doped HfO2-based ferroelectric field-effect transistor (FeFET) is being actively explored as an emerging nonvolatile memory device with the potential for in-memory computing. In this work, we identify a new challenge of ferroelectric partial switching, namely “history effect” in minor loop dynamics. We experimentally demonstrate the minor loop dynamics in both ferroelectric capacitor (FeCap) and 28-nm FeFET in Part I. In this article, a physics-based phase-field multidomain switching model is used to understand the origin. Even though the device may have the same polarization state that is externally observable, its internal domain configuration varies depending on its history. We model such history effect into the FeFET-based neural network simulation and analyze its negative impact on the training accuracy and then propose a possible mitigation strategy. [ABSTRACT FROM AUTHOR]

Doped HfO2-based ferroelectric field-effect transistor (FeFET) is being actively explored as an emerging nonvolatile memory device with the potential for in-memory computing. In this work, we identify a new challenge of ferroelectric partial switching, namely “history effect” in minor loop dynamics. We develop a testing protocol to experimentally measure different transition paths in both ferroelectric capacitors (FeCap) and 28-nm high-k metal-gate (HKMG) FeFET in Part I. The measurement results suggest that the intermediate states programming condition depends on the prior states that the device has gone through, and the condition may vary even when the transition occurs between the same starting and ending states. In Part II, a physics-based phase-field multidomain switching model is used to understand the origin of the history effect. [ABSTRACT FROM AUTHOR]

Ferroelectric-doped HfO2-based ferroelectric field-effect transistors (FeFETs) are being actively explored as emerging nonvolatile memory devices with the potential for in-memory computing. In this two-part article, we explore the feasibility of FeFET-based 3-D NAND architecture for both in situ training and inference. To address the challenge of erase-by-block in NAND-like structure, we propose and experimentally demonstrate the drain–erase scheme to enable the individual cell’s program/erase/inhibition, which is necessary for individual weight update in in situ training. We describe the device characterization of different drain–erase conditions and results in this article. The experimental conditions are characterized on 22-nm fully depleted silicon-on-insulator (FDSOI) and 28-nm high-k metal gate (HKMG) FeFET devices from GLOBALFOUNDRIES. With appropriate biasing, up to 104 ON/OFF ratio could be achieved by drain–erase. The 3-D NAND array architecture design and verification for in-memory computing will be described in Part II of this article. [ABSTRACT FROM AUTHOR]

The problem of leakage-inductor parameter in paralleled current-fed isolated dc/dc system has not been solved. Aiming at solving that problem, a leakage-inductor parameter compensation method is proposed without an additional sensor. It provides tunable reflected voltage for parameter difference individually and compensation loops for parameter uncertainty. Thus, the circulating current and the current stress are minimized, and the voltage spike is avoided. The experimental results are given to validate the effectiveness of the method. [ABSTRACT FROM AUTHOR]

The direct torque control (DTC) is widely used in motion control of electric drives, especially for the switching table based direct torque control (ST-DTC) and the space vector modulation (SVM) based DTC (SVM-DTC). The classical ST-DTC schemes can achieve fast dynamic response but may suffer from distinct torque and flux ripples in steady-state operation. On the other hand, the classical SVM-DTC schemes have lower ripples in torque and flux, but the methods slow down dynamic response of DTC. Different from them, a novel hybrid DTC scheme is proposed for dual three-phase permanent-magnet synchronous motor (PMSM) drives in this paper, which can achieve fast dynamic response of classical ST-DTC scheme and good steady-state performance of classical SVM-DTC scheme simultaneously. The key of the proposed scheme is to implement different torque control methods under dynamic operation mode and steady-state operation mode, respectively. A switching method has been designed to guarantee smooth transition between the two operation modes. Besides, the decoupling control of torque and stator flux is maintained with the proposed control scheme, and the stator flux is controlled stably all along. By experiments on a laboratory prototype, it has been verified that the proposed scheme can achieve both good steady-state and transient performance compared to other control methods for dual three-phase PMSM drives. [ABSTRACT FROM AUTHOR]

In this paper, a novel space vector modulation (SVM) strategy is proposed and designed for dual three-phase three-level motor drives based on vector space decomposition (VSD), which could be applied for high-power and high-reliability applications. The key of the proposed method is to design two decoupled groups of voltage vector candidates for synthesis on α − β subspace and x − y subspace, respectively. The two decoupled groups of voltage vectors will synthesize respective voltage references on α − β subspace and x − y subspace, while having no impact on each other. The redundant small voltage vectors and zero-sequence voltage vectors are utilized to mitigate voltage oscillation in midpoint of dc link and suppress zero-sequence current component for dual three-phase windings with a common neutral. For comparison, another VSD-SVM strategy is designed based on traditional solution, which cannot offer closed-loop control on x − y subspace. Both simulation and experiments have been given to verify that the proposed decoupled VSD-SVM can suppress harmonic components on x − y subspace besides tracking torque components on α − β subspace. Furthermore, the harmonic performance of the proposed decoupled VSD-SVM has been compared with the traditional VSD-SVM strategy and the carrier disposition based pulsewidth modulation. [ABSTRACT FROM AUTHOR]

In this paper, the remedial operation of switch faults will be investigated comprehensively for T-type-three-level-inverter-fed dual three-phase motor drives. The open-circuit switch faults in multiple phase legs are discussed at first. The faulty conditions are classified into five categories. Different remedial strategies, namely Type-I to Type-V schemes, are proposed for different faulty conditions. In particular, three kinds of Type-III fault-tolerant control schemes are proposed by using medium-voltage vectors to synthesize small-voltage vectors, in such a way that the mid-point voltage in a dc link can be stabilized well. Then, the short-circuit faults in both clamping switches and half-bridge switches are investigated. By analysis, their operation conditions are equivalent to conditions loss of both P and N voltage levels and open-phase faults, respectively. Thus, the corresponding remedial strategies can be applied accordingly. Particularly, a voltage compensation control method is proposed for conditions, where open-switch faults coexist with open-phase operation induced by short-circuit faults in half-bridge switches. The validity of all of theoretical analysis and the proposed remedial strategies has been verified by experiments. [ABSTRACT FROM PUBLISHER]

This paper studies and proposes the vector space decomposition-based direct torque control (DTC) scheme for the T-type neutral-point-clamping (T-NPC) three-level inverters-fed double-stator-winding permanent magnet synchronous machine (PMSM) drive, which provides an effective solution for high-power high-reliability applications. The key is to propose a simple but effective space vector modulation (SVM) for DTC of T-NPC double-stator-winding drives-based two-step voltage vector synthesis, in such a way that good dynamic response and harmonic performance are obtained. The closed-loop controllers on harmonic subspace are incorporated to suppress the possible harmonics induced from back electromotive force and unbalanced parameters in phase windings of electrical machine. Furthermore, a hybrid current control is proposed for fault-tolerant operation of the T-NPC double-stator-winding PMSM drives under one-phase open-circuit conditions. In the hybrid current controller, the healthy winding still uses the SVM-DTC control while the faulty winding uses the closed-loop current controller to track the optimized current references. Both simulation and experimental results are presented to verify the performance of the proposed switching strategies and control schemes. [ABSTRACT FROM AUTHOR]

In this paper, three control schemes with variable switching frequencies are proposed and analyzed for the paralleled voltage source inverters (VSIs) fed permanent magnet synchronous motor (PMSM) drive. The proposed schemes could be applied in the low-speed operation region of high-power drive system, where the frequency modulation index is high. First, the field-oriented control (FOC) with phase-shifted chaotic space vector modulation (SVM) under synchronous frame and the FOC with phase-shifted chaotic sinusoidal pulse width modulation under stationary frame is proposed for the paralleled VSIs fed PMSM drive. The proposed phase-shifted chaotic PWM schemes not only eliminate specific switching harmonics completely but also suppress all remaining switching harmonic peaks in the spectrum. The avoidance of inherent circulating current is also considered in designing these two schemes. Second, the direct torque control (DTC) for the paralleled VSIs fed PMSM drive is proposed with circulating current suppression. Besides inheriting the advantages of DTC, the output currents of paralleled VSIs are kept balanced. The working principles of these three methods are presented in detail. Experimental results on a laboratory prototype are given to verify the validity of the three proposed control schemes for the paralleled VSIs fed PMSM with variable switching frequencies. [ABSTRACT FROM PUBLISHER]

In order to achieve the purpose of extending the speed range and reducing power electronics devices for the permanent-magnet linear motor drive system, a half-centralized open-end winding (OEW) topology is studied for rail transit applications in this paper. In this topology, compared with the traditional OEW topology, the number of voltage-source-inverters (VSIs) can be reduced from four to three to drive two OEW movers and all these VSIs share a common dc bus voltage. In order to improve the steady-state performances, a four-vector phase model predictive voltage control (FV-PMPVC) is proposed in this paper. Due to the spatial distribution of phase voltage vector (PVV), an orthometric synthesis principle (OSP) is proposed to calculated the duration time for the vector synthesis, which reduces the computation burden and enhances the robustness. Comparing the existing control method, FV-PMPVC can get similar dynamic performances but better steady-state performances. Additionally, the half-centralized topology using FV-PMPVC can have same speed range while less VSIs are required. The effectiveness of FV-PMPVC is verified by experimental results. [ABSTRACT FROM AUTHOR]

The purpose of this paper is to propose and analyze the high-performance control strategies for a novel current source converter (CSC)-based wind turbine-superconducting magnetic energy storage system (SMES) hybrid system, which will, in turn, improve the operating performance for the wind farm not only in the grid-connected operation, but also in the islanding mode. The key is to design the effective active power controller and the ac bus voltage controller for the CSC-based hybrid system in grid-connected operation. Thus, better power smoothing and robust operation can be achieved. For the islanding mode operation, the capacitor voltage control scheme is proposed for the CSC hybrid system to offer efficient operation when the wind farm is disconnected from the grid. Based on simulation, the performance of the proposed control for the CSC-type wind turbine-SMES hybrid system in the wind farm has been verified. [ABSTRACT FROM PUBLISHER]

In this paper, a current-source-converter (CSC)-based high-power high-speed (HPHS) permanent-magnet synchronous motor drive is proposed for high-speed compressor applications. The most important feature of the proposed CSC-fed HPHS drive is that the switching frequency is limited to 420 Hz at 200-Hz fundamental frequency. In the drive system, the whole operation range is divided into three regions, namely, the high-, medium-, and low-speed regions, where different modulation strategies and control schemes are used with the requirement of switching frequency and output filter. In particular, a two-pulse space vector modulation with dynamic capacitor voltage control is proposed for the high-speed region to achieve better dynamic and harmonic performance. Both simulation and experiments verify the proposed control strategy. [ABSTRACT FROM PUBLISHER]

In this paper, a hybrid pulsewidth modulation (PWM) scheme is proposed to suppress the LC resonance for the high-power current-source inverter (CSI) fed drives with low switching frequency. In CSI drive systems, the selective harmonic elimination (SHE) is selected due to the better performance of harmonics, but the LC resonance cannot be effectively damped due to the lack of control flexibility of SHE. In this paper, SHE is only used for the steady-state operation. The modulation scheme is then switched to space vector modulation with dynamic capacitor voltage control when the transient event occurs. The smoothed transitions between different modulation schemes are proposed. The proposed hybrid method effectively solves the resonant issues in CSI drives, while maintaining the power quality. Both simulation and experiments verify the performance of the proposed hybrid PWM scheme. [ABSTRACT FROM AUTHOR]

While the theoretical maximum of the memory window $\Delta {V}_{t}$ in a ferroelectric field-effect transistor (FEFET) is $2{E}_{C}{t}_{F}$ , ${E}_{C}$ and ${t}_{F}$ being coercive field and FE thickness, respectively, experimentally $\Delta {V}_{t}$ is observed to be much less than that, even in the case of complete polarization switching in the ferroelectric layer. This occurs because trapped charges in the gate oxide stack partially or completely screen the ferroelectric polarization, only a fraction of which gets “electrostatically” reflected in the semiconductor channel. In this article, we provide a generalized experimental framework to quantify the efficiency of practical FEFETs in converting the switched ferroelectric polarization into the memory window. To that end, we propose three efficiency metrics: 1) switched ferroelectric polarization $\Delta {P}_{F}$ to memory window conversion ratio, $\eta _{MW}=\Delta {V}_{t}/\Delta {P}_{F}$ ; 2) switched ferroelectric polarization to the semiconductor charge ($\Delta {Q}_{S}$) conversion efficiency or the charge conversion efficiency $\eta _{c}=\Delta {Q}_{s}/\Delta {P}_{F}$ ; and 3) the ratio of memory window to the width of polarization versus gate voltage hysteresis characteristics ($\Delta {V}_{P}$) or the voltage conversation efficiency $\eta _{V}=\Delta {V}_{t}/\Delta {V}_{P}$. We measure and compare these efficiency metrics in n-type and p-type FEFETs, fabricated in different facilities by different groups. In all the cases, we find that the maximum values of memory window efficiency $(\eta _{MW})_{max}$ , charge conversion efficiency $(\eta _{c}$) $_{max}$ , and voltage conversion efficiency ($\eta _{V}$) $_{max}$ are in the range: 2.5–5.5 Vm2/C, 4%–10%, and 5%–20%, respectively. [ABSTRACT FROM AUTHOR]

Soft-switching techniques of transformerless photovoltaic grid-connected inverters (TLIs) can significantly reduce switching losses, as well as soften switching processes. Conventional dc–ac soft-switching configurations proposed by Dr. Deepakraj M. Divan are invalid in TLIs because of the leakage current problem. In order to develop soft-switching techniques in TLIs, this paper proposes a new soft-switching configuration and a procedure to guide the invention of soft-switching TLIs. First, this paper proposes two basic resonance tanks related to dc bus polarities, and then, uses these basic tanks to elevate four popular full-bridge-type TLIs according to the proposed guideline. As a result, four soft-switching TLIs are gained. Second, this paper picks obtained soft-switching highly efficient and reliable inverter concept (HERIC) as example to analyze its soft-switching operation principle and performance. As a consequence, all active switches of the gained soft-switching HERIC circuit are switched under both of zero-current turn-on and turn-off conditions; the reverse recovery problem of freewheeling diodes is alleviated owing to the zero-current turn-off of diodes; meanwhile, the common-mode voltage at the switching frequency scale is still constant. Finally, some experimental results from a 3-kW universal prototype at 50-kHz switching frequency are provided to verify the effectiveness of the main contributions of this paper. [ABSTRACT FROM AUTHOR]

In this article, a dual-vector located model predictive control (DL-MPC) method based on a single dc-link current sensor is proposed for the permanent-magnet linear motor drive system. In DL-MPC, the phase currents are reconstructed by sampled dc-link current and selected active voltage vector (VV). Meanwhile, the sunk number of phase current is defined to evaluate the accuracy of current reconstruction. The first-optimal and second-optimal VVs are determined by dual-vector location. The second-optimal VV is selected for the voltage source inverter when the sunk number exceeds the threshold. Compared with traditional MPC schemes, DL-MPC has smaller current tracking error and better dynamic performance. Meanwhile, DL-MPC has more accurate current reconstruction and lower computation burden than that of the traditional MPC. The effectiveness of DL-MPC is verified by both theoretical analysis and experimental results. [ABSTRACT FROM AUTHOR]

This letter proposes a fast current control scheme for ac drives by minimizing the latency from current sampling to the updation of a pulsewidth-modulation (PWM) command. By reconstructing the architecture of a linear controller, the minimal necessary steps to obtain the output voltage are deduced as the primary calculation, and the other computation work of the current loop is done in the postcalculation after updating the PWM command. With the proposed method, the computational delay is reduced with negligible loss in the available modulation index, and a higher stability margin or system bandwidth is realized. Also, the developed controller structure exhibits inherited antiwindup characteristics. The technique has been validated by experimental investigations on a permanent magnet synchronous motor. [ABSTRACT FROM AUTHOR]

Based on the model predictive current control (MPCC), a dual-level located feedforward control (DLFC) is proposed for the five-leg dual-mover primary permanent-magnet linear motor traction system, in which, two three-phase movers are fed by one five-leg voltage-source inverter (VSI). In the proposed DLFC, the studied traction system is divided into dual-level subsystems, including mover level and system level. In the mover level, it is assumed that one mover is fed by one three-leg VSI. The reference synchronous currents are replaced by the reference static voltages, and the model current predictions are eliminated by the discrete mover voltage vectors (MVVs). Furthermore, the global optimal MVVs are determined by the mover-level geometrical location. If the implementation conflicts between two global optimal MVVs, two local optimal MVVs will be determined by the system-level geometrical location to replace one former global optimal MVV. Compared with MPCC, the computation burden of DLFC can be significantly reduced. If both control methods use the same sampling period, they have the same performances. On the other hand, DLFC can use shorter sampling period, and it can perform better than MPCC. All the theoretical analyses are verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is an attractive option for high-voltage and high-power applications. Fault localization is one of the most important challenges for the MMC consisting of a large number of power electronic switches. Existing literature has not provided a complete fault localization strategy for the MMC under submodule (SM) lower switch open-circuit fault, which only considers the MMC in inverter mode and neglects the MMC in rectifier mode. This article proposes a fault localization strategy for the MMC under SM lower switch open-circuit fault, which is suitable for the MMC not only in inverter mode but also in rectifier mode. This article analyzes the MMC fault characteristics under SM lower switch open-circuit fault, which considers the MMC in inverter and rectifier mode, respectively. Based on two modes’ common fault characteristic that the capacitor is charged all the time during the period when the arm current is positive, the faulty SM can be effectively located by the proposed fault localization strategy. The proposed strategy is not only implemented in simulation with professional tool PSCAD/EMTDC but also verified with a downscale MMC prototype in the laboratory. The results confirm the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

We propose a low-profile and high-gain pattern-reconfigurable planar array antenna (PRPAA) based on digital coding characterization. The radiating elements in the PRPAA are designed ingeniously to realize digital “0” and “1” elements. By dynamically encoding the digital radiating elements with different coding patterns, various radiation beams can be achieved and switched in real time based on one antenna aperture. More importantly, for different coding patterns, the number and direction of the radiation beams of the digital PRPAA can be well predicted. We fabricate such a PRPAA and validate its digital-controllable radiation patterns experimentally. This communication provides many opportunities to realize low-cost, lightweight, high-gain, and multi-unit PRPAA, which offers promising applications in massive multi-in multi-out (MIMO) antenna array system, smart antenna, radar system, and dynamic microwave imaging. [ABSTRACT FROM AUTHOR]

In this paper, a highly reliable back-to-back (BTB) power converter is proposed for doubly fed induction generator-based wind turbines (DFIG-WTs). When a power switch open-circuit fault is encountered in either the grid-side converter (GSC) or the rotor-side converter (RSC), a four-switch three-phase (FSTP) topology is formed to avoid using redundant bridge arms, which reduces the power circuit complexity and minimizes the conduction and switching losses. A simplified space vector pulsewidth modulation technique is used to eliminate sector identification and complex trigonometric calculations. In addition, the influence of dc-bus capacitor voltage unbalance on the electromagnetic torque is analyzed in detail. The offset current components are calculated, and they are deducted from the reference values in the modified control strategies to suppress the dc-bus voltage deviation. Moreover, the power loss model of a BTB converter is analyzed in detail, and the efficiency study is performed in various post-fault situations. Simulations in MATLAB/Simulink are carried out to verify the performance of a DFIG-WT based on a FSTP BTB converter. Furthermore, the control hardware-in-the-loop setup with RSC and GSC separately simulated in a digital real-time simulator is applied for experimental verification of the proposed control strategy. [ABSTRACT FROM AUTHOR]