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Advances in microelectronics have enabled the use of miniaturized computers for autonomous intelligence at the size of a dust particle less than one square millimeter across and a few hundred micrometers thick, creating an environment for ubiquitous computing. However, the size mismatch between microbatteries and microelectronics has emerged as a fundamental barrier against the take‐off of tiny intelligent systems requiring power anytime anywhere. Mainstream microbattery structures include stacked thin films on the chip or electrode pillars and on‐chip interdigitated microelectrodes. Nevertheless, available technologies cannot shrink the footprint area of batteries while maintaining adequate energy storage. Alternatively, the on‐chip self‐assembly process known as micro‐origami is capable of winding stacked thin films into Swiss‐roll structures to reduce the footprint area, which exactly mimics the manufacture of the most successful full‐sized batteries—cylinder batteries. In addition to discussing in detail the technical difficulties of reducing the size of on‐chip microbatteries with various structures and potential solutions, this Perspective highlights the following two basic requirements for eventual integration in microcomputers: minimum energy density of 100 microwatt‐hour per square centimeter and monolithic integration with other functional electric circuits on the chip. [ABSTRACT FROM AUTHOR]

Energy serves as the foundational element for all active functions within microrobots. Harvesting devices, such as photovoltaic cells and coils, play a crucial role in converting diverse forms of energy into electricity, while energy storage devices enable uninterrupted operation and liberate microrobots from dependence on external sources. Despite the evident importance of energy, there exists a significant disconnect between the development of energy devices and their integration into microrobotic systems, hampering the deployment of microrobots across diverse fields from agriculture to microsurgery. Here, for transcending the "material for material's sake" focus on simple generic metrics for material optimization, such as energy density, advocating attention to the higher tier transformation of material metrics that determine device‐level performance and so make a meaningful contribution to microrobotic technology is argued. Appropriate metrics for microrobotic swarms challenge the stereotype that tiny energy supplies are impractical; instead, swarms simplify individual microrobotic functions, reducing single energy supply requirements and utilizing swarm energy distribution and management. In addition to essential evaluations of the environmental and social impacts of intelligent microrobotic swarms for their safe and beneficial implementation, research targeting these higher‐tier metrics is crucial to connecting energy material research and microrobot developments effectively. [ABSTRACT FROM AUTHOR]

Keywords: 2D; integration; microscale transistors; molecular semiconductors; organic field-effect transistors In article number 1903738, Hongkun Tian, Feng Zhu, and co-workers present fully integrated microscale organic field-effect transistors (micro-OFETs). 2D, integration, microscale transistors, molecular semiconductors, organic field-effect transistors. [Extracted from the article]

Monolithic integration of microscale organic field‐effect transistors (micro‐OFETs) is the only and inevitable path toward low‐cost large‐area electronics and displays. However, to date, such an ultimate technology has not yet evolved due to challenges in positioning and patterning highly crystalline microscale molecular layers as well as in developing micrometer scale integration schemes. In this work, by mastering the local growth of molecular semiconductors on pre‐defined terraces, single‐crystal quasi‐2D molecular layers tens of square micrometers in size are created in dense periodic arrays on a Si substrate. Nondestructive photolithographic processes are developed to pattern micro‐OFETs with mobilities up to 34.6 cm2 V−1 s−1. This work demonstrates the feasibility to integrate arrays of short‐channel micro‐OFETs into electronic circuitry by highly parallel and size scalable fabrication technologies. [ABSTRACT FROM AUTHOR]

They offer a new technique, namely micro-origami, to construct the Swiss roll structure, a successful structure for full-sized batteries on a chip. Keywords: microbatteries; micro-origami; monolithic integration; self-assembly; smart dust EN microbatteries micro-origami monolithic integration self-assembly smart dust 1 1 1 04/11/22 20220407 NES 220407 B Microbatteries b In article number 2103641, Minshen Zhu, Feng Zhu, Oliver G. Schmidt and co-workers review the technology and design of on-chip batteries that can be integrated into a dust-sized computer. Microbatteries, micro-origami, monolithic integration, self-assembly, smart dust. [Extracted from the article]

High performance, flexibility, safety, and robust integration for micro‐supercapacitors (MSCs) are of immense interest for the urgent demand for miniaturized, smart energy‐storage devices. However, repetitive photolithography processes in the fabrication of on‐chip electronic components including various photoresists, masks, and toxic etchants are often not well‐suited for industrial production. Here, a cost‐effective stamping strategy is developed for scalable and rapid preparation of graphene‐based planar MSCs. Combining stamps with desired shapes and highly conductive graphene inks, flexible MSCs with controlled structures are prepared on arbitrary substrates without any metal current collectors, additives, and polymer binders. The interdigitated MSC exhibits high areal capacitance up to 21.7 mF cm−2 at a current of 0.5 mA and a high power density of 6 mW cm−2 at an energy density of 5 µWh cm−2. Moreover, the MSCs show outstanding cycling performance and remarkable flexibility over 10 000 charge–discharge cycles and 300 bending cycles. In addition, the capacitance and output voltage of the MSCs are easily adjustable through interconnection with well‐defined arrangements. The efficient, rapid manufacturing of the graphene‐based interdigital MSCs with outstanding flexibility, shape diversity, and high areal capacitance shows great potential in wearable and portable electronics. [ABSTRACT FROM AUTHOR]

A simple method to fabricate flexible, mechanically robust, and reusable SU‐8 shadow masks is demonstrated. This shadow mask technology has high pattern flexibility as various shapes with different dimensions can be created. The fabricated shadow masks are characterized in terms of the resolution, reusability, and capability of multilayer surface micropatterning. Fabrication of a new plastic photomask for the exposure process simplifies the shadow mask fabrication process and results in higher resolution in the shadow mask structures compared to the commercial chromium photomasks. For the multilayer surface micropatterning technology, a simple and fast alignment technique based on SU‐8 pillars and without usage of any microscopic tools is reported. This unique method leads to a less complicated alignment process with the alignment accuracy of ≈2 µm. The proposed shadow mask technology can be easily employed for wafer‐scale micropatterning process. The capability of fabricated SU‐8 shadow masks in micropatterning on polymer thin films is evaluated by fabricating metallic contacts on poly(3,4‐ethylenedioxythiophene) samples and electrical characterization. [ABSTRACT FROM AUTHOR]

Multilayer systems consisting of periodic hybrid interfaces show promising applications in thermoelectric design in terms of unique phonon blocking and electron conducting features. Universal techniques combining crystalline semiconductors with various categories of metals, oxides, molecules, and polymers have been rarely reported. In this paper, we first briefly review a novel rolled-up and compressing technique based on a strain engineered In0.2Ga0.8As/GaAs semiconducting nanomembrane. Then, the controllable rolling and compressing of a nanomembrane, focused ion beam cutting and the following device fabrication steps are demonstrated for the system of a hybrid In0.2Ga0.8As/GaAs/Cr/Au superlattice. Apart from a considerable reduction of thermal conductivity in a similar system reported by part of us very recently, here our efforts are focused on characterizing the cross-plane electrical conductance of the hybrid superlattice. High electrical conductance of four separated devices show very tight electrical bonding across the hybrid interfaces. [ABSTRACT FROM AUTHOR]

Here, a new-type threedimensional (3D) tubular asymmetric MSC with small footprint area, high potential window, ultrahigh areal energy density, and long-term cycling stability is fabricated with shapeable materials and photolithographic technologies, which are compatible with modern microelectronic fabrication procedures widely used in industry. The rolled-up self-assembly process can effectively reduce the footprint area of the original planar devices, greatly improving the areal specific capacitance (88.6 mF cm SP -2 sp at 0.66 mA cm SP -2 sp ) and areal energy density (28.69 µW h cm SP -2 sp at 0.25 mW cm SP -2 sp ). Benefiting from the novel architecture, the 3D asymmetric MSC displays an ultrahigh areal capacitance of 88.6 mF cm SP -2 sp and areal energy density of 28.69 µW h cm SP -2 sp , superior to most reported interdigitated MSCs. [Extracted from the article]

The rapid development of microelectronics has equally rapidly increased the demand for miniaturized energy storage devices. On‐chip microsupercapacitors (MSCs), as promising power candidates, possess great potential to complement or replace electrolytic capacitors and microbatteries in various applications. However, the areal capacities and energy densities of the planar MSCs are commonly limited by the low voltage window, the thin layer of the electrode materials and complex fabrication processes. Here, a new‐type three‐dimensional (3D) tubular asymmetric MSC with small footprint area, high potential window, ultrahigh areal energy density, and long‐term cycling stability is fabricated with shapeable materials and photolithographic technologies, which are compatible with modern microelectronic fabrication procedures widely used in industry. Benefiting from the novel architecture, the 3D asymmetric MSC displays an ultrahigh areal capacitance of 88.6 mF cm−2 and areal energy density of 28.69 mW h cm−2, superior to most reported interdigitated MSCs. Furthermore, the 3D tubular MSCs demonstrate remarkable cycling stability and the capacitance retention is up to 91.8% over 12 000 cycles. It is believed that the efficient fabrication methodology can be used to construct various integratable microscale tubular energy storage devices with small footprint area and high performance for miniaturized electronics. [ABSTRACT FROM AUTHOR]