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This research work explores various circuit-level design techniques to identify the best technique suitable for low power circuit design. To establish a proper performance comparison, reported techniques are implemented in a transmission gate-based carry skip adder circuit @ 22-nm technology node. Results obtained demonstrate that the multi-threshold CMOS technique offers the best performance under the given conditions. Further, a novel modified hybrid circuit design technique is also proposed in this paper. To validate the proposed design technique, performance metrics of the carry-skip adder circuit implemented using the proposed hybrid technique and other low power circuit design techniques are compared. Obtained results establish that the proposed technique offers improvement in terms of propagation delay (TP), average power dissipation (PAVG), power delay product (PDP) and leakage power (LP), when compared with its counterpart at a supply voltage of 0.4 V. [ABSTRACT FROM AUTHOR]

This paper proposes an efficient and robust design of content addressable memory (CAM) system. Design metrics, such as search time, power dissipation, power-delay product (PDP), and energy-delay product (EDP), of the proposed design are compared with those of previously reported CAM cell found in the literature. CAM cell presented in this paper offers $2.589\times $ improvement in search time, $2.725\times $ improvement in PDP, and $2.729\times $ improvement in EDP for mismatch 1 at 700 mV. It exhibits $2.257\times $ improvement in search time, $2.38\times $ improvement in PDP, and $2.389\times $ improvement in EDP for mismatch 0 at 700 mV. The proposed CAM cell also proves its efficiency in terms of power consumption, which is one of the most concerned design issues. It offers $1.0526\times $ improvement in power consumption for mismatch 1 and $1.054\times $ improvement in power consumption for mismatch 0. The proposed CAM cell is also analyzed to investigate the impact of tunneling magnetoresistance variations on power consumption, PDP, EDP, search time, and search-time variability. In addition, this paper also proposes an efficient match line sensing scheme for the proposed CAM cell. [ABSTRACT FROM PUBLISHER]

This paper proposes a circuit capable of incorporating buffered delays in the order of picoseconds. To study our proposed circuit in the profound way, we have also explored our proposed circuit using emerging technologies such as FinFET and CNFET. Comparisons between these technologies have been made in terms of different parameters such as duration of incorporated delays (pulse width) and its variability with supply voltages. Further, this paper also proposes a trigger pulse generator by utilizing proposed buffered delay circuit as its basic element. Parametric results obtained for the proposed trigger pulse generator match different application specific requirements. These applications are also mentioned in this paper. The proposed trigger pulse generator requires very low supply voltage (700 mV) and also proves its effectiveness in terms of tunability of pulse width of the generated pulses. The modeling of the circuit has been done using Verilog and the simulation results are extensively verified using SPICE. [ABSTRACT FROM AUTHOR]

Resistive Random Access Memory (RRAM) is a prominent contender in the realm of emerging non-volatile memory technologies owing to its numerous advantages like simple structure, low power usage, high speed, and exceptional scalability. In the current study, RRAM device was fabricated using tantalum oxide (TaOx) as a resistive switching insulating oxide layer, which was sandwiched between two conducting electrodes, namely Ag and ITO. RF magnetron sputtering was used to deposit the insulating layer of TaOx at room temperature on the ITO substrate. Further, X-ray reflectivity and hard X-ray photoelectron spectroscopy analyses were conducted to find the thickness, roughness, and elemental composition of the deposited TaOx films. Using a semiconductor analyzer, the RRAM cell's first DC switching characteristics were determined. The data acquired exhibited a resistance ratio (RHRS/RLRS) of 120 showing a good distinction between the two-resistance states. Additionally, a thorough investigation was conducted to examine the electrical conduction mechanism occurring inside the fabricated RRAM device. [ABSTRACT FROM AUTHOR]

This paper presents a novel design of a magnetic tunnel junction (MTJ) based content addressable memory (CAM) cell with low power dissipation and small-time delay. Magnetic properties of the spintronic device such as non-volatility, write endurance, small read–write delays, low switching current and so on, have been investigated in this paper. The proposed CAM cell design includes a simplified driver circuit to perform read/search and write operations using an optimum number of transistors. Performance parameters such as power dissipation, time-delay, power-delay product (PDP) and energy-delay product (EDP) of the proposed CAM cell are estimated and compared with the previously reported MTJ-based CAM cell already available in the literature. Simulation results obtained in this research work demonstrate that the proposed CAM cell successfully performs write operation at low voltages (up to 0.7 V). Write-time delay and the average power dissipation of the proposed CAM cell is found to be 0.375× and 0.449× less compared to the available MTJ-based CAM cell design. Apart from these, improvements in PDP and EDP of the proposed CAM cell is about 0.17× and 0.063× compared to the previously reported MTJ-based CAM cell, respectively. Performance improvements are also obtained in terms of time delay and power consumption during the read/search operations of the proposed CAM cell. During the read operation with 0.8 V supply, the time-delay, the average power consumption, PDP and EDP of the proposed CAM cell was found to be 0.53×, 0.64×, 0.34× and 0.18× less compared to the MTJ-based CAM cell already reported in the literature, respectively. Simulation results have been exhaustively verified using SPICE. [ABSTRACT FROM AUTHOR]

• Presents a novel closed-loop control method for magnetic capsule endoscope (MCE). • Keeps MCE along the intestinal center based on image navigation. • The in vitro experiments are conducted in porcine small intestine, and the experimental results show that the method is feasible and satisfactory performance of the closed-loop active control is achieved. This paper proposes a novel approach for the closed-loop active control of the magnetic capsule endoscope based on image navigation. The proposed method uses a robotic arm to control the rotation of an external permanent magnet (EPM) to generate a rotating magnetic field. Subsequently, this rotating magnetic field controls the motion of the magnetic capsule endoscope (MCE). A gyroscope was included inside the MCE to obtain its posture. Using the image captured by the camera installed in the MCE, a relationship between the relative position of the MCE and the intestine was established. Based on the relative position relationship and the MCE's posture, the MCE was controlled to move along the intestinal center by the robotic arm, thus, the closed-loop active control of the MCE was achieved. Furthermore, the feasibility of closed-loop active control of the MCE was verified through the isolated porcine small intestine experiment. Experimental results show that the closed-loop active control combined with image navigation is not only easy to operate, but also offers high stability in terms of control mechanism, and suitability for use in clinical applications. [ABSTRACT FROM AUTHOR]