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This study delves into the thermoelectric properties of armchair black phosphorene nanoribbons while considering the presence of line edge roughness. Employing the tight‐binding method in conjunction with non‐equilibrium Green's function techniques and Landauer formulas, the impact of various parameters on thermoelectric performance is explored. These findings reveal that the electrical conductivity and, consequently, the power factor exhibits an increasing trend with expanding ribbon length and width. This behavior can be attributed to heightened collision rates, particularly in narrow ribbons, induced by line edge roughness as length increases. Remarkably, the Seebeck coefficient at the Fermi energy corresponding to the maximum power factor remains nearly constant across different widths, lengths, temperatures, and transport regimes. Furthermore, the thermoelectric figure of merit (ZT) demonstrates a positive correlation with both ribbon length and width. In narrow widths and lengths ≈1000 nm, the power factor and figure of merit exhibit an upward trend with ribbon width. However, with further increases in ribbon width, the influence of line edge roughness on thermal conductivity diminishes. Consequently, the figure of merit decreases due to the rise in thermal conductivity. Notably, the thermoelectric figure of merit is higher for short and narrow ribbons and long and wider ribbons. [ABSTRACT FROM AUTHOR]

An integrated automatic optical inspection (iAOI) system with a procedure was proposed for a printed circuit board (PCB) production line, in which pattern distortions and performance deviations appear with process variations. The iAOI system was demonstrated in a module comprising a camera and lens, showing improved supportiveness for commercially available hardware. The iAOI procedure was realized in a serial workflow of image registration, threshold setting, image gradient, marker alignment, and geometric transformation; furthermore, five operations with numerous functions were prepared for image processing. In addition to the system and procedure, a graphical user interface (GUI) that displays sequential image operation results with analyzed characteristics was established for simplicity. To demonstrate its effectiveness, self-complementary Archimedean spiral antenna (SCASA) samples fabricated via standard PCB fabrication and intentional pattern distortions were demonstrated. The results indicated that, compared with other existing methods, the proposed iAOI system and procedure provide unified and standard operations with efficiency, which result in scientific and unambiguous judgments on pattern quality. Furthermore, we showed that when an appropriate artificial intelligence model is ready, the electromagnetic characteristic projection for SCASAs can be simply obtained through the GUI. [ABSTRACT FROM AUTHOR]

The edge of a micro-/nanoscale line pattern fabricated by lithography is not a straight line as in the design but has a roughness. This is called the line edge roughness (LER) and is important dimensional information related to the device performance, and reference standards containing known LER values are needed for fundamental research on lithography-related technology. We propose a novel framework for developing LER reference standards that contain the necessary characteristics. The proposed framework has three main features: (i) a self-affine fractal roughness model for the development of next-generation devices; (ii) a reliable evaluation method based on LER reference metrology using SI-traceable atomic force microscopy (AFM); and (iii) a versatile evaluation method using scanning electron microscopy-based LER metrology verified by the previous AFM-based LER reference metrology. In an experiment to verify the proposed framework, we fabricated an LER reference standard by using electron-beam lithography. The results show that the proposed framework can be used to develop LER reference standards for next-generation functional micro-/nanostructures. • Developmental framework of line edge roughness reference standards. • Precise control and measurement of roughness profile based on a self-affine fractal. • This framework allows the evaluation of fabrication fidelity of the developed sample. [ABSTRACT FROM AUTHOR]

The high-volume manufacturing of the next generation of semiconductor devices requires state-of-the-art statistical analyses to reduce measurement uncertainties. Prediction intervals can characterize the reliability of the predictive performance of regression models. Normalized conformal prediction is a mathematically motivated approach to find distribution-free prediction intervals which depends on skillful modeling to evaluate a regression model fit to training data, and quantile regression is a classical and widely applied guideline to devise prediction intervals. Noise levels impact the reliability of line edge roughness estimates from noisy scanning electron microscope images. We propose procedures to generate prediction intervals based on image denoising and other image processing techniques and demonstrate significant improvements over earlier methods developed for the deep convolutional neural network EDGENet. [ABSTRACT FROM AUTHOR]

Enabling extreme ultraviolet lithography (EUVL) as a viable and efficient sub-10 nm patterning tool requires addressing the critical issue of reducing line edge roughness (LER). Stochastic effects from random and local variability in photon distribution and photochemical reactions have been considered the primary cause of LER. However, polymer chain conformation has recently attracted attention as an additional factor influencing LER, necessitating detailed computational studies with explicit chain representation and photon distribution to overcome the existing approach based on continuum models and random variables. We developed a coarse-grained molecular simulation model for an EUV patterning process to investigate the effect of chain conformation variation and stochastic effects via photon shot noise and acid diffusion on the roughness of the pattern. Our molecular simulation demonstrated that final LER is most sensitive to the variation in photon distributions, while material distributions and acid diffusion rate also impact LER; thus, the intrinsic limit of LER is expected even at extremely suppressed stochastic effects. Furthermore, we proposed and tested a novel approach to improve the roughness by controlling the initial polymer chain orientation. [ABSTRACT FROM AUTHOR]

Scanning electron microscopy images are an attractive option to estimate the roughness of nanostructures. Convolutional neural network (CNN) based algorithms have improved scanning electron microscope (SEM) image denoising and estimation of line roughness measurements. However, these algorithms need improvements to run at high speeds with a low memory footprint and without compromising accuracy. We introduce two approaches to reduce computation time and memory. We first propose deep CNNs LineNet1 and LineNet2 to perform simultaneous denoising and edge estimation on rough line SEM images. This multiple task formulation in LineNet1 and LineNet2 reduces training time, inference time and model sizes. LineNet2 also facilitates edge estimation in the multiple-line images and generalizes the approach for other geometries. Our training method uses supervised learning datasets of single-line SEM images and multiple-line SEM images together with edge positions information. We next consider multiple visualization tools to improve our understanding of the LineNet1 architecture and use the resulting insights from these visualizations to motivate a study of two variations of LineNet1 with fewer neural network layers. One of these visualization techniques is new to the visualization of denoising CNNs. Our results show that these approaches significantly reduce the memory and computation needed for edge estimation with a slight impact on accuracy. [ABSTRACT FROM AUTHOR]

One of the main issues of EUV lithography is Line Edge Roughness (LER) on photo-resists, which significantly impacts yield at sub-30 nm pitches. In this work, an analytical model of LER is presented and analyzed for yield loss induced by open/short failures, cut mask defects, enhanced time dependent dielectrics breakdown (TDDB) failures for metal wires with different geometries, electro-migration (EM) impacts from the presence of LER on SRAM bitlines, and finally, LER impacts on functional errors. The model will be evaluated on single and double patterned designs with metal pitches of 24 and 28 nanometers. We show experimental results and give specific criteria in which LER thresholds can be relaxed without negatively impacting yield and path delay. This is a critical issue as higher LER tolerance allows exponential increase in throughput and thus reduces cost of fabrication. [ABSTRACT FROM AUTHOR]

Background: Extreme ultraviolet (EUV) lithography was introduced for the high-volume manufacturing of state-of-the-art semiconductor devices in 2019. One of the issues for the CD metrology of an EUV resist pattern is resist shrinkage since the ratio of the shrinkage to the CD increases in EUV lithography compared with that in immersion argon fluoride lithography. Aim: A CD-SEM metrology for an EUV resist that was compatible with low shrinkage and high spatial resolution was investigated by using primary electrons (PEs) with high energy. Approach: The shrinkage, image sharpness, repeatability, and line edge roughness (LER) were evaluated the EUV resist using PEs with energies of 200, 800, and 4000 eV. Results: The smallest shrinkage was obtained under the conditions of the repeatability from 0.15 to 0.22 nm using PEs with an energy of 4000 eV. Moreover, the LERs obtained for 200, 800, and 4000 eV were almost same. Conclusions: While the electron irradiation damage for an under layer and the amount of shrinkage depend on pattern size could cause issues, the high voltage CD-SEM provides a solution to CD monitoring in high-volume manufacturing using EUV lithography. [ABSTRACT FROM AUTHOR]

We report a sub-30-nm pitch self-aligned double patterning (SADP) integration scheme with EUV lithography coupled with self-aligned block technology targeting the back end of line metal line patterning applications for logic nodes beyond 5 nm. The integration demonstration is a validation of the scalability of a previously reported flow, which used 193-nm immersion SADP targeting a 40-nm pitch with the same material sets (Si3N4 mandrel, SiO2 spacer, spin on carbon, spin on glass). The multicolor integration approach is successfully demonstrated and provides a valuablemethod to address overlay concerns and, more generally, edge placement error as a whole for advanced process nodes. Unbiased line edge roughness (LER)/line width roughness (LWR) analysis comparison between EUV SADP and 193-nm immersion SADP shows that both integrations follow the same trend throughout the process steps. While EUV SADP shows increased LER after mandrel pull, metal hardmask open, and dielectric etch compared to 193-nmimmersion SADP, the final process performance is matched in terms of LWR (1.08-nm 3 sigma unbiased) and is 6% higher than 193-nm immersion SADP for average unbiased LER. Using EUV, SADP enables almost doubling the line density while keeping most of the remaining processes and films unchanged and provides a compelling alternative to other multipatterning integrations, which present their own sets of challenges. [ABSTRACT FROM AUTHOR]

Two fundamental challenges of line edge roughness (LER) metrology are to provide complete and accurate measurement of LER. We focus on recent advances concerning both challenges inspired by mathematical and computational methods. Regarding the challenge of completeness: (a) we elaborate on the multifractal analysis of LER, which decomposes the scaling behavior of edge undulations into a spectrum of fractal dimensions similarly to what a power spectral density (PSD) does in the frequency domain. Emphasis is given on the physical meaning of the multifractal spectrum and its sensitivity to pattern transfer and etching; (b) we present metrics and methods for the quantification of cross-line (interfeature) correlations between the roughness of edges belonging to the same and nearby lines. We will apply these metrics to quantify the correlations in a self-aligned quadruple patterning lithography. Regarding the challenge of accuracy, we present a PSD-based method for a noise-reduced (sometimes called unbiased) LER metrology and validate it through the analysis of synthesized SEM images. Furthermore, the method is extended to the use of the height-height correlation functions to deliver noise-reduced estimation of the correlation length and the roughness exponent of LER. [ABSTRACT FROM AUTHOR]

Measurement of line edge roughness (LER) is discussed from four aspects: edge detection, power spectrum densities (PSD) prediction, sampling strategy, and noise mitigation. General guidelines and practical solutions for LER measurement today are introduced. Advanced edge detection algorithms such as the wavematching method are shown to be effective for robustly detecting edges from low SNR images, whereas a conventional algorithm with weak filtering is still effective in suppressing SEM noise and aliasing. An advanced PSD prediction method such as the multitaper method is effective in suppressing sampling noise within a line edge to analyze, whereas a number of lines are still required for suppressing line-to-line variation. Two types of SEM noise mitigation methods, such as the "apparent noise floor" subtraction method and LER-noise decomposition using regression analysis, are verified to successfully mitigate SEM noise from PSD curves. These results are extended to local critical-dimension uniformity (LCDU) measurement to clarify the impact of SEM noise and sampling noise on LCDU. [ABSTRACT FROM AUTHOR]

With the evolution of sub-20 nm FinFET technology, line edge roughness (LER) has been identified as a critical problem and may result in critical device parameter variation and performance limitation in the future VLSI circuit application. In the present work, an analytical model of fin-LER has been presented, which shows the impact of correlated and uncorrelated LER on FinFET structure. Further, the influence of correlated and uncorrelated fin- LER on all electrical performance parameters is thoroughly investigated using the three-dimensional (3-D) Technology Computer Aided Design (TCAD) simulations for 14-nm technology node. Moreover, the impact of all possible fin shapes on threshold voltage ( V TH ), drain induced barrier lowering ( DIBL ), on-current ( I ON ), and off-current ( I OFF ) has been compared with the well calibrated rectangular FinFET structure. In addition, the influence of all possible fin geometries on the read stability of six-transistor (6-T) Static-Random-Access-Memory (SRAM) has been investigated. The study reveals that fin-LER plays a vital role as it directly governs the electrostatics of the FinFET structure. This has been found that there is a high degree of fluctuations in all performance parameters for uncorrelated fin-LER type FinFETs as compared to correlated fin-LER with respect to rectangular FinFET structure. This paper gives physical insight of FinFET design, especially in sub-20 nm technology nodes by concluding that the impact of LER on electrical parameters are minimum for correlated LER. [ABSTRACT FROM AUTHOR]

Analysis of physical modeling results can provide unique insights into extreme ultraviolet stochastic variation, which augment, and sometimes refute, conclusions based on physical intuition and even wafer experiments. Simulations verify the primacy of "imaging critical" counting statistics (photons, electrons, and net acids) and the image/blur-dependent dose sensitivity in describing the local edge or critical dimension variation. But the failure of simple counting when resist thickness is varied highlights a limitation of this exact analytical approach, so a calibratable empirical model offers useful simplicity and convenience. Results presented here show that a wide range of physical simulation results can be well matched by an empirical two-parameter model based on blurred image log-slope (ILS) for lines/spaces and normalized ILS for holes. These results are largely consistent with a wide range of published experimental results; however, there is some disagreement with the recently published dataset of De Bisschop. The present analysis suggests that the origin of this model failure is an unexpected blurred ILS:dose-sensitivity relationship failure in that resist process. It is shown that a photoresist mechanism based on high photodecomposable quencher loading and high quencher diffusivity can give rise to pitch-dependent blur, which may explain the discrepancy. [ABSTRACT FROM AUTHOR]

Pitch uncertainty and line edge roughness are among the critical quality attributes of a pitch standard and normally the analyses of these two parameters are separate. The analysis of self-traceable Cr atom lithography nano-gratings shows a positive relevance and sensitivity between LER and evaluated standard deviation of pitch. Therefore, LER can be used as an aided pre-evaluation parameter for the pitch calculation method, such as the gravity center method or the zero-crossing points method. The optimization of the nano-grating evaluation method helps to obtain the accurate pitch value with fewer measurements and provide a comprehensive characterization of pitch standards. [ABSTRACT FROM AUTHOR]

Lamellar gratings are widely used diffractive optical elements; gratings etched into Si can be used as structural elements or prototypes of structural elements in integrated electronic circuits. For the control of the lithographic manufacturing process, a rapid in-line characterization of nanostructures is indispensable. Numerous studies on the determination of regular geometry parameters of lamellar gratings from optical and extreme ultraviolet (EUV) scattering highlight the impact of roughness on the optical performance as well as on the reconstruction of these structures. Thus, a set of nine lamellar Si gratings with a well defined line edge roughness or line width roughness were designed. The investigation of these structures using EUV small-angle scattering reveals a strong correlation between the type of line roughness and the angular scattering distribution. These distinct scattering patterns open new paths for the unequivocal characterization of such structures by EUV scatterometry. [ABSTRACT FROM AUTHOR]

In sub-20 nm CMOS technology nodes, the parameter variability has become a main hurdle during the scaling of devices. Recently, the use of metal gate stacks in nano-scale FinFET structure has a significant impact on the intrinsic parameter fluctuations due to the granular nature of metals. A 14 nm FinFET structure has been considered to study the impact of metal-gate work-function variability by using the 3-D device and mixed mode circuit simulation. The present work investigates the impact of work function variability (WFV) on electrical characteristics of various possible FinFET architectures followed by the regression model. Further, the investigation has been extended to study the stability performance of 6-T SRAM cell under the influence of WFV. It is observed that work function variation may result in considerable performance degradation in device as well as SRAM operation in nano domain. [ABSTRACT FROM AUTHOR]

Magnetic nanowires are the foundation of several promising nonvolatile computing devices, most notably magnetic racetrack memory and domain wall logic. Here, we determine the analog information capacity in these technologies, analyzing a magnetic nanowire containing a single domain wall. Although wires can be deliberately patterned with notches to define discrete positions for domain walls, the line edge roughness of the wire can also trap domain walls at dimensions below the resolution of the fabrication process, determining the fundamental resolution limit for the placement of a domain wall. Using a fractal model for the edge roughness, we show theoretically and experimentally that the analog information capacity for wires is limited by the self-affine statistics of the wire edge roughness, a relevant result for domain wall devices scaled to regimes where edge roughness dominates the energy landscape in which the walls move. [ABSTRACT FROM AUTHOR]

In aggressively scaled devices, the FinFET technology has become more prone to line edge roughness (LER) induced threshold voltage variability. As a result, nano scale FinFET structures face the problem of intrinsic statistical fluctuations in the threshold voltage. This paper describes the all LER induced variability of threshold voltage for 14 nm underlap FinFET using 3-D numerical simulations. It is concluded that percentage threshold voltage ( V TH ) fluctuations referenced with respect to rectangular FinFET can go up to 8.76%. This work has also investigated the impact of other sources of variability such as random dopant fluctuation, work function variation and oxide thickness variation on threshold voltage. [ABSTRACT FROM AUTHOR]

Mueller matrix ellipsometry (MME) is applied to characterize lithographic patterns with natural line edge roughness (LER). A computationally efficient approach based on effective medium approximation is proposed to model the effects of LER in MME measurements. We present both the theoretical and experimental results on lithographic patterns with realistic LER which demonstrate that MME in combination with the proposed effective modeling method is capable of quantifying LER amplitudes. Quantitative comparisons between the MME and scanning electron microscopy measured results also reveal the strong potential of this technique for in-line nondestructive line roughness monitoring. [ABSTRACT FROM AUTHOR]

• An analytical model to predict threshold voltage (V T) variability in LER infused Nanowire FET using percolation theory is presented. • This model predicts V T variability 2.3× more accurately and 10× faster as compared with the earlier reported analytical model. • The V T distribution predicted with this model shows excellent match with the stochastic 3D TCAD simulations. The line edge roughness (LER) is one of the most dominant sources of variability in sub 10 nm technology node devices such as FinFET and Nanowire FET (NWFET). Earlier, analytical models of LER based threshold voltage ( V T ) variability on FinFET have been comprehensively explored. However, the analytical modeling front for NWFET is still an open challenge. Specifically, the previous FinFET inspired analysis used a cross-sectional area-equivalent circular diameter as effective diameter ( D eff ). The D eff defines the local V T for a cross-section that enables a percolation based V T estimation for the NWFET. In this work, we show that minimum local diameter ( D min ) is a better predictor. D min captures the quantum confinement locally more accurately in the highly scaled NWFETs of interest to enable accurate percolation. The model is tested for LER infused NWFET structures and shows an excellent match against the well-calibrated Sentaurus TCAD deck with the RMS error less than 1.5 mV. The model is 5 × 10 5 times computationally efficient in comparison to conventional TCAD simulations. Moreover, the proposed D min based analytical model is 2.3× better in terms of accuracy and 10× faster as opposed to the state-of-the-art (i.e. D eff based model). Such analytical models can be integrated in BSIM CMG platform to enable device scaling study and its impact on circuit level performance predictions. [ABSTRACT FROM AUTHOR]

In the simulation of secondary electron yields (SEY) and secondary electron microscopy (SEM) images, there is always the question: “are we using the correct scattering cross-sections?”. The three scattering processes of interest are quasi-elastic phonon scattering, elastic Mott scattering and inelastic scattering using the dielectric function model. We have artificially scaled the scattering cross-sections, such that the probability for events associated with a particular model is either increased or decreased. The influence of this adjustment on the calculated SEYs and simulated SEM images is then evaluated. At first we have investigated the influence on the calculated SEY of pure and infinitely thick silicon. We have observed that the influence of the acoustic phonon scattering cross-sections is seen all the way up to the incident primary electron energy of 10 keV. We have extended the analysis to the simulation of SEM images of three dimensional rough lines of PMMA located on a silicon substrate. We conclude that the scaling of the scattering cross-sections affects the contrast of the SEM images, but not the roughness characterization of the lines, i.e. the 3 σ of the line edge roughness (LER), correlation length and roughness exponent. [ABSTRACT FROM AUTHOR]

The resistivity of epitaxial Cu nanolines with line width ranging from 20 to 180 nm and line height from 40 to 50 nm was measured using a four-point probe technique. The Cu nanolines were fabricated using ebeam lithography with a polymethyl methacrylate bilayer resist system for improved line edge smoothness. The cross-section profile of the lines was examined using the focused ion beam milling technique. The results indicate that the cross-section should be more accurately described as trapezoidal rather than as rectangular. Using the trapezoidal profile, the electrical resistivity was calculated from the measured resistance data. Modeling based on the Fuchs–Sondheimer (FS) theory using the trapezoidal profile was also carried out. The results were compared with the experimentally calculated resistivity data. For Cu lines with line width less than 30 nm, the measured resistivity was shown to be up to 20% higher than the value predicted by the FS theory. Further examination of Cu lines using atomic force microscopy and scanning electron microscopy was conducted to extract the surface roughness and line edge roughness information. Their contribution to the resistivity increase was estimated to be only up to 3% for the Cu nanolines fabricated, which did not significantly contribute to the overall resistivity for Cu lines with line width less than 30 nm. Other possible factors affecting the resistivity of the Cu nanolines were also discussed, including the oxide formation on the surface of the Cu lines. [ABSTRACT FROM AUTHOR]

Uncertainties in the sub-nanometer range, the use of new materials, roughness, and the three-dimensional structures represent main challenges for the metrology of critical dimensions in nanostructures. In this paper, Monte Carlo modeling is used to investigate the correlation of the “true line edge roughness” of photoresist lines with the roughness rendered by Critical Dimension Scanning Electron Microscopy. Examples are presented, where realistic full-three dimensional photoresist structures in the nanometer range are generated by TCAD process simulation. [ABSTRACT FROM AUTHOR]

Advancements in the resist process is viewed as one effective way in meeting the challenge of obtaining high quality, narrow patterns (low line edge roughness/line width roughness or LER/LWR) for leading edge lithographic technologies such as extreme ultraviolet (EUV) lithography, λ = 13.5 nm. Among these processes, resist dissolution, also referred to as resist development, is considered an important process step as this is the first instance where resist patterns are formed from resist film state. This work focuses on a fundamental approach in understanding this resist pattern formation through a visual and in situ characterization of the resist dissolution process. This was done using a high speed atomic force microscope (HS-AFM). Specifically, this paper presents the first successful demonstration of the quantification of resist pattern LER during resist dissolution in the typical alkali (2.38wt% tetramethyl ammonium hydroxide or TMAH)-based developer solution. Based on these results, a number of fundamental information were understood/confirmed regarding resist pattern formation behavior during dissolution; (1) Larger pattern LER can be observed at pattern side-walls nearer the line pattern surface, in comparison to those near the line bottom. Moreover, it was also understood that (2) a reduction of LER occurs in the early stages of pattern formation during dissolution. This trend in decreasing LER was also existent even at longer dissolution times, but was in smaller variations. Lastly, it was also found that (3) at longer dissolution times, partial dissolution of pattern top surface, resulting in line-pinching occurs. This in effect increases LER, especially for measurements taken in pattern side-walls near the line surface. [ABSTRACT FROM AUTHOR]

Line edge roughness (LER) and line width roughness (LWR) are analyzed based on the frequency domain 3σ LER characterization methodology during pattern transfer in a self-aligned double patterning (SADP) process. The power spectrum of the LER/LWR is divided into three regions: low frequency, middle frequency, and high frequency regions. Three standard deviation numbers are used to characterize the LER/LWR in the three frequency regions. Pattern wiggling is also detected quantitatively during LER/LWR transfer in the SADP process. [ABSTRACT FROM AUTHOR]

Measurement and control of line edge roughness (LER) is one of the most challenging issues facing patterning technology. As the critical dimensions (CDs) of patterned structures decrease, an LER of only a few nanometers negatively impacts device performance. Here, Mueller matrix (MM) spectroscopic ellipsometry-based scatterometry is used to characterize LER in periodic line-space structures in 28-nm pitch Si fin samples fabricated by directed self-assembly patterning. The optical response of the MM elements is influenced by structural parameters like pitch, CDs, height, and side-wall angle, as well as the optical properties of the materials. Evaluation and decoupling MM element response to LER from other structural parameters requires sensitivity analysis using scatterometry models that include LER. Here, an approach is developed that can be used to characterize LER in Si fins by comparing the optical responses generated by systematically varying the grating shape and measurement conditions. Finally, the validity of this approach is established by comparing the results obtained from power spectral density analysis of top down scanning electron microscope images and cross-sectional transmission electron microscope image of the 28-nm pitch Si fins. [ABSTRACT FROM AUTHOR]

The influence of line width roughness (LWR) and line edge roughness (LER) on the reliability and performance of transistors becomes more and more important in the semiconductor fabrication as the critical dimension continues shrinking. Directed self-assembly of block copolymers (DSA of BCPs) is a potential solution for next generation lithography, however, it still lacks research on the influencing factors of LER and LWR in DSA. Here we investigate the effect of the molecular weight distribution (Ɖ), normalized pattern period (L S / L O), pattern duty cycle (W/ L S) and annealing time on the LER and LWR of domain boundaries in assembled poly(styrene- block -methyl methacrylate) (PS- b -PMMA) films on chemical patterns. The assembly kinetics is faster when the Ɖ of PS- b -PMMA is larger, while the Ɖ of PS- b -PMMA does not affect the L S / L O window for defect-free assembly when the annealing time is sufficient. Ɖ is the most critical parameter to control LER and LWR, and both increase with the increase of Ɖ on chemical patterns with same L S / L O. Besides Ɖ , L S / L O also plays an important role in the control of LER and LWR and the roughness increases with the increase of L S / L O. In addition, the annealing time and W/ L S of chemical pattern have little effect on LER and LWR. This will provide insight to engineer LER and LWR of block copolymer domains in DSA. [Display omitted] • LER and LWR in PS-b-PMMA films are determined by Ɖ of PS- b -PMMA. • The annealing time and the duty cycle of chemical patterns have little effect on LER and LWR. • A shorter annealing time is needed for defect-free assembly for BCPs with broader Ɖ s. • The mechanism is revealed for increased LER and LWR in BCPs with broader Ɖ s. [ABSTRACT FROM AUTHOR]

Scatterometry performance enhancement is demonstrated through a holistic approach by utilizing comprehensive information from various sources, including data from different process steps, different toolsets, multiple structures, and multiple optical channels using samples from magnetic hard disk drive manufacturing. Parameter and spectrum feed-forward are performed across multiple targets at the photo step and the photo results are fed forward to the post-reactive ion etch (RIE) step. For an isolated structure with critical dimensions (CD) much smaller than the incident light wavelengths, feed-forward methods improve CD correlation with a general improvement of 20 to 60% in precision and fleet measurement precision (FMP). A second technique examined is hybrid metrology, where inputs from source tools, such as CD-SEM and CD-AFM, are used to determine critical parameters. Plybridization of line edge roughness results in CD and sidewall angle (SWA) FMP improvement of -60%. We also demonstrate improved CD accuracy using azimuthal scatterometry at 0, 45, and 90 deg azimuth angles measuring resist lines with CD larger than the incident light wavelengths. FMP reductions of -6 0 and 30% are obtained for CD and SWA. SWA hybridization after RIE results in CD and SWA FMP improvements by >50 and 30%, respectively. [ABSTRACT FROM AUTHOR]

Scatterometry performance enhancement is demonstrated through a holistic approach by utilizing comprehensive information from various sources, including data from different process steps, different toolsets, multiple structures, and multiple optical channels using samples from magnetic hard disk drive manufacturing. Parameter and spectrum feed-forward are performed across multiple targets at the photo step and the photo results are fed forward to the post-reactive ion etch (RIE) step. For an isolated structure with critical dimensions (CD) much smaller than the incident light wavelengths, feed-forward methods improve CD correlation with a general improvement of 20 to 60% in precision and fleet measurement precision (FMP). A second technique examined is hybrid metrology, where inputs from source tools, such as CD-SEM and CD-AFM, are used to determine critical parameters. Hybridization of line edge roughness results in CD and sidewall angle (SWA) FMP improvement of ~60%. We also demonstrate improved CD accuracy using azimuthal scatterometry at 0, 45, and 90 deg azimuth angles measuring resist lines with CD larger than the incident light wavelengths. FMP reductions of ~60 and 30% are obtained for CD and SWA. SWA hybridization after RIE results in CD and SWA FMP improvements by >50 and 30%, respectively. [ABSTRACT FROM AUTHOR]

We investigated the off-line metrology for line edge roughness (LER) determination by using the discrete power spectral density (PSD). The study specifically addresses low-dose scanning electron microscopy (SEM) images in order to reduce the acquisition time and the risk of resist shrinkage. The first attempts are based on optimized elliptic filtering of noisy experimental SEM images, where we use threshold-based peak detection to determine the edge displacements. The effect of transversal and longitudinal filterings cannot be ignored, even when considering an optimized filter strength. We subsequently developed a method to detect the edge displacements without the use of a filter and thus avoiding biasing. This makes it possible to study how much image noise is acceptable and still determine the LER. The idea is to generate random images of line edges using the model of Palasantzas and the algorithm of Thorsos. We study the simulated PSDs as a function of the number of line edges and report on the convergence of the parameters (LER, correlation length, and roughness exponent) by fitting the Palasantzas model extended with a white noise term. This study demonstrates that a very noisy image with 12 line edges and about 2 electrons per pixel on average (charge density ≈10 µC) already produces an estimation for LER with a relative error (one-sigma) of about 10%. Furthermore, increasing the dose beyond 20 electrons per pixel does not significantly improve the LER determination. [ABSTRACT FROM AUTHOR]

In a first study to analyze the feasibility of electron beam-induced deposition (EBID) for creating certain patterns in advanced lithography, line patterns were fabricated on silicon wafers using EBID. The growth conditions were such that the growth rate is fully determined by the electron flux (the current limited growth regime). It is experimentally verified that different patterning strategies, such as serial versus parallel patterning and single pass patterning versus multiple pass patterning, all lead to the same result in this growth regime. Images of EBID lines, imaged in a scanning electron microscope, were analyzed to determine the position of the lines, the width of the lines, and the linewidth roughness (LWR). The results are that the lines have an average width of 13.7 nm, an average standard deviation of 1.6 nm in the center position of the lines, and an average LWR of 4.5 nm (1s value). As an example of the capabilities of EBID, a logic-resembling lithography pattern was fabricated. [ABSTRACT FROM AUTHOR]

Highlights: [•] Molecular simulation of electron beam lithography is performed. [•] The effect of electron exposure is introduced by chain scission of polymer molecules. [•] The small segments of polymer molecules are removed in the development process. [•] The typical structure of atomic scale line edge roughness is revealed. [•] Electron scattering is dominant for determining the atomic scale line edge roughness. [ABSTRACT FROM AUTHOR]

Background: Scanning electron microscopy (SEM)-based line edge roughness (LER) measurement suffers from an error due to noise in SEM image. Noise correction methods have been developed to obtain unbiased roughness results, however, there are still concerns in the viewpoint of measurement precision. Aim: To develop an unbiased roughness analysis for highly precise LER measurement. Approach: Combining the conventional unbiased roughness analysis with a profile-averaging method, where a line pattern is repeatedly measured and then the obtained profiles are aligned and averaged. The experimental result measured by SEM was verified using atomic force microscopy (AFM)-based LER metrology, which has higher reliability than SEM. Results: The experimental evaluation showed that the proposed method can obtain roughness parameters more precisely than the conventional method. Conclusions: When the noise in the line edge profile by SEM is too large, it is necessary to reduce the noise beforehand and then perform roughness analysis in order to obtain precise roughness results. The proposed method enables to measure LER with the highest precision using SEM. Additionally, the AFM-based LER metrology was demonstrated as a feasible technique to evaluate the performance of SEM-based LER metrology. [ABSTRACT FROM AUTHOR]

The transfer of the line edge roughness (LER) from the resist to the substrate sidewall by means of an anisotropic plasma-etching process depends on both the physicochemical reactions of plasma species with the resist and substrate and the morphology of the resist sidewalls. We show that a geometrical model based on the reliable representation of the resist sidewall roughness can capture the main experimental trends and behaviors. Predictions of the model regarding the role of resist side-wall anisotropy and the effects of resist LER on substrate slope are also presented. Finally, rules of thumb defining the slope and the necessary conditions to have LER reduction in substrate sidewalls are derived and discussed. [ABSTRACT FROM AUTHOR]

With the constant decrease of semiconductor device dimensions, gate line edge roughness (LER) becomes an important source of device variability. Gate LER originates from photoresist (PR) LER that is partially transferred into the gate during plasma etching. A plasma treatment is typically used to reduce the PR LER before the transfer. LER control at the nanometer scale also requires accurate measurements. We have recently developed a technique for LER measurement based upon atomic force microscopy (AFM). In this technique, the sample is tilted at about 45 deg and feature sidewalls are scanned along their length with the AFM tip to obtain three-dimensional images. The AFM technique is applied to the study of a pattern transfer into a gate stack starting from untreated PR, PR treated by conventional HBr plasma, and PR treated by HBr/O2 plasma followed by a bake at 150°C. It is found that the plasma etching reduces the LER at each etching step. The reduction is more important when starting from untreated PR which has the highest initial LER. However, the final LER in the Si layer remains significantly smaller when starting with cured PR, especially with PR cured by an HBr/O2 plasma treatment followed by a bake at 150°C. [ABSTRACT FROM AUTHOR]

One of the main challenges for developing extreme ultraviolet resists is to satisfy critical dimension uniformity (CDU) and sidewall roughness of contacts to the allowable limit. To this end, further understanding of the effects of resist ingredients on CDU and contact edge roughness (CER) is required. We investigate the effects of a photoacid generator (PAG), sensitizer and quencher concentrations on the CDU and CER. We find that the dependencies of CDU on sensitizer and quencher are dominated by photon shot noise (PSN) effects whereas a more complicated interplay between PSN and PAG distribution statistics should be considered in the dependence of CDU on PAG concentration. The estimated CER parameters [root mean square (RMS) value and correlation length ξ] exhibit a merging trend when plotted against the final critical dimension (CD). In addition, RMS value increases with exposure dose and PAG loading contrary to shot noise expectations. Power spectrum analysis reveals the dominant contribution of low-frequency undulations to CER, which is attributed to the enhanced interaction along specific directions between the aerial image and/or acid kinetics of nearby contacts. This inter-contact effect is further intensified with CD for fixed pitch and may explain the observed CER behavior. [ABSTRACT FROM AUTHOR]

Abstract: A simple and fast method using extreme ultraviolet off-plane scatterometry for in-line line width roughness (LWR) metrology is proposed. The effect of line roughness on diffraction is numerically investigated. LWR diffracts light into the off-plane of the incidence direction, thereby causing a decrement in specular reflection. The amplitude of LWR can be quantified by detecting the decrement of the specular reflection. The angular distribution of m =0 and n ≠0 diffraction orders is related to the LWR spectrum. LWR spectral analysis is possible by scanning the angular distribution of diffracted light. This study can be applied to both amplitude measurement and spectral analysis of LWR for in-line metrology. [Copyright &y& Elsevier]

Abstract: This study examined the effects of different frequency combinations, 27.12/2MHz and 60/2MHz, and the gas flow ratio of dual-frequency capacitively coupled CH2F2/C4F8/O2/Ar plasmas on the etch characteristics of silicon oxide. The etch rate of the SiO2 layer decreased and the etch selectivity increased with increasing flow ratio, Q(CH2F2), of CH2F2/(CH2F2 +C4F8). The etch rates of SiO2 and the chemical-vapor deposited amorphous carbon layer decreased with increasing Q(CH2F2) but the etch selectivity of SiO2 over the ACL increased. The etch rate of SiO2 at 60/2MHz was faster than that at 27.12/2MHz. In addition, the line edge roughness and critical dimension values tended to increase with increasing Q(CH2F2). [Copyright &y& Elsevier]

The control of line-edge or line-width roughness (LER/LWR) is a challenge, especially for future devices that are fabricated using extreme-ultraviolet (EUV) lithography. Accurate analysis of the LER/LWR plays an essential role in this challenge and requires the noise involved in scanning- electron-microscope (SEM) images to be reduced by appropriate noise filtering prior to analysis. To achieve this, we simulated the SEM images using a Monte Carlo method, and detected line edges in both experimental and theoretical images after noise filtering using new image-analysis software. The validity of this software and these simulations was confirmed by a good agreement between the experimental and theoretical results. In the case when the image pixels aligned perpendicular (crosswise) to line edges were averaged, the variance var(φ) that was additionally induced by the image noise decreased with a number NPIX,X of averaged pixels, with exceptions when NPIX,X was relatively large, whereupon the variance increased. The optimal NPIX,X to minimize var(φ) was formulated based on a statistical mechanism of this change. LER/LWR statistics estimated using the crosswise filtering remained unaffected when NPIX,X was smaller than the aforementioned optimal value, but monotonically changed when NPIX,X was larger contrary to expectations. This change was possibly caused by an asymmetric scan-signal profile at edges. On the other hand, averaging image pixels aligned parallel (longitudinal) to line edges not only reduced var(φ) but smoothed real LER/ LWR. As a result, the nominal variance of real LWR, obtained using simple arithmetic, monotonically decreased with a number NPIX,L of averaged pixels. Artifactual oscillations were additionally observed in power spectral densities. Var(φ) in this case decreased in inverse proportion to the square root of NPIX,L according to the statistical mechanism clarified here. In this way, the noise filtering has a marked effect on the LER/LWR analysis and needs to be appropriately and carefully applied. These results not only constitute a solid basis, but also considerably improve previous empirical instructions for accurate analyses. The most important lesson from this work is to crosswise average an optimized number of image pixels consulting the aforementioned equation. [ABSTRACT FROM AUTHOR]

Abstract: The manufacture of low-loss silicon-on-insulator (SOI) photonic wires for telecommunication wavelengths (∼1.55μm) is a challenge. Side wall and line edge roughness (LER) are the dominant sources of scattering loss. In this work the characterization of Si nanowaveguide (NW) LER was performed and its effect on light transmission was theoretically analyzed and measured. NW structures with a width of 0.5μm and height of 0.22μm were prepared using different thickness of hard-mask and plasma etch process technologies on SOI platforms. LER determination was performed by critical-dimension scanning electron microscope (CD-SEM), conventional atomic force microscope (AFM) and 3D-AFM. The characterization of LER quality was carried out by monitoring of its RMS deviation σ, main frequencies and correlation length L c. The effect of sampling length was evaluated. The data for σ from 0.8 to 6nm and L c from 20 to 50nm were found to be dependent mostly on etch process technology. Theoretical simulation of scattering loss due to LER based on the 2D analytical model for planar waveguides was performed. Finally, the correlation between NW optical transmission (scattering) losses (TL) and LER was obtained and can be applied to future technology development. Especially for the case of σ ∼0.85nm and L c ∼20nm the lowest value of TL∼1.2dB/cm was measured at a wavelength of 1.55μm. Good qualitative agreement between calculated and measured losses due to LER was found. [Copyright &y& Elsevier]

Using full-scale 3-D simulations of 100 000s of devices, enabled by “push-button” cluster technology, we study in detail statistical threshold voltage variability in a state-of-the-art n-channel MOSFET introduced by the combined effect of random discrete dopants (RDDs) and line edge roughness (LER) and demonstrate that the resulting distribution is non-normal. Based on careful statistical analysis of the results, we show how the resulting distribution of VT can be constructed from the distributions arising from the individual simulation of RDD and LER variability. In accomplishing this task, we have deployed computationally efficient statistical enhancement techniques that drastically reduce the computational effort needed to accurately characterize threshold voltage variability under the combined influence of RDD and LER. [ABSTRACT FROM PUBLISHER]

In this paper, we examine, in more detail, the strong correlation between the distribution of threshold voltage (VT) and the average channel length (\overlineLC) discovered in Part I of this paper. Based on the results of statistical analysis, we investigate an approach whereby the line-edge-roughness (LER)-induced distribution of VT can be reconstructed based on the convolution of the distribution of \overlineLC and the subdistributions of VT at particular values of \overlineLC. Further analysis demonstrates that the actual shape of the subdistributions has little impact on the accuracy of the reconstruction. This result allows a fast and economical semianalytical approach for the simulation of LER-induced VT variability, based on the nonlinear transformation of the distribution of \overlineLC into the distribution of VT using the channel length dependence of the threshold voltage as a mapping function. The accuracy of the semianalytical approach has been confirmed by comparison with the distributions of VT obtained for a broad range of conventional and novel MOSFETs using comprehensive 3-D simulations. [ABSTRACT FROM PUBLISHER]

In this paper, using computationally intensive 3-D simulations in a grid computing environment, we perform a detailed study of line-edge-roughness (LER)-induced threshold voltage variability in contemporary MOSFETs. Statistical ensembles of tens of thousands transistors have been simulated. Our analysis has been predominantly performed on a 35-nm channel-length bulk MOSFET test bed, widely used in previous studies to investigate the impact of different statistical variability sources. Comprehensive data mining and statistical analysis provide information about the shape of the distribution of the device threshold voltage, which is significantly non-Gaussian. Strong nonlinear correlation has been observed between the threshold voltage and the average channel length of the simulated devices. The width dependence of LER-induced threshold voltage variability has also been simulated and analyzed. Additional confirmation of the basic conclusions from the simulation and statistical analysis of the 35-nm test bed transistor is provided by the simulation of a 42-nm physical channel-length bulk LP MOSFET, a 32-nm channel-length thin-body silicon-on-insulator (SOI) MOSFET, and a 22-nm channel-length double-gate (DG) MOSFET. [ABSTRACT FROM PUBLISHER]

Abstract: The quantitative evaluation of the impact of key sources of static and dynamic statistical variability (SV) are presented for LSTP nMOSFETs corresponding to 32nm and 22nm technology generation transistors with thin-body (TB) SOI and double gate (DG) architectures, respectively. The simulation results indicate that TB SOI and DG devices are not only more resistant to random dopant induced variability compared to their bulk counterparts, but are also more tolerant to line edge roughness induced variability. However, the improved static SV performance shifts the emphasis to dynamic SV introduced by trapped charge associated with aging processes. [Copyright &y& Elsevier]

Abstract: Optical scatterometry has established itself as one of the mainly applied methods for CD metrology besides CD-SEM during the recent years. However, grating imperfections such as line edge roughness have been largely neglected in scatterometry models so far. Since imperfections of the perfect periodicity would yield large unit cells in a fully rigorous computation of the scatterograms an approximative method has to be used instead. To that end we propose a fieldstitching method which introduces virtual lateral Kirchhoff-boundaries. [Copyright &y& Elsevier]

Abstract: In order to better understand the effects of PAG distribution homogeneity on LER, a mesoscale kinetic Monte Carlo simulation of molecular resists was developed. PAG distribution was controlled by creating random aggregates of PAGs with different sizes. Many common experimentally found defects were recreated in the model simply by increasing the amount of PAG aggregation. LER increases with increasing PAG aggregation for resists with short photoacid diffusion lengths. Increasing the diffusion length helps to smooth out the initial PAG distribution inhomogeneity, but still induces LER through the effect of random diffusion of photoacid outside of the patterned region. PAG aggregation was found to play an important role in LER formation, and affirms that efforts to reduce PAG aggregation and increase PAG distribution homogeneity will likely be critical to meet edge roughness requirements for future ITRS roadmap patterning nodes. [Copyright &y& Elsevier]

Abstract: There is an urgent demand for higher performance resists with superior resolution, sensitivity, and line edge roughness for both electron-beam and extreme ultraviolet lithography applications. Chemically amplified resists provide superior sensitivity compared to non-chemically amplified resists, but often suffer from resolution limitations and poor line edge roughness. A new class of negative tone chemically amplified molecular resists has been developed based on epoxide cross-linking that combines high sensitivity with low line edge roughness and excellent resolution. The most recent compound of this class (2-Ep) simultaneously demonstrates resolution of 25nm half-pitch, sensitivity of 38μC/cm2, and line edge roughness (3σ) of 2.9nm under 100keV e-beam exposure. [Copyright &y& Elsevier]