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A radiation hardened by a design delay-locked loop (DLL) architecture for quadrature phase clock generation in a 133 MHz DDR memory designed on a foundry 0.13 \mum fabrication process is presented. The DLL employs an all-digital architecture, including a hardened digital integrator using error-correction logic. The area and power overhead due to the hardening are 32% and 37%, respectively. Simulation results demonstrate that the all-digital DLL is hardened against single-event transients with no timing impact due to hardening. Layout techniques to make the DLL hardened to multiple bit upsets are also presented. [ABSTRACT FROM AUTHOR]

A hierarchical method for total dose effects simulation of large mixed signal circuits using VHDL-AMS is described. Simplified behavioral models (or macro-models) of small sub-circuits replace SPICE-level circuits. The behavioral models describe the electrical circuit behavior and its dependence on the radiation dose. The behavioral models of sub-circuits can be assembled into complex mixed signal circuits. As a result, the computational cost is reduced significantly compared to conventional SPICE-based methods. The VHDL-AMS method also allows bias-dependent total dose degradation to be coupled to the circuit and operational conditions. Simulation accuracy remains sufficient to determine critical performance metrics of the circuit as the circuit performance degrades with dose. [ABSTRACT FROM AUTHOR]

Hf and Zr contamination during immersion in process solutions is most likely to occur in neutral and caustic solutions. Both Hf and Zr contamination are introduced onto the wafer surface if they are present in an ammonium hydroxide peroxide mixture solution (which is caustic), but such contamination is removed using existing acid cleans. Large amounts of wafer-to-wafer cross contamination occurs in plasma etch tools. Particles can cause cross contamination in a thermal reactor during high-temperature anneals of high-k dielectric layers. Residual surface cross contamination does not diffuse into the wafers during thermal processing. If contamination remains on a wafer, gate oxide integrity degradation is only observed at high concentrations. Near surface minority carrier lifetime is also affected, but bulk lifetime is not. [ABSTRACT FROM AUTHOR]

Highlights an experimental study which demonstrated that cooper contamination present on pre gate-oxidation silicon surfaces causes yield and reliability problems with emphasis on overlap edges. Indepth look at the experiment; Detailed information on the results; Discussion on the results; Conclusive remarks.

This paper presents a digitally controlled programmable point-of-load regulator for next-generation power systems. A novel digital control scheme was designed to minimize single-event effect (SEE)-induced transient effects. By effectively programming the loop transmission, the POL can trade off transient response time with SET robustness. The IC works with 1 to 5.5 V input voltage, 1–4.5V regulated output voltage, high efficiency (peak efficiency at 94%) and power of up to 5 W. The design was fabricated in the AMI i2t100 0.7 \mum complimentary, metal-oxide semiconductor (CMOS) process and characterized with the Jet Propulsion Laboratory (JPL) pulsed laser system. [ABSTRACT FROM PUBLISHER]

Abstract: A new technology, called electro-chemical residue sensor (ECRS), has been developed for the in situ and real-time measurement of the residual impurities left on the wafer surface and in the fine structures of patterned wafers during typical rinse processes. The key components of this technology, which consist of the sensor hardware and a process model, are described. The testing results of the ECRS show that the residual impurity concentration is significantly different from what is typically provided by the bulk water resistivity, which is usually employed for determining the progress of the rinse. As a case study, the new metrology method has been applied to the removal of sulfate ions from patterned wafers; the importance of various surface interactions, charge effects, and transport processes is determined. Two examples of the use of the ECRS for the development of novel rinse recipes to reduce water usage are also discussed. [Copyright &y& Elsevier]

Bipolar test structures were irradiated and annealed with various combinations of molecular hydrogen gas ambients, bias, and thermal conditions. The results show that the buildup and annealing behavior of defects in bipolar base oxides depend strongly on hydrogen concentration. Differences observed in trapped oxide charge annealing rates suggest that the charged defects created in hydrogen-rich environments may be attributed to different types of positive charge in addition to trapped holes. [ABSTRACT FROM PUBLISHER]

Abstract: This paper focuses on the effect of information about meat safety and wholesomeness on consumer trust based on several studies with data collected in Belgium. The research is grounded in the observation that despite the abundant rise of information through labelling, traceability systems and quality assurance schemes, the effect on consumer trust in meat as a safe and wholesome product is only limited. The overload and complexity of information on food products results in misunderstanding and misinterpretation. Functional traceability attributes such as organisational efficiency and chain monitoring are considered to be highly important but not as a basis for market segmentation. However, process traceability attributes such as origin and production method are of interest for particular market segments as a response to meat quality concerns. Quality assurance schemes and associated labels have a poor impact on consumers’ perception. It is argued that the high interest of retailers in such schemes is driven by procurement management efficiency rather than safety or overall quality. Future research could concentrate on the distribution of costs and benefits associated with meat quality initiatives among the chain participants. [Copyright &y& Elsevier]

Surface cleaning of patterned wafers by batch processing has become a challenge as semiconductor fabrication moves deeper into submicron technology nodes and utilizes larger wafer sizes. Many fabrication plants (fabs) have already employed single wafer cleaning tools. A key challenge in the application of single-wafer processing tools, compared to conventional multi-wafer batch tools, is their lower throughput. Typical surface cleaning consists of exposure to a chemistry intended to remove contaminants, followed by rinsing with ultrapure water, followed by drying. To help reduce cycle time and to minimize resource consumption during rinse processes while producing a highly clean surface, a novel in situ metrology has been developed for the detection of trace residual impurities in fine structures of patterned wafers during surface preparation processes. This technology includes both hardware for in situ measurement of impurities and software for process data analysis. The technology can be used for on-line control in existing processes as well as for development and testing of new recipes and processes. In this paper, the effects of the key rinse process parameters such as water flow rate, wafer spin rate, and water temperatures are studied. Successful incorporation of this metrology into surface preparation steps will eliminate dependence on costlier and more time-consuming external analysis techniques. [ABSTRACT FROM AUTHOR]

Laser experiments performed on two SiGe voltage controlled oscillator (VCO) circuit topologies show different output spectrums. Analytical models demonstrate that spectral response is determined by design features that impact modulated amplitude or frequency characteristic of transient signals. Further analysis of the two circuits shows the DC bias condition dependence on the topology during laser strikes, which is the main cause of the frequency and amplitude modulation of the transient output signal. [ABSTRACT FROM AUTHOR]

We propose a model, validated with simulations, describing how band-to-band tunneling (BBT) affects the leakage current degradation in some irradiated fully-depleted SOI devices. It is demonstrated that the drain current dependence on total ionizing dose at negative gate bias can result from the combination of BBT and charge buildup in the BOX, including the transition to the high current state. The role of impact ionization is examined. [ABSTRACT FROM AUTHOR]

Frequency synthesizers are fundamental building blocks in radio frequency, communications, and analog signal processing for generating high accuracy oscillatory signals. In general, the frequency synthesizer is the most sensitive block in the system since many of the signal processing elements such as clock, filters, and up/down converters depend on the synthesizer generating a clean sinusoidal signal at the given frequency. For radiation environments, the response and the sensitivity of the phase-lock loop (PLL) and the synthesizer block is very critical. This paper examines the effect of single events (SEE) radiation on the PLL locking and steady state response. The PLL circuits operating at 2.4 GHZ were designed and fabricated using a 0.13 μm CMOS process This paper presents the experimental and simulations results on the SEE radiation effects on the PLL. [ABSTRACT FROM AUTHOR]