1. Thermo-Mechanical Modeling of Process Induced Stress: Layout Effect on Stress Voiding Phenomena.
- Author
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Fiori, V., Verrier, S., Orain, S., and Girault, V.
- Subjects
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INTEGRATED circuit interconnections , *STRAINS & stresses (Mechanics) , *ELECTRODIFFUSION , *FINITE element method , *DIELECTRICS , *THERMAL expansion - Abstract
Stress migration is one of the major failure causes in copper interconnects. Moreover, for a given technology and a given process flow, one can wonder if the metal layers layout could play a role in this phenomenon. The aim of this work is to numerically investigate if the presence of a high metal density value at the top layers can subsequently modify the stress migration hazard. Such a scenario has been highly suspected by experimental data. Indeed, several back end architectures have been implemented, reliability tests have been performed and compared. Measurement data show that migration results are dependent on the interconnect layout. In this paper, the developed modeling methodology is presented: More precisely, the step by step modeling of the whole process flow enables to provide the stress field induced by the coefficient of thermal expansion mismatch of the consecutive material deposits. In this two dimensional simulation, both void nuclearion and growth are analyzed. This work focuses on the mechanical stress induced by the process steps from the 4th metal level to the passivation layer deposit regarding the metal density at the above layers. Stress voiding risk in the reliability structures with and without the bond pad above is then evaluated and compared for narrow and wide lines. Results highlight some high differences in the induced stress field, and likely sites for void nuclearion and growth are suggested. More precisely, two sites are found to be good candidates regarding the stress voiding phenomena: Firstly, the bond pad edge and secondary, all the transition areas between the metal lines and the dielectric at the Metal 4 level. This enables a smart management of the interconnect stress state by providing suitable design rules at the above layers. © 2006 American Institute of Physics [ABSTRACT FROM AUTHOR]
- Published
- 2006
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