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In high-load-current LLC dc–dc converter, synchronous rectification (SR) is usually used to reduce the secondary loss. As a lossless, low-cost, and small-volume SR control strategy, the drain–source voltage of SR switches sensing method is used widely in industrial applications. However, when the load current increases, the voltage ringing across SR switches during O stage is more and more severe and reaches zero eventually. When the voltage ringing reaches around zero in LLC converter, the voltage-sensing-method SR controller will generate the false driving signal, which makes SR switches turn on early and causes the converter works abnormally. This article presents the accurate analysis and design of the circuit parameters of LLC dc–dc converter to prevent the voltage ringing across the SR switches reaches around zero. The voltage ringing model is established, and the parameters design principle is given. By using the proposed design guideline, the voltage ringing across SR switches will always be higher than zero over the full load range, which eliminates the turn-on early issue or turn-on several times in one cycle issue. Therefore, this article can provide a design reference and guideline for the high-load-current and high-output-power LLC converter with voltage sensing SR control strategy. A 2.16 kW SR LLC dc–dc converter prototype is built according to the proposed design guideline, and the experimental results verify the correctness and effectiveness of the analysis. [ABSTRACT FROM AUTHOR]

Extracting gate-drain overlap oxide capacitance (Coxd) is a necessary step for almost all kinds of insulated-gate bipolar transistor (IGBT) compact models. There are two datasheet-driven methods that are universally accepted, one is based on reverse capacitance voltage characteristics (C–V method), and the other uses gate charge characteristics (Q–V method). This letter is to reveal the underlying mechanism of these two methods. It is found that the C–V method has an inescapable shortcoming which will mistake the turn-off delay time forecasted by IGBT models. In this letter, the internal capacitance system of IGBT is modeled and demonstrated completely. Based on this model, the accuracy and feasibility of the C–V and Q–V methods are analyzed. Moreover, the effect of Coxd on IGBT compact models is studied and further verified by experiments and circuit simulations. [ABSTRACT FROM AUTHOR]

SiC JFET/Si mosfet Cascodes (SSCs) are promising because of their small on-resistance and fast switching speed. Parallel operation of multiple SSCs is popular for high-current applications. However, the practical layout can hardly be absolutely symmetric. The mismatches from layout will cause turn-on current imbalance among paralleled SSCs. The maximum current stress will be aggravated for some SSCs. Besides, unbalanced current can lead to uneven losses. Then, the junction temperature difference (ΔTj) between paralleled SSCs occurs. The maximum junction temperature (Tjmax) among paralleled SSCs increases accordingly. To address the issue, a low-cost and novel structure is proposed to promote turn-on current sharing for paralleled SSCs. With aid of the structure, the immunity of turn-on current sharing performance to an asymmetric layout can be greatly improved. The mismatched turn-on current and losses can be well mitigated. ΔTj and Tjmax are suppressed at the same time. The proposed structure is suitable for both the discrete SSCs and bare-die SSCs. In this structure, only some bridging branches are introduced so it takes almost no extra cost. Two prototypes are fabricated with the discrete SSCs and bare-die SSCs, respectively. Double-pulse test and continuous operation are conducted to validate the advantages of the proposed structure. [ABSTRACT FROM AUTHOR]

In this article, high step-down dc–dc converters are widely employed in data center applications. Due to the higher step-down conversion ratio in the new generation 48 V voltage regulator module, a conventional buck converter is not suitable for such applications. To conquer this problem, a novel dc–dc converter is proposed in this article to achieve an ultrahigh step-down voltage conversion ratio for data centers. The nonisolated topology can be optimally designed to integrate both the switched-capacitor and coupled inductor techniques, which allows zero-voltage-switching (ZVS) of all active switches to be achieved and improves high efficiency. In addition, the converter presents the advantages of lower voltage stress, ultrahigh voltage gain, common ground, and simple control strategy. A comprehensive analysis of the steady-state analysis, derivation of voltage gain, voltage stress, and ZVS condition is presented in detail. Finally, a 30 W, 48-to-1 V experimental prototype is built and tested, which validates the ultrahigh step-down voltage gain and soft-switching characteristic of the proposed converter. The maximum efficiency of the prototype is 89.1% and the efficiency is 81.4% in full-load condition. [ABSTRACT FROM AUTHOR]

With the development of data center, promotion for efficiency and power density of the voltage regulator module (VRM) is paid considerable attention. Isolated VRM is suitable for the high-conversion-ratio dc–dc application. However, isolated VRM has many magnetic components, which take up a large proportion of the total volume. In this article, a novel integrated matrix magnetics structure is proposed, which integrates two elemental transformers and four output inductors into a single core. By integrating several discrete magnetic components, the volume of passive components, and high-current interconnections are reduced, leading to high power density and high efficiency. The integrated matrix magnetics is employed in an isolated single-stage converter, which can provide high output current. In addition, primary switches can achieve zero-voltage-switching (ZVS), and synchronous rectifiers of secondary side can achieve ZVS and zero-current-switching, so efficiency can be further improved. Besides, equivalent output inductance, voltage conversion ratio and AP calculation are derived to design the integrated matrix magnetics. Finally, a 48 V/1.8 V 144 W prototype of the isolated single-stage converter with integrated matrix magnetics is made and tested to verify the analysis. [ABSTRACT FROM AUTHOR]

A nonisolated bidirectional dc–dc converter is proposed for energy storage systems in this article. The proposed converter is composed of three active switches, two synchronous rectifiers, two clamping capacitors, and two inductors. The proposed converter has advantages of being a simple structure, a fewer number of components, a common ground, lower voltage stress, and wide voltage gain range. Compared with the conventional buck converters, the novel converter triples the effective duty cycle and lowers voltage stresses across the active switches. A 300-W/500-kHz GaN-based experimental prototype is built and tested to verify the correctness and validity, demonstrating a peak efficiency of 94.54% in step-down mode and a peak efficiency of 94.88% in step-up mode. [ABSTRACT FROM AUTHOR]

Silicon carbide (SiC) power modules are attractive in many applications due to the superiority of their semiconductor characteristics. However, power modules are subjected to repetitive thermo-mechanical stress caused by the mismatch of the coefficient of thermal expansion between different layers of materials. Moreover, the relatively smaller die size of SiC chips makes the heat flux increase significantly, which brings new challenges to the thermal management and reliability of SiC power modules. To tackle these challenges, this article proposes a new thermal enhanced packaging method based on vapor chamber (VC) phase change heat spreader (PCHS) for SiC power modules, achieving the advantages of high thermal conductivity, low weight, low cost, and low thermal stress. In this new design, SiC mosfet bare dies are directly soldered on the top of VC-PCHS, which not only act as heat spreaders but also conduct the drain current of mosfets. The integrated VC-PCHS is optimized based on thermal and thermomechanical performance. An SiC power module prototype directly integrated with VC-PCHS is built using a new fabrication process. Both the simulations and experiments demonstrate significant improvements in thermal and thermomechanical performance. The modules integrated with VC-PCHS can operate under 200 W of power dissipation per die (632 W/cm2) without exceeding the maximum rated junction temperature. This article reveals the potential of directly integrating phase change cooling components inside power modules, providing a new solution to improve the thermal performance and reliability of SiC power modules without adding complexity and energy consumptions to external cooling systems. [ABSTRACT FROM AUTHOR]

Silicon carbon (SiC) metal-oxide semiconductor field-effect transistors (MOSFETs) and SiC/Si cascode devices are two popular normally-off SiC power devices. In terms of the rated voltage and current of a single chip, there are always some SiC/Si cascode counterparts for the SiC MOSFETs. Thus, the two devices can substitute for each other in many fields. However, it is not clear which of the two SiC power devices is more suitable for parallel operation to deal with high current. This article comparatively investigates the paralleling suitability of SiC MOSFETs and SiC/Si cascode devices by theoretical analysis and experimental verifications for the first time. The paralleling suitability of the two devices is quantitatively evaluated by the unbalanced current among paralleled chips under the conditions with asymmetric layout and uneven junction temperature. Both static and dynamic imbalanced current are taken into consideration. Based on the theoretical and experimental results, some design guidelines are proposed to promote current sharing. [ABSTRACT FROM AUTHOR]

A novel transformer-less topology with high step-down voltage gain is proposed for low-voltage high-current point-of-load voltage regulator modules (VRMs). The proposed topology consists of three capacitors, two inductors, three active switches, and two synchronous rectifiers. It triples the effective duty-ratio and lowers the voltage stresses across active switches compared with conventional buck topologies. Converters based on the topology have a potential benefit of achieving high power density and can be capable of delivering high current to the output by two interleaving phases. Small inductance and capacitance are only needed by using interleaving technology, which results in very fast dynamic response to large load changes. A 60 W, 48–1.8 V prototype is built to verify the performance of the proposed topology. [ABSTRACT FROM AUTHOR]

The parasitic inductor can be used as resonant component to increase the power density in resonant converters. However, the parasitic inductance value of PCB copper traces is not large enough to achieve zero current switching in low and medium switching frequency conditions. To tackle this problem, a novel integration method to increase parasitic inductance value is proposed in this letter. The proposed method is based on direct coupling, which utilizes lateral structure and vertical structure to increase equivalent inductance between two parasitic inductors. The proposed method not only can achieve high efficiency, high power density, and very low profile design, but also can save the cost and space of discrete inductors for the designed prototype in low and medium frequency range. The comparison and design procedure of both lateral and vertical structures of the parasitic inductor are presented in details. Two 100-W prototypes employing gallium nitride devices are built to compare the discrete inductor solution with the proposed parasitic inductor integration method. The power density of the prototype using parasitic inductor is 62.5% higher than discrete inductance and has achieved a peak efficiency of 93.4%. [ABSTRACT FROM AUTHOR]

Multichip SiC power modules with Kelvin-source connection are popular in applications with large capacity and high switching frequency. However, dynamic current imbalance among paralleled dies due to asymmetric layout limits the available capacity. Thus, this article proposes a method to mitigate the mismatched dynamic current by adjusting the connection points of bonding wires and copper traces. The response surface models and nonlinear constrained optimization algorithms are introduced for the first time to help determine the optimized positions for the connection points. By this method, the dynamic current imbalance can be well suppressed under various working conditions. Besides, the method is cost-efficient and well compatible with the conventional manufacturing technologies because there need no additional efforts but some modifications on bonding wires. At first, the optimization guidelines are obtained after analyzing the mechanism of dynamic current imbalance among paralleled SiC MOSFETs with Kelvin-source connection. Based on the optimization guidelines and response surface models of parasitic inductance, the dynamic current sharing problem can be transformed into a nonlinear constrained optimization issue in mathematics. According to the solution of the mathematic problem, the optimized positions for connection points of bonding wires and copper traces can be determined. Finally, some simulations and experiments are conducted to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Tight voltage regulation and high efficiency are fundamental objectives of wireless power transfer systems (WPTSs) as power supplies. Although the well-established impedance matching control attempts to achieve high efficiency, the associated extra dc–dc converters or hard switching of converters in WPTSs reduce the overall system efficiency, particularly for high-power applications. In this article, under zero voltage switching (ZVS) conditions, the minimum power loss point is derived and proved in detail with different ZVS angles. Moreover, a joint control with variable ZVS angles (JC-VZA) is proposed to ensure ZVS of all switches and achieve the required output, simultaneously. This control scheme is implemented by use of controllers in both sides of WPTSs, which adjust their respective ZVS angles for dynamic efficiency optimization. Under ZVS conditions, the proposed JC-VZA features an optimal amount of reactive power that achieves the minimum total power loss by significantly reducing the switching loss. As a result, the experimental results obtained from our WPTS prototype verify its superiority. With a coupling coefficient k of 0.2 or 0.15, the maximum efficiency reaches 96.8% or 95.0% under the power rating of 288 W (rated load) as well as 92.4% or 88.7% in the case of light load (9% of 288 W). [ABSTRACT FROM AUTHOR]

Parallel connection of silicon carbide (SiC) mosfets is a popular solution for high-capacity applications. In order to improve the switching speed of paralleled SiC mosfets, Kelvin-source connection is widely employed. However, the influences of asymmetric layout and unequal junction temperature on current sharing of paralleled SiC mosfets with Kelvin-source connection are not clear. This article addresses the issue for the first time by theoretical analysis and experimental verifications. The mechanism of current imbalance resulting from asymmetric layout and unequal junction temperature in the case with Kelvin-source connection is comprehensively investigated. Then, some significant discoveries are obtained. The static current sharing performance can be affected by drain and power source parasitic inductance, which is seldom mentioned before. Besides, this article first points out that the effect of power source parasitic inductance on dynamic current sharing is dominant compared with other parasitic inductance. What is more, the thermal–electric analyzing results suggest that there is a risk of thermal runaway for paralleled SiC mosfets with Kelvin-source connection at high switching frequency due to positively temperature-dependent dynamic current and switching losses. Based on the discoveries, some guidelines are provided for layout design and application of paralleled SiC mosfets with Kelvin-source connection. [ABSTRACT FROM AUTHOR]

In a wireless power transfer system (WPTS), the control technique of the active rectifier is vital for improving the transfer efficiency of the resonant network, expanding the operating range of the load, and increasing the power density. An indispensable component of such control technique is the accurate and reliable phase-locked method for the resonant current. However, the traditional phase-locked method based on the DSP controller tends to lose driver pulses, which might cause damage to the safe operation of the WPTS. This article illustrates the essential reason why the driver pulses lose and proposes a phase-locked loop combined with the chained trigger mode (PLL-CTM) that can lock the phase of the resonant current accurately and produce the driver pulses reliably. With the proposed PLL-CTM applied, the reliability of the WPTS can be enhanced tremendously. Furthermore, based on the PLL-CTM, this article also presents a double-side phase shift control (DPSC) strategy to achieve constant-current constant-voltage charging and minimize the power loss of the resonant network simultaneously. Finally, a 500-W WPT prototype is built to verify the feasibility of the DPSC with PLL-CTM. Benefiting from the DPSC with PLL-CTM, the WPTS not only obtains a high accuracy in steady state, but also achieves a good dynamic performance with the step change of ${R_{{{\rm L}}}}$ and ${R_{{\rm {Eref}}}}$. [ABSTRACT FROM AUTHOR]

• The fully-distributed strategy achieves cost minimization and voltage restoration. • The strategy considers the constraints of bus voltages and line currents. • The control algorithm converges fast due to uncoordinated and adaptive step-sizes. • Experiments validate the strategy in load-fluctuation and plug-and-play scenarios. A discrete-time control method is presented for real-time energy management of DC microgrids, where each distributed controller only shares information with its neighbors. Controllers aim to achieve economic dispatch and voltage restoration while maintaining the generator outputs and line currents in their allowable ranges. The proposed control method is developed based on a primal–dual algorithm (PDA) to determine the optimal control variables, in which uncoordinated step-sizes and an adaptive mechanism are introduced to accelerate the algorithm. The convergence analysis is also provided. Finally, numerical tests show the high convergence rate of the algorithm, and the hardware experiments demonstrate the applicability of the proposed control method for real-time energy management. [ABSTRACT FROM AUTHOR]

Charging electric vehicles wirelessly is promising because of its convenience as well as saving of charging cables. However, the existing wireless power transfer systems suffer from high resonant peaks and poor efficiency. Therefore, zero voltage switching (ZVS) operation of inverter should be achieved especially in high transfer power. Based on the variable frequency phase shift control strategy (VFPSC), this paper presents an optimal operation frequency range (OOFR) where the wireless power transfer (WPT) system can realize the required output and ZVS operation of inverter simultaneously without extra dc–dc converters. Meanwhile, based on OOFR, an optimized electrical parameter design method based on VFPSC is proposed with the multiple boundary conditions. Moreover, a novel three-loop control strategy (TLCS) is proposed to make the system operate at any points of OOFR. Especially, an implementation method of the TLCS is proposed, which can dynamically adjust frequency and phase shift to make the system always operate at the preset ZVS angle and realize the required output simultaneously. Finally, a 500-W WPT system is built to verify the correctness of theoretical analysis. The experimental results show that a very high overall efficiency is achieved in the whole charging process and the maximum efficiency can achieve 94.9% with $k$ = 0.2. [ABSTRACT FROM AUTHOR]

To acquire high efficiency and reduce electromagnetic interference in wireless high-power charging for electric vehicles (EVs), it is of great importance to realize accurate zero voltage switching angle (ZVSA) control of the inverter. However, the traditional zero-crossing detection cannot be applied in high power because of considerable noise and poor accuracy in wide power range applications. In this paper, to suppress the noise in high power, a current hysteresis comparator is adopted, and an enhanced phase detection methodology is proposed to measure the phase of resonant current by using a reference signal produced by a processor. Meanwhile, to improve the accuracy of ZVSA, a uniform time delay compensation method (UTDCM) by considering the whole time delays synthetically is proposed, and a uniform time delay equation can be obtained to guarantee the high accuracy of phase detection, especially in the wide power range. Finally, a novel control strategy with the ZVSA loop based on UTDCM is proposed for battery charging in wireless high-power transfer system. A 500-W wireless power transfer prototype is built to verify the accuracy of ZVSA based on UTDCM and the system efficiency can achieve 94.17% with $k$ = 0.22. [ABSTRACT FROM AUTHOR]

This paper presents an integrated power module with the features of high power density and high efficiency. A multifunctional integrated magnetic component is designed. The component has the roles of both the filter inductor and the package of the converter. With the assist of finite-element analysis, the design and optimization of the proposed inductor are demonstrated. It has higher inductance value than the inductor used in conventional designs. The package is composed of bigger copper winding and higher thermal conductive magnetic material, leading to lower direct current resistance and better thermal performances than conventional transfer molding packaging. Benefiting from these advantages, the power module built based on the inductor can achieve higher efficiency and lower temperature rise than those based on traditional plastic packaging solution. Design of the inductor is demonstrated through the combination of analytical and simulation methods. An inductor prototype is built and used in an integrated power module to do experimental tests. Loss breakdown of the module is analyzed. The performances of the proposed power module are better than the conventional transfer molding packaging solution with the same board or other state-of-art products. [ABSTRACT FROM AUTHOR]

Gallium nitride high electron mobility transistors (GaN HEMTs) are promising switching devices in high-efficiency and high-density dc–dc converters due to their fast switching speed and small conduction resistance. However, GaN HEMTs are very sensitive to parasitic inductance because of their high switching speed, low-threshold voltage, and small driving safety margin. Parasitic inductance can cause severe voltage overshoot and ringing, which may result in electromagnetic interference issues, false turn-on, or even device breakdown. This paper aims at reducing the parasitic inductance (including power loop inductance and driver loop inductance) by optimizing the layout. First, a multiloop method is proposed to reduce the parasitic inductance. Optimization of both the conventional single-loop structure and the proposed multiloop structure are presented. Second, three kinds of power loop layouts based on the proposed multiloop structure are realized on PCB substrate and one of them is realized on aluminum nitride (AlN) substrate, which has higher thermal conductivity but less copper layers. The power loop inductance on PCB substrate is reduced to 0.1 nH, which is only 25% of the state-of-art layout. The power loop inductance on AlN substrate is reduced to 0.22 nH. Third, the driver loop layout is optimized and achieves 50% reduction of driver loop inductance compared with the conventional single-layer layout. Finally, integrated modules using the proposed layouts are built to validate the analyses and designs. [ABSTRACT FROM AUTHOR]

Industrial manufacturers are required to adopt water conservation and pollution control technologies because of increasingly serious water scarcity and water pollution, especially in textile industry. An effective performance evaluation tool for these technologies is greatly needed for textile manufacturers. However, the existing tools for textile industry can only evaluate on plant level and ignore pollution effect of water consumption. In order to help textile manufacturers know about water conservation and pollution control performance of technologies more systematically and comprehensively, we developed a process-level water conservation and pollution control performance evaluation tool of cleaner production technology in textile industry. The new tool includes three indicators: water withdrawal reduction, water consumption reduction and water assimilation reduction. Comparison between the new tool and old ones by evaluating the low-pollution-concentration effluent reuse technology in a polyester flannel fabric dyeing and printing plant demonstrates that the new tool can help textile manufacturers to not only understand operation mechanism of a technology on specific processes and then take specific improvement measures on different processes to optimize water conservation and pollution control performance, but also find out indiscoverable disadvantages of a technology and then adopt complementary technologies to reduce negative effect of the technology. [ABSTRACT FROM AUTHOR]

A recently reported modeling methods for a switched capacitor converter either assume output as “firm” voltage or a resistor to facilitate calculation. When the size of output filter capacitor is moderate, accompanied by noticeable output ripple, previous modeling results may not provide accurate prediction and design guidelines. In this paper, a new modeling technique taking into account the output capacitor effect is proposed for simple dual-phase switched capacitor converters without complex coupling loops. The proposed model employs transient calculation, takes charge redistribution phase into account, and includes the duty cycle, switching frequency as well as output capacitor simultaneously in the final output impedance formula, which enhances accuracy of the model. It is suitable for interleaved and noninterleaved switched capacitor converters. The simulation and experimental results for the unity gain SC converter are provided to verify the proposed theory. [ABSTRACT FROM PUBLISHER]

This paper proposes a new approach to optimally design LLC converters. The core of the proposed approach is an accurate algorithm that can find all the possible designs satisfying the peak gain requirement. Designers can conveniently evaluate several design results and find the optimal one for their respective applications. Part I of this paper proposes the accurate design algorithm, which is developed based on time-domain resonant waveforms, law of charge conservation, and conservation of energy. Design procedures are also provided for computer automation. [ABSTRACT FROM AUTHOR]

This paper proposes a new approach to optimally design LLC converters. The core of the proposed approach is an accurate algorithm that can find all the possible designs satisfying the peak-gain requirement. Designers can conveniently evaluate several design results and find the optimal one for their respective applications. Part II of this paper discusses design considerations and procedure using the proposed algorithm. Case studies reveal different design tradeoffs in different application scenarios. A 384-V nominal 300-V minimum input voltage range 12-V/50-A output LLC converter prototype with 97.3% peak efficiency is built to verify the proposed design algorithm. [ABSTRACT FROM AUTHOR]

Nonlinear inductors have wide applications in dc/dc converters. The multiwindow multipermeability nonlinear inductor based on low-temperature co-fired ceramic (LTCC) technology has been proven to have a gradually changing wide-range inductance value curve while requiring no extra dc bias, which makes them suitable in various high-efficiency dc/dc converters. This paper focuses on the design of such a multiwindow multipermeability inductor based on an innovative module. Currently, the design of the LTCC inductors requires complicated simulation when coupling matrices among all the windows are taken into consideration. A simplified model for calculating the inductance value is proposed in this paper to reduce complexity. In the proposed model, the complicated inductance simulation is simplified to calculating inductance of three basic units in a nine-window inductor. By simulating the nine-window inductor, inductance of a rectangle-shaped inductor with any number of evenly distributed windows on it can be calculated. Based on the proposed model, the design guideline of the nonlinear inductor is also summarized. A 16-window two-permeability prototype is presented to demonstrate the design process according to the new model. The complete simulation and the test results are also provided to verify the model. The proposed model correlates with the simulation results very well. [ABSTRACT FROM PUBLISHER]

Distributed air-gap inductors have the advantage of reducing winding loss in high switching frequency dc/dc converters. However, they also have the disadvantage of uneven distribution of flux density, which inevitably leads to uncompleted utilization of magnetic material. This paper proposes a horizontal-winding multipermeability low-temperature cofired ceramic (LTCC) inductor to increase inductance and improve efficiency without the necessity of increasing inductor volume. For the purpose of simplicity, a two-permeability LTCC inductor is taken as an example for analysis and comparison. Design of such an inductor is demonstrated with the aid of 2-D finite elementary analysis simulation. A two-permeability LTCC inductor together with a single-permeability LTCC inductor is fabricated for measuring and testing. The measured results show the two-permeability inductor has higher inductance than the single-permeability inductor. Both inductors are tested in a 5-V input, 3.3-V output dc/dc converter to test their performances. The testing results show the two-permeability LTCC inductor could further improve the efficiency of high-frequency dc/dc converters compared with the single-permeability LTCC inductor. [ABSTRACT FROM AUTHOR]

Distributed air-gap inductors such as iron powder chip inductors and low-temperature cofired ceramic (LTCC) inductors have the advantage of low-fringing effect loss. However, the flux density nonuniformly distributes in the magnetic cores, which results in the magnetic material closer to the conductor becoming saturated while the magnetic material further away from the conductor is still not fully utilized. This paper proposes a multipermeability distributed air-gap inductor structure to increase inductance without the necessity of increasing the inductor volume. The best discrete permeability value is investigated. Based on the best discrete permeability value, inductance as well as the inductance density trends is calculated by varying the number of permeability layers under the condition that thickness for each layer is constant. Also, the inductance variations versus the number of permeability layers are also obtained under the condition that the inductor thickness is constant. A three-permeability inductor and a single-permeability inductor are fabricated to evaluate the proposed method. The measured results show that the three-permeability inductor has a much higher inductance than the single-permeability inductor for the entire load range. Both inductors are tested in a 5-V input, 3-V output dc/dc converter to compare their performances. The results show that the three-permeability inductor can further improve the efficiency of high-frequency dc/dc converters. [ABSTRACT FROM AUTHOR]

It is found out that using reverse coupled inductors could effectively improve power density and dynamic performance of multiphase interleaved point of load converters. Thus, it is of great significance to conduct a research about design and fabrication of ultrathin coupled inductors for system 3-D integration. The aim of this paper is to explore the structures, modeling, and fabrication of ultrathin coupled inductors based on low-temperature cofired ceramic (LTCC) technology. Four structures classified by shapes and relative positions of windings are introduced and compared. Simple but effective analytic models are set up to calculate self-inductance, leakage inductance, and coupling coefficient for quick design, and a design guideline is summarized according to the models. We made a 1.3-mm-thick LTCC coupled inductor and two competing coil coupled inductors, and compared their characteristics and performance. They are tested in a 12-V input and 1.2-V/40-A output two-phase interleaved buck converter at three different switching frequencies. Core loss and winding loss of the inductors are quantified by simulation. Compared with conventional coil coupled inductors, the LTCC coupled inductor has higher power density and light load efficiency. Besides, it could also help to improve the transient performance of converters for its higher coupling coefficient. [ABSTRACT FROM AUTHOR]

The bidirectional CLLC resonant converter has distinguished potential in battery chargers and energy storage systems for its advantages in soft switching and bidirectional power flow capability. However, traditional CLLC converters generally adopt symmetrical design to maintain bidirectional symmetrical characteristics, which means the secondary LC network is designed to be equal to the primary LC network after reflection. The symmetrical design is only suitable for voltage grade matching scenarios where a wide voltage range is not required, such as CLLC-type dc transformers. Whereas in the field of bidirectional chargers, due to the wide voltage range of battery, there are significant differences in the characteristics required between charging and discharging mode, which makes symmetrical design no longer applicable. To cope with this issue, this paper proposes a novel design methodology of CLLC based on parameter equivalent and time domain model. With the parameter equivalent principle, the CLLC resonant tank with arbitrary parameters is investigated to satisfy the requirements of wide voltage range for bidirectional charger application. Compared with the symmetrical design, the proposed method can meet the requirements of bidirectional gain within preset frequency range and guarantee the achievement of zero-voltage switching under required load conditions with the minimum reactive power. In addition, the area product capacity of the magnetic part of the CLLC resonant tank is minimized based on the parameter equivalent principle. Finally, experiments have been performed on a 1 kW prototype to confirm the validity and feasibility of the proposed design methodology. [ABSTRACT FROM AUTHOR]

The development of the textile industry directly leads to the growth of pre-consumer waste generation. Investigating textile supply chain waste management in China is necessary to determine potential measures with the purpose of waste reduction from textile production. In this study, 396 textile supply chain factories in China were surveyed to evaluate their waste generation (quantity, waste streams, and disposal methods), waste management (practices, financial investments, expenditures and revenues), and difficulties and challenges in waste management. The results showed that the surveyed factories generated 331.88 t of the total waste in 2015, including an average of 15.32 t of hazardous waste, which accounted for 4.62% of the total waste. The average waste per ton of production in these factories were 0.14 t. The primary waste streams in the Chinese textile supply chain included sludge accounting for 41.67% of the total waste, followed by food/human (28.57%), textile (13.67%), other domestic (4.57%), cardboard/paper (4.30%), and chemical (3.15%) waste. Accumulated data related to the production of as sludge, other hazardous, and textile materials was sufficient; however, data related to human activities was inadequate. Only 35% of sludge was recycled in the textile industry. To improve the reuse ratio of sludge, it is necessary to classify the sludge with respect to its source. In the textile supply chain, 80% of textiles were recycled. Compared with post-consumer waste, the recovery rate of pre-consumer textile waste was high with a good recycling quality. Less than 20% of the food/human and domestic waste were recycled; most of these waste were mixed with other waste and collected by city municipalities in 2015. Further, there were a few recycling programs in mills. Our results also showed that the factories invested three times more in infrastructure than that in administrative expenditures, and that the revenues were nearly 50% of the total investments. Over 80% of factories were found to have an extended payback period (more than 10 years) for waste investments, and few factories could recoup the money invested in a short time frame. Among them, we found that more attention needs to be paid to financial problems of waste management in small-sized factories. Investing positively should be adopted by the government and brands. Based on our observations, the predominant problems encountered in waste management included a lack of technical support, lack of support from the government and brands, and shortage of qualified recycling contractor. To resolve these issues, collaborations between the government, brands, and suppliers is imperative. In general, China exhibited more sufficient waste management compared to Cambodia, Vietnam, South Korea, and Myanmar. However, waste management in China and these other countries have great potential for improvement. The results presented herein can provide information for policymakers as well as on systemic waste management in the textile industry. [ABSTRACT FROM AUTHOR]

For bidirectional CLLC resonant converters, synchronous rectification (SR) is a key technique that can reduce the conduction losses in rectifying side by replacing the diodes with the switches’ channel. However, existing methods suffer from either complex hardware, or incomplete and imprecise control effect. Aiming at solving these problems, this article proposes a digital sensorless SR algorithm based on the time-domain model under a hybrid modulation for CLLC converters. The proposed approach can precisely enable the SR drive action within almost the whole load range and without any additional hardware, e.g., antiparallel diode, SR IC, and high bandwidth sensor. Its implementation only needs to measure dc signals (e.g., the output current), rather than any high-frequency resonant signals. Additionally, the presented algorithm can be easily implemented on a digital controller. Finally, experiments have been performed on a prototype to verify the validity and applicability of the presented SR algorithm. [ABSTRACT FROM AUTHOR]

Double-sided cooling based on planar packaging method features better thermal performance than traditional single-sided cooling based on wire bonds. However, this method still faces thermal and electrical challenges in multichip SiC power modules. Specifically, one is severe thermal coupling among parallel bare dies, and the other is unbalanced current sharing due to unreasonable layout design. This article aims to explore the potentials of SiC power devices in power module, which are higher current capability and reliability. The proposed packaging method is called interleaved planar packaging and can get rid of the optimizing contradiction between thermal and electrical performance. In this packaging method, there are two functional units: interleaved switch unit and current commutator structure. Benefited from the two units’ electromagnetic and thermal decoupling effects, the interleaved power module features low loop inductance, balanced current, low coupling thermal resistance, and even thermal distributions. A 1200 V 3.25 mΩ half-bridge SiC power module based on interleaved planar packaging is fabricated and tested to verify this method's superiority. [ABSTRACT FROM AUTHOR]

The snubber circuit is a cost-effective solution to reduce the severe turn-off overvoltage and oscillation caused by the fast switching characteristics of SiC MOSFET. However, the turn-on switching losses will significantly increase as the snubber decouples the power loop parasitic inductance during the switching process. In this article, the effect of the power loop parasitic inductance on the switch performance of SiC MOSFETs and the quasi-zero voltage switching (QZVS) turn-on condition are studied. On this basis, an SiC MOSFET overvoltage and oscillation suppression circuit (OVSC) with not only the switching losses optimization feature but also the clamping energy feedback characteristic is proposed. The overvoltage and oscillation can be effectively suppressed by clamping capacitors, and those capacitors do not participate in the switching process until the overvoltage occurs, which is of benefit to the switching losses reduction compared with the other normal snubber circuits. Besides, the turn-off overvoltage and oscillation energy stored in the clamping capacitors can be feedback to dc and load side through a passive branch composed of an energy feedback inductor and a diode. The experimental studies and comprehensive comparison studies are carried out to verify the validity of the proposed OVSC. The experimental results show that OVSC has excellent overvoltage and oscillation suppression performance and can significantly reduce the switching losses. [ABSTRACT FROM AUTHOR]

Wide bandgap semiconductors show superior material properties enabling silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) present good features on its switching speed and withstand voltage. However, the high voltage and fast switching characteristics of SiC MOSFETs also put forward new requirements for voltage measurement, that is, high bandwidth under high voltage conditions. This article proposes a new voltage divider structure and a proactive parameter design compensation network to build high voltage and high bandwidth voltage sensing circuit. This structure utilizes the characteristics that the same resistor has the same parasitic capacitance to meet the high frequency constraints of the voltage sensing circuit. The influence of parasitic parameters and load parameters on circuit performance is analyzed in detail, which provides a basis for the compensation network design. By combining the proposed voltage sensing circuit with an appropriate proactive parameter design load effect compensation network (PDCN), the withstand voltage rating of the low-voltage and high-bandwidth voltage probes can be extended to required levels. Different from other existing methods, PDCN can actively design the compensation circuit parameters and provide the optimal parameters of the compensation circuit. This lead to a smaller input capacitance than the state of the art commercial voltage probes, which will help to obtain better performance when measuring high-speed switching voltage. The performance of the voltage measurement is experimentally verified and compared by SiC-based double pulse test (DPT) circuits. [ABSTRACT FROM AUTHOR]

In this letter, a soft-switching transformerless dc−dc converter with single-input bipolar symmetric outputs (SIBSO) is proposed, which has positive and negative outputs with equal voltage amplitude and can be used in audio amplifier, bipolar symmetric auxiliary power supply application, etc. Based on the proposed bipolar symmetric outputs cells, the SIBSO dc−dc converter only requires two switches forming a half bridge circuit, and zero voltage switching (ZVS) of the two switches can be achieved over full load range. In addition, common ground of input and outputs is realized, which means the floating driver and isolated sensors are not required in the proposed dc−dc converter. The controller and drivers can be powered up by using input power supply through a simple step-down circuit, which reduces not only the cost and volume but also the complexity of the converter. The operation modes and characteristic of the proposed SIBSO dc−dc converter are analyzed. Moreover, parameter design for ZVS operation is presented. Finally, a 60-W 1-MHz switching frequency prototype is built up by using GaN high electron mobility transistors (HEMTs). Experimental results shown that bipolar symmetric outputs are obtained with common ground of input and output, and peak efficiency of 95.8% and power density of 154 W/in3 are achieved. [ABSTRACT FROM AUTHOR]

The gallium nitride high electron mobility transistors (GaN HEMTs) are a superior candidate for the new-generation power electronics systems with higher efficiency and power density. However, due to the unique reverse characteristics, the reverse voltage drop of GaN HEMTs is much higher than that of diode. The deadtime loss in GaN-based bridge converters will be comparable to switching losses if the deadtime is not optimized. To optimize the deadtime for higher efficiency, this article proposes an accurate analytical model of GaN HEMTs, including circuit's parasitic inductances, the nonlinear capacitances, the unique reverse characteristics, etc. Taking a GaN-based synchronous buck converter as the example, the proposed model is realized, which fully uses the datasheet to avoid additional experiments. In order to accurately measure the switching current for validation, a novel parasitics-based current measurement method is proposed. The proposed model is verified by simulation in LTspice and experiment, and good agreement is shown. Based on the accurate analytical model, the deadtime is optimized for different load currents to improve the efficiency within the full load range. Compared with the fixed deadtime of 15 ns, the increase of efficiency can be up to 8%. This work will promote the high-frequency application of GaN HEMTs. [ABSTRACT FROM AUTHOR]

Current sense resistor (CSR) is widely used due to cost and integration considerations in industrial applications. However, when CSRs are used to sense transient currents caused by power device switching, especially fast-switching silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (mosfets) with high di/dt, even a tiny parasitic inductance in CSRs bring a significant impact on its sensing performance. This article proposes a low-cost well-performance and easy-to-design current sensing circuit that uses the CSRs and an LR compensation network (LRCN) to compensate for the effect of parasitic inductance on transient current sensing. In order to support the parameter selection of the LR network, the effects of parameters such as parasitic capacitance, parasitic inductance, and loads on the performance of the proposed current sensing circuit are analyzed in detail. Meanwhile, a parasitic inductance measurement method that only needs passive probes is proposed to measure and calculate the parasitic inductance of CSRs. This circuit can not only sense the transient current on the printed circuit board level but also observe the transient current on the oscilloscope through a coaxial cable connection. Finally, experimental studies under an inductive load double pulse test setup with SiC mosfets are carried out to verify the validity and feasibility of the proposed transient current sensing circuit. Only a high self-resonant frequency inductor and a surface mounted device resistor are needed to form the LR network to fully compensate the effect of parasitic inductance on CSRs. [ABSTRACT FROM AUTHOR]

The use of chemicals in the textile industry has been widely investigated. This study used an improved method with the USEtox model to assess the environmental impacts of chemical pollutants discharged by the textile industry. The environmental impacts attributed to the discharged chemical pollutants were ranked using a quantity analysis method and a toxicity analysis method. The rankings of the two methods were compared by calculating Spearman's correlation coefficients and outliers. The results showed that the human health and ecological hazards potential were mainly caused by heavy metals. The rankings of the environmental impacts calculated with the quantity analysis method were different from those calculated with the toxicity analysis method. Cadmium, hexachlorobenzene and mercury caused severe human and ecological hazards with a small volume of emissions. Zinc and hexavalent chromium were highly toxic chemical pollutants, which could cause severe human health and ecological hazards potential. These five kinds of chemical pollutants should be preferentially controlled to mitigate the environmental impacts caused by chemical pollutants discharged from the textile industry. [ABSTRACT FROM AUTHOR]

Highlights: [•] Grey water footprint (WF grey ) is an indicator of the level of water pollution. [•] The calculated WF grey of the same product with the same production line is different because selections of different maximum acceptable concentrations of COD. [•] Necessary information relate to WF grey calculation should be clearly presented to inform decision makers. [Copyright &y& Elsevier]

This paper analyzes the problem of instability in enhancement-mode gallium nitride (GaN) transistors based half-bridge circuits. The instability may cause sustained oscillation, resulting in overvoltage, excessive electromagnetic interference (EMI), and even device breakdown. GaN devices operate in the saturation region when they conduct reversely during the dead time. Under the influence of parasitic parameters, the GaN-based half-bridge circuit exhibits positive feedback under certain conditions, thus, resulting in sustained oscillation. A small-signal model is proposed to study this positive feedback phenomenon. Like the second-order under-damped system, damping ratio is defined to determine the system's stability. Based on the model, the influence of circuit parameters on instability is investigated and guidelines to suppress the oscillation are given. Reducing the common-source inductance, increasing the gate resistance of the inactive switch or connecting a diode in parallel to the inactive switch are some effective ways to suppress the oscillation. Finally, the analyses are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

Wireless power transfer (WPT) is a promising way of charging electric vehicles (EVs) for its convenience, safety, physical and electric isolation. For satisfying the high-power application or rapid charging, WPT systems based on multiple coils are usually used. Nowadays, LCC compensation is a commonly used topology. However, the conflict between the installation space limitation and the large volume induced by compensated inductors and multiple coils brings the critical challenge for EVs charging electric vehicles' charging. In this article, a method of integrating multiple decoupled coils is put forward. All the main coils and compensated inductors are integrated together for compacting the WPT system. Characteristics of the coupler are analyzed when it exists a misalignment both in x- direction and y-direction. Besides, an antimisalignment strategy based on optimizing the phase difference of current in main coils is proposed. Finally, a 3kW laboratory prototype is built to verify the proposed compact coupler and antimisalignment control strategy. The system output power only drops 3.2% and 9.2% respectively with a −200 mm and +200 mm misalignment in the x-direction compared with full alignment by adopting the proposed antimisalignment method. When it is fully aligned, the system can achieve 94%peak efficiency. [ABSTRACT FROM AUTHOR]

Relying on the advantages of small size, good controllability, and consistency, printed circuit board (PCB) inductors are being widely used. For PCB inductors, reducing copper loss is one of the key issues. Although some research works focus on fringing effect in PCB planar winding, there are few methods to reduce proximity loss for PCB inductor. Regarding the abovementioned issues, this letter first improves the Ferreira’s 1-D copper loss model to accommodate the core feature of PCB winding: variable number of turns per layer. With this model, pyramid theorem is proposed that putting the layer with fewer turns into positions farther away from the air gaps can lower the total winding loss. Based on the theorem, this letter proposes a novel PCB inductor-winding structure named pyramid winding, which has fewer (or equal) turns on layers farther from air gaps. Pyramid winding has less copper loss, fewer copper layers, smaller size, and lower cost. In the experiment, inductor prototypes with the same six turns and ferrite pot cores but different PCB winding arrangements are built for a 300-kHz 2700-W LLC converter. Tests on inductor resistance and converter efficiency are done, and the pyramid theorem and the effectiveness of pyramid winding are verified. [ABSTRACT FROM AUTHOR]

Si 3 N 4 ceramic substrates serving as heat dissipater and supporting component are required to have excellent thermal and mechanical properties. To prepare Si 3 N 4 with desirable properties, a novel two-step gas-pressure sintering route including a pre-sintering step followed by a high-temperature sintering step was devised. The effects of pre-sintering temperature (1500 – 1600 °C) on the phase transformation, microstructure, thermal and mechanical properties of the samples were studied. The pre-sintering temperature played an important role in adjusting the Si 3 N 4 particles' rearrangement and α→β transformation rate. Furthermore, the densification process for the Si 3 N 4 ceramics prepared via the two-step gas-pressure sintering was revealed. After sintered at 1525 °C for 3 h followed by a high-temperature sintering at 1850 °C for another 3 h, the prepared Si 3 N 4 compact with a bimodal microstructure presented the highest thermal conductivity and flexural strength of 79.42 W·m−1·K−1 and 801 MPa, respectively, which holds great application prospects as ceramic substrates. • Si 3 N 4 with a bimodal microstructure was prepared by two-step gas-pressure sintering. • The α→β transformation rate can be tailored by the pre-sintering temperature. • The Si 3 N 4 pre-sintered at 1525 °C has the optimal comprehensive properties. • The prepared Si 3 N 4 holds great application prospects for ceramic substrates. [ABSTRACT FROM AUTHOR]

Although with good robustness, insulated gate bipolar transistor (IGBT) modules suffer from catastrophic failures due to excessive electrothermal stress in field use. In view of the coupled and multitimescale electrothermal dynamics of IGBT modules, the conventional simulation methods are difficult to calculate the stresses accurately and efficiently. Therefore, this article proposes an artificial neural network (ANN) based method to calculate the chip-level stress of IGBT modules in system-level circuit simulation. The first contribution in this article is that the research focus goes from the entire device to chips within the device. Correspondingly, the uneven dynamic current and thermal coupling effects among chips are fully considered based on the established uneven power loss and three-dimensional (3-D) thermal models. The second one is to solve the contradiction between simulation efficiency and accuracy in multitimescale operation analysis through the joint application of IGBT physical model and ANN. The third one is to propose the complete chip-level stresses calculation and automated modeling processes, based on multisoftware cosimulation. An inverter experimental prototype was established to verify the accuracy of the proposed calculation method. The comparison results show that the method can accurately describe the transient junction temperature, overcurrent and overvoltage stresses, thus providing an effective support for the safety design of converters. [ABSTRACT FROM AUTHOR]

Compared with silicon and silicon carbide devices, the unique electrical and structural characteristics of gallium nitride high electron mobility transistors (GaN HEMTs) make them have different requirements for power module integration. This article proposes a novel integration scheme for the high-voltage lateral GaN HEMT dies without bonding wires. Based on the proposed integration scheme, a compact 650 V/30 A GaN power module with low parasitic parameters and high thermal performance is designed. The GaN dies are sandwiched between two ceramic substrates to improve thermal performance and ensure consistent thermal expansion coefficients. The multiple copper layer structure is used to increase wiring flexibility to reduce parasitic parameters. The design of gate and power loop layouts is discussed, and the common-mode (CM) capacitance is optimized. A comprehensive reliability evaluation is also carried out for this integration scheme. Finally, a double-sided cooling 650 V/30 A full-bridge GaN power module with 2.4 cm×1.3 cm×0.17 cm is fabricated. The thermal resistance is reduced by 30%–48% compared with the conventional single-sided cooling module. The power loop and gate loop inductances are reduced to 0.94 nH and 2 nH, respectively, and the CM capacitance is limited to 2.5 pF. The maximum dv/dt of the drain–source voltage is high as 150 V/ns with only 10% overshoot. Based on the power module, a 3.3-kW two-phase interleaved buck converter is developed. It has 820 W/in3 power density and 98.85% peak efficiency. [ABSTRACT FROM AUTHOR]

To achieve superior thermal and mechanical properties of copper-bonded (Cu-bonded) Si3N4 substrate, a pressure-assisted direct bonded Cu (DBC) technique was applied to bond Cu foil with Si3N4 plate. The effects of oxide layer (SiO2) thickness of Si3N4 plate on the microstructure, thermal and mechanical properties of the Si3N4-DBC samples were investigated. The successful bonding of Cu foil to Si3N4 plate was confirmed by the presence of the interfacial products of Cu2MgSiO4 and CuYO2. Additionally, it was demonstrated that a thin SiO2 layer can result in a discontinuous distribution of interfacial products while a thick one can lead to the formation of pores in SiO2 layer. Notably, the sample prepared by Si3N4 plate with 5-μm-thickness SiO2 layer and Cu foil with 5.9-μm-thickness oxide layer (Cu2O) exhibited the optimally comprehensive properties with thermal conductivity of 92 W·m−1·K−1 and shearing strength of 102 MPa, which demonstrates significant promise for application in power electronic modules. [ABSTRACT FROM AUTHOR]

Wide bandgap (WBG) semiconductor devices are developing rapidly due to their superior performance compared to traditional silicon-based devices. However, the packaging technology of traditional devices has limited the application of WBG semiconductor devices because of the challenges in electrical insulation. The complex environment of high blocking voltage, high frequency, and high temperature is the major reason for insulation failure of encapsulation structure. Therefore, in this article, an epoxy resin composite with nonlinear conductivity is proposed to be used as a coating to improve the electric field distribution of high-voltage high-power IGBT modules. First, an electrical field simulation model was built considering the thermal stress. It was found that the electric field in high temperature was improved compared with that in room temperature due to the temperature-dependent conductivity of silicone gel. Nevertheless, the risk of insulation failure still exists. After the application of nonlinear conductivity materials (NCMs) coating, the maximum electric field at the triple junctions and the ratio of electric field distortion in high field areas were significantly decreased. Further analysis showed that the optimization ratio of electric field increased with the increase of the blocking voltages or power losses in the IGBT chip. The results have demonstrated that the NCMs can reduce the maximum electric field in the IGBT encapsulation structure by 73% under the operating conditions of 120 W 10 kV. Partial discharge (PD) tests show that the partial discharge initial voltage (PDIV) of the substrates with NCM coating is increased by 33% compared with the normal encapsulation structure and the coating significantly inhibits the growth of electric trees. The presented results indicate that the NCMs have the potential to improve the insulation performance of high-voltage high-power IGBT modules. [ABSTRACT FROM AUTHOR]

In order to deal with the challenges in establishing a high input voltage high step-down auxiliary power supply (APS) for modular converters, a flyback converter utilizing series-connected silicon carbide (SiC) MOSFETs is proposed in this article. With the aid of a novel snubber circuit structure, the used series-connected SiC MOSFETs can switch with nearly perfect dynamic voltage sharing. Besides, the snubber circuit acts as voltage clamping circuit for the flyback converter, so voltage overshoot caused by transformer leakage inductance can be effectively controlled. Furthermore, the snubber circuit helps to power the control, gate driver, and startup circuits of the APS, leading to a reduction in system complexity and improvement in efficiency. Detailed circuit analysis and design considerations of the APS are presented. Finally, hardware of a 4 kV/120 W APS is established and experimentally verified. [ABSTRACT FROM AUTHOR]

This letter proposed a novel high-current planar inductor with cooling fins based on 3-D printing and its copper winding is 3-D printed by using selective laser melting technology. The 3-D-printed winding is designed for high-current applications based on 3-D space and can work as both winding and cooling fins. Compared with conventional printed circuit board (PCB) planar inductor, the proposed planar inductor not only has better performance, such as low dc resistance (DCR), ac resistance, and temperature rise, without volume increasing, but also has the superiorities of conventional PCB planar magnetics, such as ease of manufacture and controllability. To verify its performance, a 100-A-output buck converter using the proposed inductor was fabricated and compared with another identical buck converter using a conventional PCB inductor with the same size. The DCR of the proposed inductor is almost one-fifth of the PCB inductor. Besides, the efficiency of the buck converter with the proposed inductor is always over 0.5% higher than that with PCB inductor under different loads and its maximum efficiency is nearly 1% higher at light load. Furthermore, the maximum temperature rise of the proposed inductor is 26.8 $^{\circ }$ C under full load, only one-third of the PCB planar inductor. In other words, the proposed inductor can work well under 100-A current, whereas the traditional PCB inductor cannot due to too high temperature (103.8 $^{\circ }$ C). [ABSTRACT FROM AUTHOR]

The on-board low-voltage dc–dc converter (LDC) in electric vehicles (EVs) is used to connect the high-voltage battery with the low-voltage auxiliary system. With the advancement of auxiliary equipment in EVs, the output current of the LDC can be hundreds of amperes, which will cause high-conduction loss and severe thermal concern. In this article, a high-efficiency high-power-density on-board LDC is presented. To reduce current stress and improve efficiency, three-phase interleaved LLC dc–dc converters are paralleled to provide 270 A load current. Synchronous rectifier is used to reduce secondary conduction loss. zero-voltage-switching (ZVS) turn-on of primary switches and ZCS turn-off of secondary switches are achieved, thus switching loss can be reduced significantly. Moreover, phase-shedding technology is used to improve light load efficiency. Switch-controlled capacitor (SCC) technology is used to achieve accurate load current sharing among the three phases, which protects the devices against high-current stress, reduces the conduction loss, and improves the reliability of the system. As SCC switches achieve ZVS turn-on and turn-off by its nature, the loss of the SCC circuit is of less concern with regard to the rated output power. In addition, GaN HEMTs are used in the primary side to improve the power density and eventually help achieving light weight. A 3.8-kW (14 V/270 A) LDC prototype is developed and tested. Experimental results show good current balancing among the three phases. A peak efficiency of 96.7% at 140 A load and a full load efficiency of 95.8% are achieved with 3 kW/L power density and 1.5 kg weight. [ABSTRACT FROM AUTHOR]

Transfer efficiency of a wireless power transfer (WPT) system is tightly related to the load, which varies greatly in a wide range during the charging process. Generally speaking, dual-sided control strategies are commonly applied to overcome the load variation and improve system efficiency. However, the system may suffer from hard switching, high control complexity, and auxiliary dc/dc converters. In this article, a dual-sided control strategy based on mode switching is proposed to approach an optimal load impedance, zero-voltage switching of all mosfets in WPT system, and a required output. In this control strategy, the output voltage of the inverter is adjusted in a wide range by switching the operation mode of the inverter to approach the optimal load impedance. The output current/voltage is regulated by the active rectifier control. Besides, a novel phase-locked method is proposed for the semi-bridgeless active rectifier control, which is simpler compared with the traditional phase-locked method. Finally, a 500-W prototype is built to verify the theoretical analysis, and the peak system efficiency of 93.9% is gained with k = 0.23. [ABSTRACT FROM AUTHOR]