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A new system-on-a-chip radar sensor for next-generation wearable wireless interface applied to the human health care and safeguard is presented. The system overview is provided and the feasibility study of the radar sensor is presented. In detail, the overall system consists of a radar sensor for detecting the heart and breath rates and a low-power IEEE 802.15.4 ZigBee radio interface, which provides a wireless data link with remote data acquisition and control units. In particular, the pulse radar exploits 3.1-10.6GHz ultra-wideband signals which allow a significant reduction of the transceiver complexity and then of its power consumption. The operating principle of the radar for the cardiopulmonary monitoring is highlighted and the results of the system analysis are reported. Moreover, the results obtained from the building-blocks design, the channel measurement, and the ultrawideband antenna realization are reported. [ABSTRACT FROM AUTHOR]

Summary: We propose a novel CMOS differential voltage‐controlled equivalent active resistor based on a modified common‐source cross‐coupled pair. The equivalent resistance exhibited by the circuit can be tuned to be either positive or negative through the tail current, which is controlled by a bias voltage. The complete cell comprises four transistors, two resistors in addition to the bias voltage, and tail current source. Application to the design of oscillators is demonstrated by theoretical analysis, circuit simulations, and verified experimentally through measurements on prototypes implemented using discrete transistors. In this work, we propose a novel tunable negative or positive differential resistance implemented using four transistors, which offers an advantage over the conventional cross‐coupled differential pair. The advantage being that the equivalent resistance exhibited by the circuit can be tuned to be either negative or positive through a tail current as well as via a bias voltage. Its linearity and range of operation are examined, and applications to oscillators are demonstrated through simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper reports the analyses of the inductive degeneration, noise filter, and optimum current density techniques for phase noise reduction in the CMOS Hartley oscillator circuit topology. The design of the circuit topology is carried out in 28 nm bulk CMOS technology in a range of common conditions adopted also for a previous study on the Colpitts topology, so complementing the previous study on Colpitts topology and allowing a direct comparison between the Hartley and Colpitts topologies. The theoretical analyses of the three techniques are carried out and verified by means of circuit simulations. The results obtained for the inductive degeneration and noise filter show the existence of an optimum inductance for minimum phase noise. Moreover, the results obtained for the optimum bias current density technique applied to a Hartley oscillator circuit topology incorporating either inductive degeneration or noise filter provide the demonstration of the existence of an optimum bias current density for minimum phase noise. Moreover, we will go beyond this important result, by investigating for the first time the relationship with the optimum current density for transistor minimum noise figure and other general results reported in the literature. Overall, the analyses show that the adoption of these techniques may lead to a potential phase noise reduction up to 16 dB at a 1 MHz frequency offset for an oscillation frequency of 10 GHz, with respect to the traditional Hartley topology. Lastly, we report a comparison under common conditions between Colpitts and Hartley topologies implementing the aforementioned techniques, which could, from a designer perspective, be useful to acquiring a few key insights about the circuit design opportunities and focus the design efforts toward specific directions for performance optimizations. Copyright © 2017 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

This paper reports a novel oscillator circuit topology based on a transformer-coupled p-network. As a case study, the proposed oscillator topology has been designed and studied for 60 GHz applications in the frame of the emerging fifth generation wireless communications. The analytical expression of the oscillation frequency is derived and validated through circuit simulations. The root-locus analysis shows that oscillations occur only at that resonant frequency of the LC tank. Moreover, a closed-form expression for the quality factor (Q) of the LC tank is derived which shows the enhancement of the equivalent quality factor of the LC tank due to the transformer-coupling. Last, a phase noise analysis is reported and the analytical expressions of phase noise due to flicker and thermal noise sources are derived and validated by the results obtained through SpectreRF simulations in the Cadence design environment with a 28 nm CMOS process design kit commercially available. [ABSTRACT FROM AUTHOR]

This paper presents a 67GHz LC oscillator exploiting a three-spiral transformer and implemented in 65nm bulk complementary metal-oxide-semiconductor technology by STMicroelectronics. The three-spiral transformer allows operating with a lower voltage supply, still obtaining good phase noise performance, and achieving a compact design. Measured performances when supplied with 1.2 V are: oscillation frequency of 67 GHz, phase noise ( PN) equal to −96 dBc/Hz at 1 MHz frequency offset from the carrier, power consumption ( PC) equal to 19.2 mW and figure of merit ( FOM) equal to −179.7 dB/Hz. Measured performances when supplied with 0.6 V are: oscillation frequency of 67 GHz; PN equal to −88.7 dBc/Hz at a 1 MHz frequency offset from the carrier; PC equal to 3.6 mW and FOM equal to −179.7 dB/Hz. Copyright © 2016 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

This paper reports a phase noise analysis in a differential Armstrong oscillator circuit topology in CMOS technology. The analytical expressions of phase noise due to flicker and thermal noise sources are derived and validated by the results obtained through SpectreRF simulations for oscillation frequencies of 1, 10, and 100 GHz. The analysis captures well the phase noise of the oscillator topology and shows the impact of flicker noise contribution as the major effect leading to phase noise degradation in nano-scale CMOS LC oscillators. Copyright © 2016 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

This paper reports the analyses of three techniques for phase noise reduction in the complementary metal-oxide semiconductor (CMOS) Colpitts oscillator circuit topology. Namely, the three techniques are inductive degeneration, noise filter, and optimum current density. The design of the circuit topology is carried out in 28-nm bulk CMOS technology. The analytical expression of the oscillation frequency is derived and validated through circuit simulations. Moreover, the theoretical analyses of the three techniques are carried out and verified by means of circuit simulations within a commercial design environment. The results obtained for the inductive degeneration and noise filter show the existence of an optimum inductance for minimum phase noise. The results obtained for the optimum bias current density technique applied to a Colpitts oscillator circuit topology incorporating either inductive degeneration or noise filter show the existence of an optimum bias current density for minimum phase noise. Overall, the analyses show that the adoption of these techniques may lead to a potential phase noise reduction up to 19 dB at a 1-MHz frequency offset for an oscillation frequency of 10 GHz. © 2015 The Authors International Journal of Circuit Theory and Applications Published by John Wiley & Sons Ltd. [ABSTRACT FROM AUTHOR]

Comparative Phase Noise analyses of common-source cross-coupled pair, Colpitts, Hartley and Armstrong differential oscillator circuit topologies, designed in 28 nm bulk CMOS technology in a set of common conditions for operating frequencies in the range from 1 GHz to 100 GHz, are carried out in order to identify their relative performance. The impulse sensitivity function (ISF) is used to carry out qualitative and quantitative analyses of the noise contributions exhibited by each circuit component in each topology, allowing an understanding of their impact on phase noise. The comparative analyses show the existence of five distinct frequency regions in which the four topologies rank unevenly in terms of best phase noise performance. Moreover, the results obtained from the ISF show the impact of flicker noise contribution as the major effect leading to phase noise degradation in nanoscale CMOS LC oscillators. [ABSTRACT FROM AUTHOR]

This paper reports the latest advances on millimeter-wave CMOS voltage-controlled oscillators (VCOs). Current state-of-the-art implementations are reviewed, and their performances are compared in terms of phase noise and figure of merit. Low power and low phase noise LC-VCO and ring oscillator designs are analyzed and discussed. Design and performance trends over the last decade are provided and discussed. The paper shows how for the higher range of millimeter-waves (>60GHz) the performances of ring oscillators become comparable with those of LC-VCOs. [ABSTRACT FROM AUTHOR]

Applying pulsewidth modulation (PWM) to control the gain in audio codecs for mobile applications leads to several advantages, such as the smooth control of tuning parameters, smaller silicon area, and lower power consumption, as compared with other tuning techniques using programmable gain amplifiers and zero crossing detectors. The PWM has to be embedded into the main signal path, preferably in a closed-loop control scheme, in order to exploit its benefits. However, the insertion of dithering and offset controls in a gain setting loop poses the problem of controlling their effects in all gain conditions. This paper reports a novel technique aimed at solving the associated issues and limitations, and provides the experimental proof of the concept through the implementation of a test-chip design on silicon. In particular, this paper reports the design and experimental results of a delta–sigma analog-to-digital converter featuring a click-free gain control technique, dithering insertion, and idle-tone shifting, which has been implemented in a 40-nm complementary metal–oxide–semiconductor technology for commercial telecom audio codec applications. [ABSTRACT FROM PUBLISHER]

River discharge is an important variable to measure in order to predict droughts and flood occurrences. Once the cross-sectional geometry of the river is known, discharge can be inferred from water level and surface flow velocity measurements. Since river discharges are of particular interest during extreme weather events, when river sites cannot be safely accessed, noncontact sensing technologies are particularly appealing. To this purpose, this work proposes a prototype of a low-cost continuous wave (CW) Doppler radar sensor, which is able to monitor the surface flow velocity of rivers. The prototype is tested at two gauged sites in central Italy, along the Tiber River. The surface flow velocity distribution across the river is monitored by means of the analysis of received Doppler signal. The surface velocity statistics are then extracted using a novel algorithm that is optimized to run on a microprocessor platform with minimal computing power (ArduinoUNO). In particular, the radar measurements are used to initialize a 2-D entropy-based velocity model (EVM) that is able to estimate river discharges in any flow condition. Finally, the results concerning the observed discharge provided by the EVM prove to be comparable with those obtained with more expensive commercial solutions. The results are important since the described methodology can be extended to small-size Doppler radar sensors onboard unmanned aerial vehicles (UAVs), the latter providing a method for mapping surface velocity of rivers. [ABSTRACT FROM AUTHOR]

Single nucleotide polymorphisms (SNPs) in microRNA genes have been associated with colorectal cancer (CRC) risk, survival and response to treatment. Conflicting results are available on the association between rs4919510, a SNP in mature miR-608 and clinical outcome in CRC. Here, we analyzed the association between rs4919510 and benefit from perioperative treatment in a randomised phase II trial of neoadjuvant Capecitabine and Oxaliplatin (CAPOX) followed by chemo-radiotherapy, surgery and adjuvant CAPOX ± Cetuximab in high-risk locally advanced rectal cancer (LARC). A total of 155/164 (94.5%) patients were assessable. 95 (61.3%) were homozygous for CC, 55 (35.5%) heterozygous (CG) and 5 (3.2%) homozygous for GG. Median follow-up was 64.9 months. In the CAPOX arm the 5-year progression-free survival (PFS) and overall survival (OS) rates were 54.6% and 60.7% for CC and 82.0% and 82.1% for CG/GG, respectively (HR PFS 0.13, 95% CI: 0.12-0.83, P = 0.02; HR OS 0.38, 95% CI: 0.14-1.01, P = 0.05). In the CAPOX-C arm PFS and OS were 73.2 and 82.2%, respectively for CC carriers and 64.6 and 73.1% for CG/GG carriers (HR PFS 1.38, 95% CI: 0.61-3.13, P = 0.44; HR OS 1.34, 95% CI: 0.52-3.48, P = 0.55). An interaction was found between study treatment and rs4919510 genotype for both PFS (P = 0.02) and OS (P = 0.07). This is the first study investigating rs4919510 in LARC. The CC genotype appeared to be associated with worse prognosis compared to the CG/GG genotype in patients treated with chemotherapy and chemo-radiotherapy alone. Addition of Cetuximab to chemotherapy and chemo-radiotherapy in CC carriers appeared to improve clinical outcome. [ABSTRACT FROM AUTHOR]

This paper addresses the extension of the on-chip cold-source noise figure (NF) measurement methodology to millimeter-wave (mm-wave) integrated circuits by using the PNA-X. The proposed methodology has been successfully applied to the on-chip NF measurements of mm-wave building blocks on silicon such as a 4-b programmable 16-phase active phase shifter. The results show how the cold-source method can be extended up to the mm-wave frequency range by using the PNA-X with frequency extenders and an active frequency down-converter, so allowing satisfactory NF measurements of mm-wave integrated circuits. [ABSTRACT FROM AUTHOR]