Search

In HEVC, the effect of the RDO on compression efficiency increases while its computational complexity accounts for an important part of the computation burden. For H.264/AVC, zero block (ZB) detection has been used as an efficient scheme to reduce the complexity of RDO operations. For HEVC, ZB detection is different from the scheme for H.264/AVC because HEVC requires large transform sizes, 16\,\times\,16 and 32\,\times\,32. The increased transform size increases the complexity of ZB detection. It also decreases the accuracy of ZB detection because the variance among the quantized DCT coefficients increases and consequently the possibility of a block to be a ZB also increases even when not all of the quantized coefficients are equal to zero. For effective ZB detection of 16\,\times\,16 and 32\,\times\,32 blocks, this paper proposes a new ZB detection algorithm in which the DC components of the Hadamard coefficients are transformed again by Hadamard basis functions for 16\,\times\,16 and 32\,\times\,32 blocks and the results are compared with a predefined threshold. To reduce the computational complexity, the upper-bound of the SAD (or SATD) is defined and the Hadamard threshold is then tested only for the blocks with the SAD (or SATD) smaller than the upper-bound. Experimental results show that the proposed ZB detection reduces the computational complexity of RDO by about 40% with a negligible degradation of the RD performance. [ABSTRACT FROM PUBLISHER]

The emerging High Efficiency Video Coding (HEVC) standard attempts to improve the coding efficiency by a factor of two over H.264/AVC using new compression tools with high computational complexity. The increased computational complexity makes the real-time execution with reasonable computing power become one of the critical concerns for the commercialization of HEVC. A large number of prediction modes are the main causes of the increased complexity of HEVC. Thus, a fast decision of a prediction mode needs to be effectively used to reduce the computational complexity. To take advantage of large amounts of previous works and to find a guide for application to HEVC, this paper presents a survey of these efforts for the previous standards, especially for H.264/AVC, and examines the possibility of the previous algorithms to be applicable for HEVC. To this end, previous algorithms are categorized and then the effectiveness of each category for HEVC is evaluated. For this evaluation, a previous algorithm is modified for HEVC when it is not applicable to HEVC directly. Simulation results show that most previous algorithms with slight modification, in general, improve the encoding speed with a relatively small degradation of the compression efficiency. Among them, hierarchical mode decision is especially effective whereas mode pre-decision using motion or spatial homogeneity often results in inaccurate results. [ABSTRACT FROM AUTHOR]

Spatial and temporal scalability in Scalable Video Coding (SVC) compression enables a video encoder to generate bit streams efficiently for various resolutions and frame rates. However, doing this requires more complex computations and greater memory bandwidth than H.264/AVC compression. In this paper, the performance and memory bandwidth for a SVC hardware encoder with three spatial and temporal layers are analyzed. Based on the analysis, a novel method is proposed for the source and interlayer data load. Experimental results show that the memory bandwidth is reduced by 77%. Furthermore, the memory access latency of the source data for the base layer is reduced by creating a data load for the base layer overlap with the execution of the enhancement layer. To satisfy the latency requirement, a mode pre-decision algorithm for a hardware SVC encoder is proposed. It reduces the computation of the fractional motion estimation (FME) and the inter-layer residual prediction by 80%. Simulation results show that the proposed methods decrease the BD-PSNR by 0.05 dB and increase the BD-BR by 1.64%, an amount that can be considered negligible in terms of degradation, while an encoding speed of 30 fps for Full HD (1920?1080) videos is achieved at an operating clock frequency of less than 200 MHz.1 [ABSTRACT FROM AUTHOR]

Noise corruption degrades the R-D performance of H.264/AVC encoders because of a loss of image quality and an increase in bit-rate. Previous noise reduction techniques attempt to avoid the loss of image quality, but they do not take the effect of noise on compression efficiency into serious consideration. In this paper, the noise effect on an H.264/AVC encoder is analyzed and a blockbased adaptive denoising algorithm is proposed. The proposed algorithm applies the denoising operation adaptively to blocks which do not include image details that need to be preserved. Furthermore, the proposed noise filter is not applied when the quantization parameter is larger than a pre-defined threshold because noise is filtered by a quantization operation in the encoder. As a result, both residual and information bits are decreased by the proposed noise filtering operation. Edge blurring caused by the filtering operation is also reduced as a result of the adaptive application of the filtering operation. Compared to cases where filtering is not used, the proposed method shows a maximum PSNR enhancement of 1.98 dB and a maximum bitrate reduction of 41%. [ABSTRACT FROM AUTHOR]