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This article presents a simulation model of silicon carbide (SiC) power MOSFET that accurately predicts both the static and dynamic third-quadrant behavior without compromising the first-quadrant's accuracy. Unlike existing models, this model features an asymmetric third-quadrant behavior for MOSFET characteristics necessary for the accurate synchronous rectifier simulations. Moreover, it includes the gate-dependent body diode behavior, essential for the accurate prediction of freewheeling high-side device behavior in half-bridge configurations with significant gate voltage oscillation. The model also includes reverse recovery characteristics for the accurate overshoot and power loss prediction. Despite having these added features, the model demonstrates good convergence and efficiency due to the replacement of conditional piecewise equations with continuous ones consisting of weighted variables. The model's convergence capability and efficiency have been verified by simulating a five-level cascaded H-bridge multilevel inverter. The model's superior efficiency and accuracy have been validated by comparing it with an established SiC power MOSFET model. Also, an easy-to-follow parameter extraction procedure is documented that only requires data commonly available in commercial datasheets for broader utility. Considering accuracy, efficiency, and convenience, the model is useful for all power electronics converter applications. [ABSTRACT FROM AUTHOR]

State-of-the-art silicon carbide (SiC) power devices provide superior performance over silicon devices with much higher switching frequencies/speed and lower losses. High switching speed is preferred for achieving low switching loss, yet high dv/dt and di/dt can result in high EMI emission during switching transients. These switching dynamics can be controlled by the device gate driving strategy. The multi-level active gate driver (AGD) approach is able to tradeoff the switching losses with the dv/dt and di/dt for each switching transient. A novel three-level (3-L) AGD for SiC power mosfet trajectory control is introduced. Its turn-off profile has a shorter turn-off delay compared to any existing methodology. Accordingly, a comprehensive datasheet-driven trajectory model for the online model-based optimization of the 3-L turn-off is introduced. The main factors that impact the 3-L turn-off performance are analyzed with this model. The experimental results of double pulse tests validate the approach. Additionally, the benefits of the proposed 3-L AGD method over two-stage turn-off and conventional gate drivers on the market are illustrated through experiments. [ABSTRACT FROM AUTHOR]

This paper presents functional high-temperature analog circuits in silicon carbide bipolar technology. The circuits will collectively form the analog signal conditioning block for a wireless telemetry system in an extreme environment (above 400°C). The signal conditioning block is composed of a low dc gain operational amplifier, a negative voltage charge pump (CP), an RC oscillator, and a voltage regulator. The circuits are tested up to 450°C. The measured open-loop gain for the amplifier at 450°C is 30 dB. The regulator provides approximately 9-V output at 450°C for a fixed load current of up to 18 mA and an applied reference of 4.5 V. The negative voltage CP requires an oscillating signal at its input, which is provided by the RC cross-coupled oscillator. The CP provides about −5 V at 450°C. [ABSTRACT FROM AUTHOR]

This paper reports an industry standard monolithic 555-timer circuit designed and fabricated in the in-house silicon carbide (SiC) low-voltage bipolar technology. This paper demonstrates the 555-timer integrated circuits (ICs) characterization in both astable and monostable modes of operation, with a supply voltage of 15 V over the wide temperature range of 25 °C–500 °C. Nonmonotonic temperature dependence was observed for the 555-timer IC frequency, rise time, fall-time, and power dissipation. [ABSTRACT FROM AUTHOR]

This paper presents a unified physics-based insulated-gate bipolar transistor (IGBT) compact model for circuit simulation that predicts the performance of both Si and SiC, n- and p-channel devices. The model can predict the detailed switching waveforms of these technologies based on its charge-based formulation. Further, this compact IGBT model is presented alongside a unique datasheet-driven parameter extraction process. The parameter extraction process enables users to quickly extract model parameters from data typically published without the need of taking physical measurements. The model has been validated with both Si and SiC devices for static and dynamic characteristics. The SiC IGBTs used for validation are a 12.5-kV n-channel device and a 13-kV p-channel device, while the Si IGBT chosen was IXDH30N120 from IXYS Corp. (Milpitas, CA, USA). This is the only IGBT model that predicts the performance of both n- and p-channel, Si and SiC devices, providing more freedom for the development of complex power electronics circuit designs. The convergence of the model has been verified by implementing a complex circuit consisting of both a dc–dc converter and a dc–ac inverter. The results presented here show that the unified model can be used to describe the behavior of a wide range of Si and SiC IGBT circuits. This paper is accompanied by a Verilog-A source code and a power point file demonstrating the model parameter extraction sequence. [ABSTRACT FROM AUTHOR]