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This paper presents a low-voltage, low-power voltage-to-current converter (V-I Converter) implemented in TSMC 40 nm CMOS technology. Operating at a supply voltage of 0.45 V with an input range of 0.1 V to 0.3 V, the proposed circuit achieves a temperature coefficient of 54.68 ppm/°C, which is at least 2× better than prior works, ensuring stable performance across a wide temperature range (−20 °C to 80 °C). The design employs a three-stage operational transconductance amplifier (OTA) with a Q-reduction frequency compensation technique to produce programmable output currents while maintaining a power dissipation of less than 2.76 μW. With a bandwidth of 34.45 kHz and a total harmonic distortion (THD) of −56.66 dB at 1 kHz and 0.1 VPP input signal, the circuit demonstrates high linearity and low power consumption under ultra-low voltage design scenarios. These features make the proposed V-I Converter highly suitable for energy-constrained applications such as biomedical sensors, energy harvesting systems, and IoT nodes, where low power consumption and temperature stability are critical parameters. [ABSTRACT FROM AUTHOR]

This paper presents an ultra-low-power CMOS voltage reference designed and verified in an 180 nm standard CMOS technology. To achieve DC and AC supply sensitivity under 0.01%/V and −100 dB, it employs a single transistor and two 2-T cores to improve supply immunity with minimal overhead, adding only one drain-to-source voltage for the total supply voltage. The proposed design achieves a line sensitivity of 0.0027%/V in a supply voltage range of 0.5 V to 2 V and consumes 630 pW with a supply voltage of 0.5 V. The simulated temperature coefficient is 12 ppm/°C in a temperature range of −40 °C to 150 °C, and the simulated power supply rejection ratio is −100.5 dB at 100 Hz without requiring any output decoupling capacitor. [ABSTRACT FROM AUTHOR]

An unusually large amplitude spontaneous miniature endplate potentials (gMEPPs) occur naturally at low frequency at the vertebrate neuromuscular junction. Unlike the normal miniature endplate potentials (nMEPPs), these gMEPPs have long duration and long time to peak. More strikingly, gMEPPs seem to be independent of extracellular and intracellular Ca+2. and have a greater temperature sensitivity than nMEPPs. They are potentiated by tetrodotoxin but inhibited by acetylcholine (ACh) receptor blockers indicating ACh is the neurotransmitter responsible for gMEPPs. The frequency of gMEPPs is greatly increased in muscles weakened by various drugs, toxins or disease conditions suggesting that gMEPPs may be a part of possible neurotrophic mechanism to preserve effective neuromuscular transmission when the normal function is compromised. [ABSTRACT FROM AUTHOR]

Voltage reference circuits are a basic building block in most integrated microsystems, covering a wide spectrum of applications. Hence, they constitute a subject of great interest for the entire microelectronics community. MOSFET-based solutions, in particular, have emerged as the implementation of choice for realizing voltage reference circuits, given the supply voltage scaling and the ever-lower power consumption specifications in various applications. For these reasons, this paper aims to review MOSFET-based voltage reference circuits, illustrating their principles of operation, as well as presenting a detailed overview of the state-of-the-art, in order to paint an accurate picture of the encountered challenges and proposed solutions found in the field in the last decade, thus providing a starting point for future research in the field. [ABSTRACT FROM AUTHOR]

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Summary: This paper presents a subthreshold CMOS voltage reference (VR) that utilizes self‐biased circuits. This voltage reference includes temperature compensation circuits to expand its operating temperature range and reduce its temperature coefficient. The proposed CMOS voltage reference is designed using a standard 0.18‐μm CMOS process and has a small area of only 0.005 mm2. Post‐layout simulation results demonstrate that the power consumption of the circuit at room temperature (25°C) is only 1.65 nW at a power supply voltage of 1 V. In this case, the voltage reference output is 316.56 mV, with an average temperature coefficient (TC) of 11.14 ppm/°C in a wide temperature range from −40°C to 140°C. Furthermore, the line sensitivity (LS) of the circuit is 0.024%/V, and the power supply rejection ratio (PSRR) of the circuit is −86.5 dB at 10 Hz. In summary, the subthreshold CMOS voltage reference structure proposed in this paper demonstrates excellent performance characteristics, such as low power consumption, a small area, and high‐temperature stability. These features make it a promising candidate for voltage reference for low‐power applications with significant changes in environmental temperature. [ABSTRACT FROM AUTHOR]

Copyright of Electronic Components & Materials is the property of Electronic Components & Materials and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

Summary: Fluorescent optical fiber temperature sensors require accurate online temperature monitoring in hazardous environments with strong electromagnetic fields, high voltages, flammability, or explosiveness. This imposes stringent requirements on the temperature coefficient stability of the bandgap reference (BGR) circuit. To address these challenges, this paper proposes a high‐order curvature compensation bandgap reference (HCC_BGR) circuit fabricated using a 0.18‐μm bipolar‐CMOS‐DMOS (BCD) process. A traditional first‐order bandgap reference (TRA_BGR) circuit is also fabricated for comparison. Experimental results demonstrate that the proposed HCC_BGR circuit generates a stable 1.22‐V reference voltage with a low‐temperature coefficient of 5.56 ppm/°C from −20°C to 85°C. Compared to the TRA_BGR circuit, the HCC_BGR reduces the temperature coefficient by 3.07 times. Furthermore, the low‐dropout regulator (LDO) using the proposed HCC_BGR exhibits excellent line sensitivity of 1.52%/V from 3.4 to 5 V. [ABSTRACT FROM AUTHOR]

Summary: A current‐mode (CM) bandgap voltage reference (BGR) with second‐order curvature compensation is presented in this paper. The proposed CM BGR offers a simple compensation structure that requires only six additional transistors compared with traditional BGR designs, making it an attractive solution for low temperature coefficient (TC) voltage references. Proportional to absolute temperature (PTAT) current digital‐to‐analog converters (DACs) are used to suppress the effect of process variation and device mismatch on TC. The compensation signal is generated using the voltage difference of two bipolar junction transistor (BJT) emitter–bases whose currents are the sum and difference of the PTAT current and the zero to absolute temperature (ZTAT) current, respectively. The proposed CM BGR is designed with 0.18‐μm BIPOLAR CMOS DMOS process. A TC is 2.41 ppm/°C over a wide temperature range of −40°C to 150°C. The linear sensitivity of the supply voltage from 1.2 to 2 V is 0.027%/V. With an active area of 0.0721 mm2, it consumes 68 μA at room temperature. The integrated output noise from 0.1 to 10 Hz is 21.9 μV. [ABSTRACT FROM AUTHOR]

With the continuous advancement of electronic technology, the application of high-voltage integrated circuits is becoming increasingly prevalent in fields such as power systems, medical devices, and industrial automation. The reference circuit within high-voltage integrated circuits must not only exhibit insensitivity to temperature variations but also maintain stability across a broad voltage supply. This paper presents a bandgap reference (BGR) source capable of operating over a wide input range. This BGR employs a high-order curvature compensation method to eliminate nonlinear voltage terms, resulting in minimal temperature drift. The circuit achieves an impressive temperature coefficient (TC) of 0.88 ppm/°C over a temperature range from −40 °C to 130 °C. To ensure stable operation within a 4–40 V range, the design incorporates a pre-regulation circuit that stabilizes the supply voltage of the BGR core at a fixed value, thereby enhancing the ability to withstand variations in power supply voltage. [ABSTRACT FROM AUTHOR]

This work presents a sub-nanowatt voltage reference (VR) achieving a high-power supply ripple rejection (PSRR). It utilizes a self-current biasing circuit to reduce the voltage dependency of the output voltage (VREF) to the power supply variations. For low-power operation, all transistors operate in the subthreshold region. The design's performance is verified through post-layout and Monte Carlo simulations in a standard 180 nm CMOS process. Results show that the proposed bandgap achieves an output voltage of 0.150 V with a PSRR of -81.5 dB at Vdd = 1V. Notably, it eliminates the need for an additional startup circuit and consumes only 0.72 nW at T = 27°C with Vdd = 0.5V. The proposed voltage reference exhibits a temperature coefficient (TC) of approximately 18 ppm/°C over a temperature range of -20°C to 130°C while without using a trimming circuit a reasonable (σVREF/μVREF) = 2.3% is obtained. This design's average line sensitivity (LS) is 0.072%/V (Vdd = 0.5V to 1.8V). However, the PSRR and LS values are temperature-dependent. At the high temperature of 130°C (worst-case), the PSRR and LS degrade to approximately -80.45 dB and 0.084 %/V, respectively. The output noise at the frequency of 1 KHz is obtained as 167.34 nV/√ Hz. The proposed VR occupies a small active area of 513.5 μm2. [ABSTRACT FROM AUTHOR]

Walleye (Sander vitreus) are a sexually dimorphic freshwater piscivore that have long been studied using bioenergetics modeling, yet robust estimates of metabolic rates for use in those models have been lacking. Therefore, we quantified the effects of body mass, water temperature, and sex, on standard metabolic rate (SMR). We estimated SMR across temperatures ranging 0.5–24 °C using intermittent-flow respirometry for male (n = 54) and female (n = 53) walleye raised in hatchery conditions. We found a significant interaction between sex and temperature, whereby males had lower SMR below 16 °C, but increased such that SMR was ∼16% higher than females at 22 °C. The mass-scaling coefficient, b, was similar for both sexes at a value around 1. These estimates are the first to be generated using respirometry for adult walleye and differ slightly from those being used by previous bioenergetics models, which may have underestimated the energetic costs of SMR, and did not include sex-specific estimates for metabolism. [ABSTRACT FROM AUTHOR]

The photocurrent across crystalline GaAs p-n junction induced by Nd:YAG laser radiation was investigated experimentally. It is established that the displacement current is dominant at reverse and low forward bias voltages in the case of pulsed excitation. This indicates that hot carriers do not have enough energy to overcome the p-n junction until the forward bias significantly reduces the potential barrier. At a sufficiently high forward bias, the photocurrent is determined by the diffusion of hot carriers across the p-n junction. The current–voltage (I-V) characteristics measured at different crystal lattice temperatures show that the heating of carriers by laser radiation increases with a drop in crystal lattice temperature. This study proposes a novel model for evaluating carrier temperature based on the temperature coefficient of the I-V characteristic. It is demonstrated that the heating of carriers by light diminishes the conversion efficiency of a solar cell, not only through thermalisation but also because of the conflicting interactions between the hot carrier and conventional photocurrents, which exhibit opposite polarities. These findings contribute to an understanding of hot carrier phenomena in photovoltaic devices and may prompt a revision of the intrinsic losses in solar cells. [ABSTRACT FROM AUTHOR]

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In this work, we demonstrate the preparation of easy-to-fabricate nanogranular strontium ferromolybdate/strontium molybdate core-shell ceramics and examine their properties, including tunnel magnetoresistance, magnetic field sensitivity, and temperature coefficient of the tunnel magnetoresistance. The tunnel magnetoresistance of nanogranular strontium ferromolybdate/strontium molybdate core-shell ceramics was modeled, yielding values suitable for magnetoresistive sensor applications. Such structures possess a narrow peak of magnetic flux sensibility located at about 80 mT. For magnetic flux measurement, single-domain granules with superparamagnetic behavior should be applied. The predicted TMR magnetic flux sensitivities for granules with superparamagnetic behavior amount to about 7.7% T−1 and 1.5% T−1 for granule sizes of 3 nm and 5 nm, respectively. A drawback of the tunnel magnetoresistance of such nanogranular core-shell ceramics is the unacceptably large value of the temperature coefficient. Acceptable values, lower than 2% K−1, are obtained only at low temperatures (less than 100 K) or large magnetic flux densities (exceeding 6 T). Therefore, a Wheatstone bridge configuration should be adopted for magnetoresistive sensor design to compensate for the effect of temperature. [ABSTRACT FROM AUTHOR]

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In this study, we used solid-state synthesis to prepare Ba[(ZnxCo1−x)1/3(Nb0.5Ta0.5)2/3]O3 microwave ceramics for mobile communications. Compared with Ba[Zn1/3(Nb0.5Ta0.5)2/3]O3, in the prepared materials, Co2+ substitution with Zn2+ improved the Q × f value and enabled densification and sintering at a lower temperature. We used X-ray diffraction (XRD) and scanning electron microscopy (SEM) to analyze the obtained microstructure. Ba[(ZnxCo1−x)1/3(Nb0.5Ta0.5)2/3]O3 was found to have a 1:2 ordered hexagonal structure, and its Q × f value increased with the increase in sintering temperature. In this work, excellent microwave dielectric properties—τf = −0.7 ppm/°C, εr = 34.5, and Q × f = 110,000 GHz—were obtained by sintering Ba[(Zn0.3Co0.7)1/3(Nb0.5Ta0.5)2/3]O3 at 1400 °C for 5 h. [ABSTRACT FROM AUTHOR]

Trichogramma chilonis (Ishii) is an important biocontrol agent that is widely used around the world to control numerous lepidopteran pests. The overuse of pesticides in agricultural systems causes lethal and sublethal effects on biocontrol agents. In ectothermic organisms, temperature influences the toxicity of insecticides. In the context of global warming, it is crucial to assess the effects of pesticides on beneficial arthropods under temperature stresses. The toxicity of bifenthrin, carbosulfan, chlorantraniliprole, dimethoate, fipronil, flubendiamide, imidacloprid, lambda-cyhalothrin and lufenuron was studied on T. chilonis at 18, 25 and 32 °C constant temperatures. The temperature coefficient was calculated as the ratio of higher LC50 values to lower LC50 values of an insecticide at different temperatures. The temperature coefficient of imidacloprid, bifenthrin and lambda-cyhalothrin was negative at 25 °C when compared to 18 °C and became positive at 32 °C, while dimethoate and lufenuron had an opposite trend. For carbosulfan and fipronil, the temperature coefficient was positive and for chlorantraniliprole and flubendiamide the coefficient was negative at all tested temperatures. Insecticides having a negative temperature coefficient become less toxic at higher temperatures; this might help reduce non-target insecticide risk to T. chilonis. The risk quotient (RQ) estimated as the ratio of field doses to the LC50 of beneficial organisms indicated that chlorantraniliprole at 25 °C and 32 °C and flubendiamide at 32 °C are harmless to T. chilonis and can be used a component of the integrated pest management (IPM) programs while the other tested insecticides should be avoided. This research can help develop successful pest management systems by reducing the adverse effects of insecticides on non-target species. [ABSTRACT FROM AUTHOR]

Purpose: Reference voltage or current generators are an important requirement for an analog or digital circuit design. Bandgap reference circuits (BGR) are most common way of generating the reference voltage. This paper aims to provide a detailed insight of design of a folded cascode operational amplifier (FC op amp) and a BGR circuit. The complete study flow from design to layout of the circuits on 180 nm semiconductor laboratory (SCL) process leading to bonding diagram for possible tape-out is discussed. This study work has been supported by MeitY, Govt. of India, through Special Manpower Development Project Chip to System Design. Design/methodology/approach: This paper provides a detailed insight in design of a FC op amp and a BGR circuit. The complete study flow from design to layout of the two circuits on 180 nm SCL process leading to bonding diagram for possible tape-out is discussed. Section 2 shows the design of FC op amp, beta-multiplier circuit and their simulation results. Section 3 describes the comparison of design of conventional BGR and the proposed BGR with other state-of-art BGR circuits. Section 4 gives the comparison of their performance. The conclusion is given in Section 5. Findings: The post-layout simulation of FC op amp show an open-loop gain of 64.5 dB, 3-dB frequency of 5.5 KHz, unity-gain bandwidth of 8.7 MHz, slew rate of 8.4 V/µs, CMRR of 111 dB and power of 25.5µW. Among the two BGR designs, the conventional BGR generated 693 mV of reference voltage with a temperature coefficient of 16 ppm/°C the other BGR, with curvature correction generated 1.3 V of reference voltage with a temperate coefficient of 6.3 ppm/°C , both results in temperature ranging from −40°C to 125°C. The chip layout of the circuits designed on 180 nm SCL process ensures design rule check (DRC), Antenna and layout versus schematic (LVS) clean with metal fill. Research limitations/implications: Slew rate, stability analysis, power are important parameters which should be taken care while designing an op amp for a BGR. Direct current gain should be kept higher to reduce offset errors. Input common mode range is decided by the operating temperature range. A higher power supply rejection ratio will reduce BGR sensitivity to supply voltage variations. Input offset should be kept low to reduce BGR error in reference voltage. However, this paper emphasis on the flow from schematic to layout using simulation tools. As part of the study, the bonding diagram for tape-out of BGR and FC design in the given SCL frame size with seal ring is also explored, for possible tape-out. Practical implications: Reference voltage or current generators are an important requirement for an analog or digital circuit design. BGR are most common way of generating the reference voltage. This paper provides a detailed insight in design of a FC op amp and a BGR circuit. The complete study flow from design to layout of the circuits on 180 nm SCL process leading to bonding diagram for possible tape-out is discussed. The chip layout of the circuits was designed on 180 nm SCL process ensuring DRC, antenna and LVS clean with metal fill using Cadence virtuoso and Mentor Graphics Calibre simulation tools. Social implications: BGR are most common way of generating the reference voltage. This paper gives a detailed insight of a BGR design using a folded-cascode operational amplifier. The FC op amp is biased using a beta multiplier circuit and high-swing cascode current mirror circuit. The paper discuss FC circuit design flow from schematic to layout. Originality/value: FC op amp is biased using a beta multiplier circuit and high-swing cascode current mirror. The paper discusses FC design flow from schematic to layout. The circuits were designed on 180 nm SCL technology with 1.8 V of power supply. The post-layout simulation show an open-loop gain of 64.5 dB, 3 dB frequency of 5.5 KHz, unity-gain bandwidth of 8.7 MHz, slew rate of 8.4 V/µs, CMRR of 111 dB and power of 25.5 µW. BGR were designed using FC op amp. The proposed BGR generated 1.3 V of reference voltage with a temperature coefficient of 6.3 ppm/°C in the range from −40°C to 125°C in schematic simulation. [ABSTRACT FROM AUTHOR]

This paper presents a resistor-less high-order curvature compensation bandgap voltage reference. A high-order curvature compensation is based on generating successive VGS voltages with different temperature characteristics, which are used to cancel thermal nonlinearity the first- and higher-order terms of the transistor voltage VEB. At the same time, a piecewise-linear curvature compensation circuit is used to broaden the temperature range of the whole circuit and achieve low-temperature coefficient. The proposed bandgap reference was designed using standard CSMC 0.18-μm CMOS technology. Simulation results indicate that the proposed bandgap reference achieves the best temperature coefficient of 2.37 ppm/°C from − 40 to 125 °C with a supply voltage of 5 V. The BGR output is about 1.1881 V and a − 60.7-dB PSRR at 10 kHz while only consuming 200 μW. [ABSTRACT FROM AUTHOR]

In the analog and mixed-signal integrated circuits, voltage references that are independent of various factors such as temperature drift, noise, supply voltage, etc., and efficient in terms of power as well as area, are highly in demand to improve the efficiency of the overall circuits. Voltage references are one of those circuits that have applications in both high-power systems and low-power system-on-chip (SoC) designs for wireless connectivity like the internet of the things (IoT) or the internet of the medical things (IoMT). They are responsible for providing a stable bias or reference voltage. Thus, voltage reference influences directly or indirectly the performance of these systems. A comparative study between the techniques used in bandgap voltage references and CMOS voltage references, in terms of performance parameters such as line sensitivity, output noise, PSRR, temperature coefficient, etc., is presented in this paper so that we can choose the voltage references as per the applications and environment. [ABSTRACT FROM AUTHOR]

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Automotive drive shaft is an indispensable key component of the transmission system, and the use of composite drive shafts has shown great promise. The epoxy matrix of the shaft is susceptible to the effects of temperature in comparison to carbon fiber. To investigate the influence of the environmental temperature on the fatigue life of a carbon fiber‐reinforced plastic drive shaft, a temperature‐based property curve and performance fraction model for the shaft are established. The temperature coefficient is calculated and introduced by combining the collected temperature data with the property fraction function. A generalized S‐N surface of the composite drive shaft is proposed based on experimental data. The fatigue life under collected and processed random loads of the carbon fiber‐reinforced plastic drive shaft is predicted by modified Miner's law. The effect of mean, amplitude of load and ambient temperature on fatigue life are taken into account. Highlights: Drive shaft load spectrum was acquired and preprocessed.Model of the carbon fiber‐reinforced plastic (CFRP) drive shaft was built for torsion strength with temperature.The temperature coefficient was calculated via temperature distribution and the model.Fatigue life of CFRP drive shaft was predicted by combining improved S‐N surfaces. [ABSTRACT FROM AUTHOR]

Solar Photovoltaic (PV) panels are extensively employed for the purpose of converting renewable energy, namely solar energy, into electrical energy. A significant portion of the solar radiation collected by Photovoltaic (PV) panels is transformed into thermal energy, resulting in the heating of PV cells and a consequent reduction in PV efficiency. The increase in the temperature of Photovoltaic (PV) panels leads to a decrease in their conversion efficiency. The data indicate that an increase of one degree Celsius in PV temperature can lead to a reduction in efficiency of up to 0.65%. This phenomenon has garnered significant scholarly interest in the realm of reducing and managing Photovoltaic (PV) temperature. One of the ways that has been explored is the use of Phase Change Material (PCM), which has the ability to effectively regulate the temperature of Photovoltaic (PV) systems due to its latent heat storing capabilities. Additionally, integrating Phase Change Material (PCM) in Photovoltaic (PV) systems not only helps in temperature regulation but also contributes to extending the lifespan of PV panels by mitigating thermal stress. As the demand for sustainable energy solutions continues to grow, optimizing the efficiency and durability of solar technologies remains a crucial focus for researchers and industry professionals alike. [ABSTRACT FROM AUTHOR]

Background: Spodoptera littoralis Boisad. (Lepidoptera: Noctuidae) is an important pest causing significant losses to agricultural crops worldwide. Management practices for this insect pest rely on insecticides applications throughout the entire season over wide ranging temperature. However, studies involving the development of resistance in S. littoralis against these insecticides at different temperatures are limited. Methods: Using leaf-dipping bioassay technique, the effect of temperature (range, 15–30 °C) on the toxicity of spinosad, lambda-cyhalothrin and methomyl, and resistance development was evaluated in larvae S. littoralis. Results: Spinosad, lambda-cyhalothrin and methomyl exhibited increased toxicity with increasing temperature from 15 to 30 °C. The results indicated a successive decrease in insecticide resistance at the temperatures of 15, 20, 25 and 30 °C from 1st to 12th generations of S. littoralis to spinosad, lambda-cyhalothrin and methomyl. Conclusions: This study suggests that spinosad, lambda-cyhalothrin, and methomyl can be included in the management of S. littoralis. Highlights: Toxicity due to lambda-cyhalothrin, methomyl and spinosad exposure increases with increasing temperature. Temperature influences the resistance of S. littoralis to lambda-cyhalothrin, methomyl and spinosad. Temperature should be integrated into the assessment of both toxicity and insecticide resistance. [ABSTRACT FROM AUTHOR]

The Fluoride salt–cooled High-temperature Reactor (FHR) is a Generation IV reactor concept that can operate under near atmospheric pressure circumstances and further enhance inherent safety. In this study, an FHR core design with 165 MW of thermal output [MW(thermal)] is proposed. The reactor core employs tristructural-isotropic (TRISO) particle fuel within prismatic graphite blocks as the basic fuel form, FLiBe [lithium-beryllium fluoride (2 7LiF-BeF2)] as the primary coolant, and a three-batch fuel cycle scheme. Sensitivity analyses on various parameters were performed to optimize the cycle length and neutronic parameters. The fuel cycle of this core design was evaluated in detail from four aspects: cycle length, power peaking factor (PPF), discharge burnup, and temperature coefficient. It was found that a larger fuel channel pitch would have a relatively harder neutron spectrum and yield a relatively longer cycle length, lower PPF, and better fuel temperature coefficient and moderator temperature coefficient (MTC). In addition, burnable poison (BP) (Er2O3) can effectively reduce PPF, hold down the multiplication factor, and more importantly it can improve the MTC. The preliminary design of control blades is also presented in this paper. Furthermore, on the basis of the proposed 165-MW(thermal) core, we propose a novel core design that incorporates "fuel inside radial moderator (FIRM)" assemblies, movable moderator, and movable BP. This new design can extend the fuel cycle length by approximately 45 days for an 18-month fuel cycle. In addition, improvements were also found in PPF, discharge burnup, and temperature coefficients. [ABSTRACT FROM AUTHOR]

Recently, the significant improvements in the surface and contact passivation of silicon (Si) solar cells as well as their bulk quality have shifted their operating point to higher injections. Hence, they are less dependent on wafer doping. This shift opens an opportunity of using high‐resistivity wafers for practical photovoltaic applications, introducing a promising approach to push the cell efficiency towards the intrinsic limit and to improve the module reliability by increasing the cell breakdown voltage. Therefore, insights into the performance of Si solar cells using high‐resistivity wafers at various operating temperatures are of significant interest. In this study, we investigate the temperature‐ and illumination‐dependent performance of Si heterojunction (SHJ) solar cells using a wide range of wafer resistivities (between 3 and 1000 Ω⋅cm). Although a reduction in the passivation quality of the passivating contacts is observed at elevated temperature, the impact on the temperature coefficient of the open‐circuit voltage (TCVoc)—the dominant contributor to the temperature coefficient (TC) of the cell efficiency—is very limited. Their TCVoc are still dominated by the temperature dependence of the effective intrinsic carrier concentration. Furthermore, we also find that the investigated cells are more sensitive to temperature variation at lower illumination intensities. It is noteworthy that the efficiency of the cells fabricated using high‐resistivity wafers is comparable to that of the reference cells at any given temperature, highlighting the potential of using high‐resistivity wafers for solar cells. [ABSTRACT FROM AUTHOR]

ISFH is following a distinct cell development roadmap, which comprises—as a short‐term concept—the combination of an n‐type doped electron‐collecting poly‐Si on oxide (POLO) junction with an Al‐alloyed p+ junction for hole collection. This combination can be integrated either in front‐ and back‐contacted back junction cells (POLO‐BJ) or in interdigitated back‐contacted cells (POLO‐IBC). Here, we present recent progress with these two cell concepts. We report on a certified M2‐sized 22.9% efficient POLO‐BJ cell with a temperature coefficient TCη of only −(0.3 ± 0.02) %rel/K and a certified 23.7% (4 cm2 d.a.) efficient POLO‐IBC cell. We discuss various specific conceptual aspects of this technology and present a simulation‐based sensitivity analysis for quantities related to the quality of the hole‐collecting alloyed Al‐p+ junction which are subject to continuous improvement and thus hard to predict exactly. We report that the measured pseudo fill factor values decrease more due to metallization than would be expected from recombination in the metallized regions with an ideality factor of one only. The gap to pseudo fill factor values that are theoretically achievable at the respective open‐circuit voltages is 1.1%abs (Ga‐doped wafer) for POLO‐IBC and 1.4%abs (B‐doped wafer) to 2%abs (Ga‐doped wafer) for POLO‐BJ. With an embedded blocking layer for Ag crystallites in the poly‐Si, we present a concept to reduce this gap. [ABSTRACT FROM AUTHOR]

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This paper presents a sub-microwatt sub-bandgap voltage and current reference that can generate proportional-to-absolute-temperature (PTAT) and complementary-to-absolute-temperature (CTAT) currents concurrently. The voltage reference is derived from the process-insensitive silicon bandgap voltage of a bipolar junction transistor, whereas the current reference is made by combining PTAT and CTAT currents. Line regulation is improved by incorporating cascode devices without an operational amplifier (opamp). Fabricated in a standard 0.18-µm CMOS process, the proposed bandgap reference occupies an active area of 0.4 mm2. The current and voltage reference ( I REF and V REF ) are measured as 170 mV and 21 nA, respectively, while the start-up settling response is measured as 20 ms at room temperature. The average temperature coefficient of I REF and V REF is 79.8 ppm/°C and 87.93 ppm/°C across the temperature range from − 40 to 120 °C, respectively. The power consumption is 134 nW at the minimum supply voltage of 1.2 V. The power supply ripple rejection of V REF is measured as − 10 dB at 100 kHz without any filtering capacitor, when the 1.6 V input line voltage is distorted by a 300-mVp-p ripple. The measured line sensitivity of the voltage and current reference is 0.142%/V and 0.757%/V, respectively. [ABSTRACT FROM AUTHOR]

This paper presents an ultra-low-power voltage reference designed in 180 nm CMOS technology. To achieve near-zero line sensitivity, a two-transistor (2-T) voltage reference is biased with a current source to cancel the drain-induced barrier-lowering (DIBL) effect of the 2-T core, thus improving the line sensitivity. This compensation circuit achieves a Monte-Carlo-simulated line sensitivity of 0.035 %/V in a supply range of 0.6 to 1.8 V, while generating a reference voltage of 307.8 mV, with 21.4 pW power consumption. The simulated power supply rejection ratio (PSRR) is −54 dB at 100 Hz. It also achieves a temperature coefficient of 24.8 ppm/°C in a temperature range of −20 to 80 °C, with a projected area of 0.003 mm2. [ABSTRACT FROM AUTHOR]

As energy yields of photovoltaic modules are highly related to local climate and ambient conditions, it is necessary to assess the energy-yield performance of PV modules under various operating conditions. This work compares commercial crystalline silicon (c-Si) based PV modules (including mono c-Si Al BSF, mono c-Si PERC, multi-crystalline (mc-Si) Al BSF, and n-type c-Si solar cells) sampled from 27 PV module manufacturers located in the Asia-Pacific region between 2016 and 2022. Several test items were compared including: (i) light-induced degradation (LID), (ii) irradiance-temperature-efficiency (GTE) matrix, (iii) angular response and (iv) temperature coefficients, which are correspondingly performed according to IEC 61215-1, -1-1, -2 and IEC 61853-1, -2. The coefficient of variation (CoV) was calculated to express the module-to-module differences within similar technology types. Benefiting from the technological innovation of c-Si based PV modules, emerging PV modules feature better performance in some extreme ambient conditions, such as low irradiance, high ambient temperature, and high ratio of diffuse irradiance. The analysis of CoV indicates that the difference of irradiance-dependent and thermal behavior between modules within the same technology may exceed the differences between different technologies. Using synthetic hourly meteorological data of 5 sites from MeteoNorm in PVsyst, the annual specific yield of four technology groups of PV modules were simulated and compared. Overall, it is shown that the maximum differences as large as 7.34% in terms of PV module's specific yield are expected within same PV technology, which exceeds the maximum difference of 2.16% obtained for specific yields of different PV technologies. [ABSTRACT FROM AUTHOR]

A new precision-aware subthreshold-based MOSFET voltage reference is presented in this paper. The circuit was implemented TSMC−40 nm process technology. It consumed 9.6 μ W at the supply voltage of 1.2 V. In this proposed work, by utilizing subthreshold-based MOSFET instead of bipolar junction transistor (BJT), relatively lower power consumption was obtained in the design while offering comparable precision to that offered by its BJT counterpart. Through the proposed second-order compensation, it achieved the temperature coefficient (T.C.) of 3.0 ppm/ °C in the TT corner case and a 200-sample Monte-Carlo T.C. of 12.51 ppm/ °C from −40 °C to 90 °C. This shows robust temperature insensitivity. The process sensitivity of V r e f without and with trimming was 2.85% and 0.75%, respectively. The power supply rejection (PSR) was 71.65 dB at 100 Hz and 52.54 dB at 10 MHz. The Figure-of-Merit (FOM) for the total variation in output voltage was comparable with representative BJT circuits and better than subthreshold-based MOSFET circuits. Due to low T.C., low process sensitivity, and simplicity of the circuit architecture, the proposed work will be useful for sensor circuits with stringent requirements or other analog circuits that require high precision applications. [ABSTRACT FROM AUTHOR]

The operating temperature has a critical impact on the electrical performance of solar cells. It has been shown that the temperature coefficient is not uniform across devices and often varies between different regions due to the inhomogeneous distributions of defects. In this study, temperature‐dependent photoluminescence imaging measurements are used to assess the influence of different processes such as gettering, firing and advanced hydrogenation on the temperature‐dependent electrical performance of cast‐mono silicon wafers. It is found that the height of the wafer within the ingot impacts the response of the temperature coefficient to different fabrication processes. Advanced hydrogenation is found to reduce the temperature sensitivity, more than expected solely from the improvement in implied open‐circuit voltage. Crystallographic defects are found to be the least temperature sensitive regions, indicating that their detrimental impact is reduced at higher operating temperatures. The interesting low temperature sensitivity in the defective regions is further investigated using hyperspectral photoluminescence imaging measurements and atom probe tomography. It is suggested that the reduced sensitivity is due to impurities decorating crystallographic defects. [ABSTRACT FROM AUTHOR]

Micro-fabricated pressure sensors are presently one of the most used micro-electromechanical system devices in the industry. Notably, they have gained popularity in medical, automotive and aeronautical applications. In the present work, a sensor operating in the low-pressure range with piezoresistive sensing and having a bossed-diaphragm structure has been designed. The structure has been characterized through numerical simulations using a custom-made software featuring geometrically nonlinear 2D elements. This simulation tool enables fast iterative design along with capturing key features related to the drift in sensitivity with respect to doping concentration and temperature. The simulation results show that the designed sensor has a full scale output of 2.2 µV/V/Pa, a linear error of 0.05% over its operating range of 5 kPa and a thermal sensitivity shift of − 0.1%/oC. [ABSTRACT FROM AUTHOR]

This work presents an examination and unification of fragmented data on spin polarization in half-metallic, ferrimagnetic oxides. It also includes well understood ferromagnetic metals for comparison. The temperature and disorder dependencies of the spin polarization are evaluated. Both the temperature dependence of the tunnel magnetoresistance and, for the very first time, its temperature coefficient are calculated based on the simplified Julliére model. The tunnel magnetoresistance in the magnetic tunnel junctions deteriorates due to the temperature dependence of the spin polarization the lower the Curie temperature is. As a result, magnetic tunnel junctions—consisting of ferromagnetic oxides with a Curie temperature not far above room temperature—are not promising for room temperature applications. Additionally, ferrimagnetic oxides possessing a Curie temperature below 650 K are not suitable for room temperature applications because of an unacceptable temperature coefficient exceeding −2%. [ABSTRACT FROM AUTHOR]

This study presents a comparative analysis of the performance of a p-type (Pentacene) organic thin-film transistor (OTFT) for temperature sensing using organic and inorganic dielectrics (low-k dielectric and high-k dielectrics) such as PVA, SiO2, and HfO2 in the saturation region of device operation. The device and the channel parameters such as mobility, threshold voltage, etc. are extracted using the conventional extraction approach at a temperature range of 293– 363 K. The simulation findings indicate how these characteristics change as a function of temperature, and hence could be employed in sensing applications. It is realized that the optimum performance is shown by the high-k dielectric (HfO2), where the mobility is $\sim \,\,4.25\times 10^{-3}$ cm2 /Vs, a low subthreshold slope of 59.6 mV/decade, a high ON/OFF ratio close to $9.4\times 10^{16}$ , low contact resistance of 1.1 $\text{G}{\Omega }$ and threshold voltage ($\text{V}_{{\mathrm {TH}}}$) decreases linearly (positive shift) with increasing temperature. The low value of $\text{V}_{{\mathrm {TH}}}$ ensures low operating voltage thus enabling the realization of a low power temperature sensor. It is shown that there is a 104 percentage change in the ON/OFF ratio which leads to the conclusion that the ON/OFF ratio can be a deciding factor in determining the optimum device parameter for sensing applications. Apart from this, the threshold voltage and the subthreshold slope (SS) are also equally important that affect the performance of the sensors. Notably, the temperature coefficient which denotes the change in device parameter per degree change in temperature is calculated for a more comprehensive study. It is observed that the temperature coefficient for drain current is $11.8\times 10^{-3}$ ng a large change in electrical characteristics when the temperature is altered by 1 kelvin. [ABSTRACT FROM AUTHOR]

The Standard Test Condition (STC) correction procedures are algorithms used for transforming the Photovoltaic (PV) module current‐voltage (I‐V) data measured at arbitrary conditions back to STC. The PV module Temperature Coefficients are used as inputs by various STC correction procedures and can significantly influence their accuracy. This paper presents the sensitivity analysis of accuracy of six STC correction procedures (IEC 60891‐Procedure 1, Procedure 2, Modified IEC 60891‐Procedure 1, IEC 60891‐Procedure 4 (Voltage Dependent Temperature Coefficient (VDTC) Procedure), Anderson Procedure, and Standard Irradiance and Desired Temperature Procedure) to the errors in the temperature coefficients of Pmax, Voc, and Isc. Experimentally measured as well as simulated I‐V curves of six multi c‐Si PV modules were used in this study. IEC 60891‐Procedure 4 (Voltage Dependent Temperature Coefficient) that uses a Voltage Dependent Temperature Coefficient which can be calculated using a single measured I‐V curve was found to be most robust against errors in the temperature coefficients. [ABSTRACT FROM AUTHOR]

In this paper, injection‐locked coupled ring oscillators (ROs) are studied regarding their capabilities for process, voltage, and temperature (PVT) compensated reference clock generation. A PVT resilient RO is implemented by means of injection‐locked coupled ROs where the injection locking mechanism is realized by employing adjustable coupling factors. It is shown that the oscillation frequency can be highly compensated for temperature‐related variations through the coupling factors. In addition, it is possible to compensate the center oscillation frequency for process‐induced variations and supply voltage fluctuations. The proposed technique is fully open loop without any frequency tracking loop and can be easily adopted by other architectures of oscillators such as RC and LC counterparts. A 2.4 GHz reference clock generator is implemented in a 0.18 μm standard CMOS process. While the temperature coefficient (TC) of the free‐running ROs is about 640 ppm/°C, the coupled structure offers a TC of 80 ppm/°C. Furthermore, the phase‐noise of the coupled structure is about 4 dB lower compared with the free‐running ROs. The proposed RO consumes about 2.8 mW and occupies a silicon area of 0.09 mm2. [ABSTRACT FROM AUTHOR]

The temperature coefficient (TC) is an essential figure of merit to accurately evaluate solar cell performance at various operating temperatures and hence enabling the comparison between different cell technologies. Recently, solar cells that use passivating contacts based on transition metal oxide (TMO) layers have attracted much attention due to their excellent performance. Therefore, knowledge of their TCs and insights into their performance at various operating temperatures are of significant interest. In this study, we investigate the temperature‐dependent performance of solar cells with TMO‐based passivating contacts at various illumination intensities. We then compare their performance to that of standard silicon heterojunction (SHJ) solar cells. The efficiency TC (TCη) of solar cells that use passivating contacts based on molybdenum oxide (MoOx) and titanium oxide (TiOx) films is found to be almost identical. Both outperform the TCη of the standard SHJ cells and are greatly superior to those of cell structures without passivating contacts. The superior TCη of the MoOx‐based cells is mainly due to their favourable TCs of the short‐circuit current density (TCJsc) and fill factor (TCFF), whereas the superiority of TCη of the TiOx‐based cells is solely resulting from the superior TCFF. The favourable TCJsc of the MoOx‐based cells is explained by an enhanced spectral response at short wavelengths with increasing temperature, due to the improvement of the passivation quality of the MoOx‐based passivating contacts. The beneficial TCFF of both solar cells is partly resulting from the improvement of the contact resistivity of the TMO‐based passivating contacts which counterbalances some of the fill factor losses at elevated temperatures. Although an improvement of the passivation quality of the TMO‐based passivating contacts is observed at elevated temperature, it does not have a strong impact on the TC of the open‐circuit voltage of the investigated solar cells. Furthermore, we also found that the studied cells are less sensitive to temperature variation at higher illumination intensities. [ABSTRACT FROM AUTHOR]

This paper presents a novel sub-1-V CMOS voltage reference with high power supply rejection ratio (PSRR), low line sensitivity, and low supply voltage. CMOS voltage references available in the literature use a self-biased cascode branch consisting of two MOS transistors operating in the subthreshold region to generate the proportional-to-absolute-temperature (PTAT) voltage only, whereas extra circuitry is required to generate the complementary-to-absolute-temperature (CTAT) voltage for temperature compensation. But in the proposed sub-1-V CMOS voltage reference, both the PTAT and CTAT voltages are generated using a single self-biased cascode branch. Two operational amplifiers in negative feedback topology are used to convert the PTAT and CTAT voltages into PTAT and CTAT currents, respectively, which help to enhance the stability and PSRR of the proposed voltage reference. The proposed voltage reference has been designed and simulated in 180-nm standard CMOS technology using Cadence Virtuoso Analog Design Environment. The proposed voltage reference achieves an output reference voltage of 424.85 mV with a temperature coefficient of 29.5 ppm/∘C for the temperatures ranging from − 5 5 ∘ C to 125∘C at a supply voltage of 0.8 V. A line sensitivity of 0.0035%/V is achieved for the supply voltage varying from 0.8 V to 5 V at nominal temperature (27∘C). A PSRR of − 91.69 dB is observed for the frequencies ranging from 1 Hz to 10 kHz at nominal conditions without using any capacitive filter. Also, the output noises of the proposed design at nominal conditions for the frequencies of 1 Hz and 10 kHz are obtained as 2.37 μ V/ √ Hz and 45.26 nV/ √ Hz, respectively. [ABSTRACT FROM AUTHOR]

Avalanche photodiodes (APDs) made with the material AlGaAsSb (lattice-matched to InP) exhibit very low excess noise characteristics. We demonstrate a Separate Absorption and Multiplication APD (SAM-APD) incorporating a GaAs0.52Sb0.48 (GaAsSb) absorption region and an Al0.85Ga0.15As0.56Sb0.44 (AlGaAsSb) avalanche region. Our GaAsSb/AlGaAsSb SAM-APD exhibits a cut-off wavelength of 1.70 μm at room temperature and a responsivity of 0.39 A/W at 1.55 μm wavelength (with no antireflection coating). Temperature dependence of the breakdown voltage was obtained from avalanche gain data from multiple devices operated at 77 to 295 K. This produced a temperature coefficient of breakdown voltage of 4.31±0.33 mV/K, a factor of 10 and 5 smaller than values for comparable InP and InAlAs SAM-APDs. The very small temperature coefficient of this work is consistent with the extremely weak temperature dependence of avalanche breakdown previously observed in AlGaAsSb diodes. [ABSTRACT FROM AUTHOR]

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pH is a measure of the hydrogen ion activity in a solution, which is a function of temperature. Under normal seawater conditions, it is well constrained. Nowadays, with an increasing interest in complex environments (e.g., sea ice), a better understanding of the temperature change on pH under extreme conditions is needed. The objective of this paper was to investigate the temperature coefficient of the seawater pH (ΔpH/ΔT) over a wide range of temperature, pH, dissolved inorganic carbon (DIC) and salinity by a method of continuous pH measurement with the temperature change, and to verify the application of CO2SYS for pH conversion under extreme conditions (on the National Bureau of Standards (NBS) scale and the total proton scale). Both experimental results and CO2SYS calculations showed that ΔpH/ΔT was slightly affected by temperature over the range of 0°C to 40°C and by pH (at 25°C) from 7.8 to 8.5. However, when pH was out of this range, ΔpH/ΔT varied greatly with pH value. According to the experimental results, changes in DIC from 1 mmol/kg to 5 mmol/kg and salinity from 20 to 105 had no significant effect on ΔpH/ΔT. CO2SYS calculations showed a slight increase in ΔpH/ΔT with DIC on both the NBS scale and the total proton scale; and underestimated ΔpH/ΔT at high salinity (i.e., beyond the oceanographic range) on the NBS scale. Nevertheless, CO2SYS is still suitable for pH conversion even under extreme conditions by simply setting the input values of DIC and salinity in CO2SYS within the oceanographic range (e.g., DIC=2 mmol/kg and S=35). [ABSTRACT FROM AUTHOR]

In this work, the impact of different Cu(In1‐xGax)(Se1‐ySy)2 solar cell structures on the shift of the dominant recombination region at varying light intensities was investigated. A new parameter was proposed to account for the dominant recombination region relative to the minimum band gap location in a graded absorber. Additionally, the influence of shunt resistances on the dominant recombination location for different CIGSSe solar cell structures was modeled. Within the investigated illumination range, correlations between the dominant recombination location and solar cell parameters as well as their temperature dependence were discussed. [ABSTRACT FROM AUTHOR]

One effect of moisture ingress on solar panels is potential induced degradation (PID). Solar panels affected by PID experience large leakage currents between the solar cells and the module's frame, which leads to substantial power degradation. In the present work, the temperature coefficients of 3 old PV panels affected by PID were investigated. In the electroluminescence images, solar cells nearer to the edge of the modules appear darker due to ohmic shunting. IR thermal images acquired under clear sky outdoor conditions show that the majority of the warmer cells (hotspots) were located closer to the edge of the modules. The difference in cell temperature (∆T) due to PID effect ranges from 7 °C to 15 °C for the 3 field-aged modules. The average temperature coefficient of efficiency (βηm) was found to be −0.5%/°C. Also, it was observed that the temperature coefficients of open circuit voltage (βVoc = −0.4%/°C), maximum power point voltage (βVmpp = −0.5%/°C), and fill factor (βFF = −0.2%/°C), were the underlying factors for the degradation in the Pmax of the old solar panels affected by PID. This accounted for an average 1.2%/year overall degradation in the efficiency of these modules. Most notably, it was discovered that the PV modules affected by PID show negative temperature coefficients of maximum power point current (βJmpp) due to large leakage currents. This observed negative βJmpp we believe is characteristic of PV panels affected by PID. [ABSTRACT FROM AUTHOR]

We analyzed the relationship between forest productivity (joint effect of forest maturity and soil quality) and total soil respiration (µmol CO2 m−2 s−1) in semi-arid juniper woodlands (young woodlands growing in abandoned farmlands with deeper soils, and mature woodlands in lithic soils), and investigated the seasonal variation in soil CO2 efflux as a function of soil temperature and the soil water content. We measured the soil CO2 efflux from twelve cylinders in the soil over a three-year period using LI-6400 equipment. The results show that, in the more productive site (young woodland), soil CO2 efflux was higher due to greater respiration, mainly in the driest periods. Soil respiration followed a seasonal trend, being higher in spring and decreasing in cold periods. In both juniper woodlands and especially in the older forest, the CO2 efflux rates were low (<2.5 for Q10), typical of slow-growing species. Soil respiration was controlled by soil temperature without drought and in the temperate-warm season, whereas respiration showed sensitivity to soil water content in periods when edaphic humidity was low (but only in the more productive, young forest, which seemed to show better adaptation to drought), and under high soil moisture (soil water > 25%) for both woodlands, coinciding with warm temperatures in the spring. This period also corresponded to the highest CO2 efflux recorded in both woodlands. The accumulation of organic C seems to also be important to maintain elevated soil respiration in summer, especially in young woodlands. Thus, apart from microclimatic conditions, factors related to productivity regulate respiratory activity. [ABSTRACT FROM AUTHOR]

Interlayer coupling as a unique feature for two-dimensional (2D) materials may influence their thickness-dependent physical properties, especially the bandgap due to quantum confinement effect. Widely-studied 2D materials usually possess strong interlayer coupling such as most of transition metal dichalcogenides (TMDs), PtS2 and so on. However, 2D materials with weak interlayer coupling are rarely referred that mainly focus on ReS2, as well as its counterpart ReSe2. Here we report a new member of weak interlayer coupling 2D materials, germanium disulfide (GeS2). The interlayer interaction in GeS2 is investigated from theory to experiment. By density functional theory calculations, we find that this extraordinarily weak interlayer coupling in GeS2 originates from the weak hybridization of interlayer S atoms. Thickness-dependent Raman spectra of GeS2 flakes exhibit that the Raman peaks remain unchanged when increasing the thickness; and a small first-order temperature coefficient of −0.00857 cm−1·K−1 is obtained from the temperature-dependent Raman spectra. These experimental results further confirm the weak interlayer coupling in GeS2. [ABSTRACT FROM AUTHOR]

Spinel ferrites are attaining huge importance in the modern era, due to their incredible properties, which means they are widely used in various fields. Therefore, in this paper a cost-effective and environmentally friendly preparation of Mg0.25Ni0.25Cu0.5−xCoxFe1.97La0.03O4 (x = 0.0, 0.125, 0.25, 0.375, and 0.5) ferrites via the sol–gel auto-combustion method were carried out. How the structural and functional properties varied with the Cu to Co ratio was studied. It was found that the crystallite size (D) was reduced from 47.2 to 27.6 nm as the Co2+ increased from x = 0.0 to 0.5. While the two major absorption bands including the higher frequency band (υ1) and lower frequency band (υ2) lie in the range of 573.80–538.65 cm−1 and 470.37–405.65 cm−1 belong to the spinel matrix. Five active Raman modes were found in the range of wave number 200–800 cm−1 corresponds to the sublattices of the spinel structure. The optical bandgap increased from 0.85 eV to 1.33 eV for x = 0.0 to x = 0.25 and then observed optical band gap was 1.15 eV and 1.46 eV for x = 0.375 to x = 0.5. The resistivity (ρ) was minimum for Co2+ concentration x = 0.25 at low temperature, while at high temperature the resistivity (ρ) was maximum for Co2+ doping x = 0.25. The temperature coefficient of resistance percentage (TCR %) was −2.66%/K at 513 K for x = 0.25, as shown in the graphical abstract. At lower frequencies, the impedance was observed maximum for Co2+ doping x = 0.125 and minimum for x = 0.375. These findings indicate that the as-prepared ferrites are a potential candidate for optoelectrical and bolometric devices. Highlights: Mg0.25Ni0.25Cu0.5−xCoxFe1.97La0.03O4 synthesis via the sol-gel auto-combustion method. The crystallite size was decreased with Co2+ doping. At high temperatures, the resistivity (ρ) was maximum for Co2+ doping x = 0.25. At lower frequency, the impedance was maximum for Co2+ doping x = 0.125. The temperature coefficient of resistance percentage (TCR%) was −2.66%/K at 513 K for x = 0.25. [ABSTRACT FROM AUTHOR]