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THOMSON-CSF Semiconducteurs Specifiques (TCS) and the CEA-LETI have developed a 0.8 [[micro]meter] SOI bulk compatible process (HSOI4CB) for space and battle field applications. The main motivation for this process is to allow the transfer of already existing bulk circuits onto SOI with reduced redesign effort and performances degradation. In this paper, SOI process (HSOI4CB) and the 68020 transfer are summarized, including the most significant characteristics of the resulting product (68T020), in terms of Single Event Upset (SEU) and Single Event Latch-up (SEL). For the same revision version, the 68T020 comparisons with bulk or epitaxial 68020 processes are given.

This paper will present a set of techniques allowing to perform heavy ions testing on present 32-bits microprocessors. We study particularly how the program executed by the circuit during the irradiation can modify the calculated upset cross-section. The approach will be illustrated by experimental results obtained on both the Motorola 68020 microprocessor and its coprocessor 68882,by means of particle accelerators as well as a [Cf.sup.252] fission-decay source equipment.