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In this work, we present a low-power 2 nd order band-pass filter for neural recording applications. The central frequency of the passband is set to 375Hz and the quality factor to 5 to properly process the neural signals related to the onset of epileptic seizure, and to strongly attenuate all the out of band biological signals and electrical disturbances. The biquad filter is based on a fully differential Tow Thomas architecture in which high-valued resistors are implemented through switched high-resistivity polysilicon resistors. A supply voltage as low as 0.8V and MOS transistors operating in the sub-threshold region are exploited to achieve a power consumption as low as 170nW, when driving a 1pF load capacitance. The filter exhibits a tuning range of the resonance frequency from 200Hz to 400Hz, and an area footprint of only 0.021 mm 2 . Very low power consumption and area occupation are key specifications for integrated, multiple-sensors, neural recording systems., (© 2020 Published by Elsevier Ltd.)

In this paper we propose and analyze various approaches to organizing routing in a triple loop circulant topologies as applied to networks-on-chip: static routing based on universal graph search algorithms, such as Dijkstra's algorithm and a possible implementation using Table routing; algorithms created analytically based on an engineering approach with taking into account the structural features of triple loop circulant graphs (Advanced clockwise, Direction selection); an algorithm created on the basis of a mathematical analysis of graph structure and solving the problem of enumerating coefficients at generators (Coefficients finding algorithm). Efficiency, maximum graph paths, occupied memory resources, and calculation time of the algorithms developed are estimated. Comparison of various variants of the algorithms is made and recommendations on their application for the development of networks-on-chip with triple loop circulant topologies are given. It is shown that Advanced clockwise and Direction selection algorithms guarantee that the packet reaches the destination node, but often in more steps than the shortest path. Nevertheless, they themselves are simpler and require less hardware resources than other algorithms. In turn, Coefficients finding algorithm has great computational complexity, but is optimal and, in comparison with Dijkstra's algorithm, is much simpler for RTL implementation which reduces network-on-chip routers resources cost., (© 2020 The Author(s).)

Now a days Very-Large-Scale Integrated (VLSI) circuits are facing critical issues to satisfy the cooling demand because of shrinking the semiconductors. In this numerical work, the surface temperature of the chip, heat transfer rate, thermal resistance, power consumption and reliability are studied by using CuO/water nanofluids as coolant and compared the nanofluids results with the results of water. The CuO/water nanofluids at 0.25%, 0.5%, and 0.75% volume concentration are used for this investigation. The modelling, meshing and simulation are carried out by CATIAv5 and ANSYS Fluent v12 CFX software package. It is observed that the heat transfer rates of semiconductor using the coolant CuO/water nanofluid at 0.25%, 0.5%, and 0.75% volume concentrations are 25%, 43%, and 57% respectively higher than that of water. Found that the surface temperature of the semiconductor is lowered by 3%, 6%, and 8%, the thermal resistances decrease up to 6%, 10%, and 13%, and the Nusselt number increases by 25%, 43%, and 56%, when compared to water. It is also studied that the power consumption of the semiconductor reduces by 3%, 6%, and 8% at 0.25%, 0.5%, and 0.75% volume concentration respectively than water as coolant. It is also found that the failure rate of the semiconductor of using CuO/water nanofluids at 0.25%, 0.5%, and 0.75% volume concentration are 69%, 76%, and 84% respectively smaller than the water.