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Modeling and simulations have played a critical role in the progress of the microelectronics industry. With the scaling and advancements in the transistor architecture, it is necessary to incorporate higher-order effects to correctly model the behavior of the transistor. This increases the simulation time and computational load. In this work, we explore the use of deep neural networks to simulate the electrostatics of a double gate FET across a wide range of channel thicknesses.

This thesis focuses on the on-surface synthesis of 2D conjugated organometallic networks on partially iodine-passivated Au(111) surfaces (I-Au(111)). Utilizing I-Au(111) promoted the formation of highly regular 2D organogold networks as opposed to bare Au(111). Additionally, self-assembly of supramolecular monolayers at liquid-solid interfaces was explored on I-Au(111). As a result, I-Au(111) has proven to be a suitable alternative substrate with a significant influence on polymorphism and thermodynamic stability., Diese Dissertation befasst sich mit der Oberflächen-Synthese von konjugierten organometallischen 2D-Netzwerken auf teilweise Jod-passivierten Au(111)-Oberflächen (I-Au(111). Die Verwendung von I-Au(111) förderte die Bildung äußerst regelmäßiger 2D organogold Netzwerke im Gegensatz zu reinem Au(111). Darüber hinaus wurde die Selbst-Assemblierung von supramolekularen Monolagen an Flüssig-Fest-Grenzflächen auf I-Au(111) untersucht. Im Ergebnis hat sich I-Au(111) als geeignetes alternatives Substrat erwiesen, das einen erheblichen Einfluss auf den Polymorphismus und die thermodynamische Stabilität hat.

In this letter, we show that low-cost physical vapor deposition of Mg followed by a thermal diffusion annealing process increases the effective barrier height at the metal/Ga-polar GaN Schottky interface. Thus, for the first time, GaN Camel diodes with improved barrier height and turn-on voltage were realized compared to regular GaN Schottky barrier diodes. Temperature-dependent current-voltage characteristics indicated a near-homogeneous and near-ideal behavior of the GaN Camel diode. The analysis performed in this work is thought to be promising for improving the performance of future GaN-based unipolar diodes.

In this work, we propose lateral p–n junction self-powered ultraviolet photodiodes using lateral polarity structure GaN (LPS-GaN) films. The design of the proposed photodiode is inspired by the recent demonstrations of obtaining laterally varying doping profiles by controlling the incorporation of donor and acceptor impurities in LPS-GaN. The proposed photodiodes provide a larger area for light absorption near the surface, and at the same time provide a large photocurrent even at zero external bias voltage, thanks to the electric field distribution of the lateral p–n junction. Through technology computer-aided design simulations and semi-analytical calculations, we show that the proposed photodiodes outperform the traditionally popular metal–semiconductor–metal (MSM) GaN photodiodes. The results shown in this study hold promise for realizing solar-blind photodetectors using polar GaN and AlGaN films.

In this work, we propose lateral p–n junction self-powered ultraviolet photodiodes using lateral polarity structure GaN (LPS-GaN) films. The design of the proposed photodiode is inspired by the recent demonstrations of obtaining laterally varying doping profiles by controlling the incorporation of donor and acceptor impurities in LPS-GaN. The proposed photodiodes provide a larger area for light absorption near the surface, and at the same time provide a large photocurrent even at zero external bias voltage, thanks to the electric field distribution of the lateral p–n junction. Through technology computer-aided design simulations and semi-analytical calculations, we show that the proposed photodiodes outperform the traditionally popular metal–semiconductor–metal (MSM) GaN photodiodes. The results shown in this study hold promise for realizing solar-blind photodetectors using polar GaN and AlGaN films.

In this work, we propose lateral p–n junction self-powered ultraviolet photodiodes using lateral polarity structure GaN (LPS-GaN) films. The design of the proposed photodiode is inspired by the recent demonstrations of obtaining laterally varying doping profiles by controlling the incorporation of donor and acceptor impurities in LPS-GaN. The proposed photodiodes provide a larger area for light absorption near the surface, and at the same time provide a large photocurrent even at zero external bias voltage, thanks to the electric field distribution of the lateral p–n junction. Through technology computer-aided design simulations and semi-analytical calculations, we show that the proposed photodiodes outperform the traditionally popular metal–semiconductor–metal (MSM) GaN photodiodes. The results shown in this study hold promise for realizing solar-blind photodetectors using polar GaN and AlGaN films.

In this work, we propose lateral p–n junction self-powered ultraviolet photodiodes using lateral polarity structure GaN (LPS-GaN) films. The design of the proposed photodiode is inspired by the recent demonstrations of obtaining laterally varying doping profiles by controlling the incorporation of donor and acceptor impurities in LPS-GaN. The proposed photodiodes provide a larger area for light absorption near the surface, and at the same time provide a large photocurrent even at zero external bias voltage, thanks to the electric field distribution of the lateral p–n junction. Through technology computer-aided design simulations and semi-analytical calculations, we show that the proposed photodiodes outperform the traditionally popular metal–semiconductor–metal (MSM) GaN photodiodes. The results shown in this study hold promise for realizing solar-blind photodetectors using polar GaN and AlGaN films.

In 2014, the Government of India quintupled the scope of its National Solar Mission. With its revised target of 100 MW of solar capacity by 2022, this ambitious program did much more than catapult solar energy to the forefront of India’s development priorities. My dissertation, Shadows of Sunlight: Epistemic Experiments with Solar Energy in India, shows how the large scale rollout of solar transforms categories of knowledge formatted by fossil fuels, including “energy”, “rationality”, “the future”, and “the environment.” Chronicling the work of politicians, policymakers and activists, and drawing extensively from gray literature, the project engages debates in anthropology, science and technology studies, the sociology of knowledge, and political theory to chart the “worlding” of solar into a modern energy form. Chapter one shows how solar is often unthinkable without coal and oil—policymakers work with a fossil fuel-conception of energy to anchor their ideas about what energy is. In exploring how “thinking solar” is a fundamentally relational project, this chapter also works to demonstrate the stakes of the dissertation: the question of how to think about solar is not just a methodological one, but also, an epistemological one. Chapter two draws links between solar philanthrocapitalism and the Enlightenment politics of light itself, the chapter cautions against the regressive epistemics we might unintentionally reinforce by mobilizing light as a measure of rationality. It suggests, in its place, a politics that de-links the expectation of development from the commitment to improve energy access—“endarkenment”— as an alternative register for theorizing solar as an energy form. Chapter three illustrates how solar defies the easy assumption that it serves techno-deterministically environmental ends, juxtaposing the practice of Solar Thermal Enhanced Oil Recovery against India’s leveraging of solar in its diplomatic bid to claim greater “carbon space.” Chapter four tra

In 2014, the Government of India quintupled the scope of its National Solar Mission. With its revised target of 100 MW of solar capacity by 2022, this ambitious program did much more than catapult solar energy to the forefront of India’s development priorities. My dissertation, Shadows of Sunlight: Epistemic Experiments with Solar Energy in India, shows how the large scale rollout of solar transforms categories of knowledge formatted by fossil fuels, including “energy”, “rationality”, “the future”, and “the environment.” Chronicling the work of politicians, policymakers and activists, and drawing extensively from gray literature, the project engages debates in anthropology, science and technology studies, the sociology of knowledge, and political theory to chart the “worlding” of solar into a modern energy form. Chapter one shows how solar is often unthinkable without coal and oil—policymakers work with a fossil fuel-conception of energy to anchor their ideas about what energy is. In exploring how “thinking solar” is a fundamentally relational project, this chapter also works to demonstrate the stakes of the dissertation: the question of how to think about solar is not just a methodological one, but also, an epistemological one. Chapter two draws links between solar philanthrocapitalism and the Enlightenment politics of light itself, the chapter cautions against the regressive epistemics we might unintentionally reinforce by mobilizing light as a measure of rationality. It suggests, in its place, a politics that de-links the expectation of development from the commitment to improve energy access—“endarkenment”— as an alternative register for theorizing solar as an energy form. Chapter three illustrates how solar defies the easy assumption that it serves techno-deterministically environmental ends, juxtaposing the practice of Solar Thermal Enhanced Oil Recovery against India’s leveraging of solar in its diplomatic bid to claim greater “carbon space.” Chapter four tra

We have carried out a comprehensive study of the gate current (I-G) in advanced MOS architectures for different gate lengths and cross-section areas using an in-house simulation tool. We have considered only direct tunneling under the assumption that trap concentration and therefore the trap assisted current would be small in a matured technology. We have also studied the impact of the interfacial (IL) SiO2 layer on the gate current in the high-kappa gate stack. Our results suggest that IL leads to an increase in the gate current for equivalent EOT. They also highlight that reduction in the cross-section area leads to a significant increase in the I-G.

In this article, a 2-D TCAD simulation study on the forward and reverse characteristics of oxygen-terminated diamond (D:O) m-i-p+ Schottky barrier diode (SBD) is carried out considering the effects of Fermi level pinning due to surface states (SSs) and metal-induced gap states (MIGS). The device simulation considers drift-diffusion transport, SS charge neutrality level (CNL), MIGS through Fermi level pinning parameter (S), doping and temperature-dependent mobility model, incomplete ionization of dopants, and impact ionization models. The simulation validation is carried out for Al/Au Schottky metals at room temperature and at higher temperatures. A good comparison between the simulation and experiment is obtained around turn-on voltage (V T0? 1.0 V for Al and 2.0 V for Au Schottky contacts) and for anode voltage (VA) > VT 0. Through simulations, we estimated the type of SSs and their quantity, and the position of CNL (ECNL) within the diamond bandgap. The effect of ECNL position and pinning parameter on th...

We have carried out a comprehensive study of the gate current (I-G) in advanced MOS architectures for different gate lengths and cross-section areas using an in-house simulation tool. We have considered only direct tunneling under the assumption that trap concentration and therefore the trap assisted current would be small in a matured technology. We have also studied the impact of the interfacial (IL) SiO2 layer on the gate current in the high-kappa gate stack. Our results suggest that IL leads to an increase in the gate current for equivalent EOT. They also highlight that reduction in the cross-section area leads to a significant increase in the I-G.

In this article, a 2-D TCAD simulation study on the forward and reverse characteristics of oxygen-terminated diamond (D:O) m-i-p+ Schottky barrier diode (SBD) is carried out considering the effects of Fermi level pinning due to surface states (SSs) and metal-induced gap states (MIGS). The device simulation considers drift-diffusion transport, SS charge neutrality level (CNL), MIGS through Fermi level pinning parameter (S), doping and temperature-dependent mobility model, incomplete ionization of dopants, and impact ionization models. The simulation validation is carried out for Al/Au Schottky metals at room temperature and at higher temperatures. A good comparison between the simulation and experiment is obtained around turn-on voltage (V T0? 1.0 V for Al and 2.0 V for Au Schottky contacts) and for anode voltage (VA) > VT 0. Through simulations, we estimated the type of SSs and their quantity, and the position of CNL (ECNL) within the diamond bandgap. The effect of ECNL position and pinning parameter on th...

We have carried out a comprehensive study of the gate current (I-G) in advanced MOS architectures for different gate lengths and cross-section areas using an in-house simulation tool. We have considered only direct tunneling under the assumption that trap concentration and therefore the trap assisted current would be small in a matured technology. We have also studied the impact of the interfacial (IL) SiO2 layer on the gate current in the high-kappa gate stack. Our results suggest that IL leads to an increase in the gate current for equivalent EOT. They also highlight that reduction in the cross-section area leads to a significant increase in the I-G.

We have carried out a comprehensive study of the gate current (I-G) in advanced MOS architectures for different gate lengths and cross-section areas using an in-house simulation tool. We have considered only direct tunneling under the assumption that trap concentration and therefore the trap assisted current would be small in a matured technology. We have also studied the impact of the interfacial (IL) SiO2 layer on the gate current in the high-kappa gate stack. Our results suggest that IL leads to an increase in the gate current for equivalent EOT. They also highlight that reduction in the cross-section area leads to a significant increase in the I-G.

We have carried out a comprehensive study of the gate current (I-G) in advanced MOS architectures for different gate lengths and cross-section areas using an in-house simulation tool. We have considered only direct tunneling under the assumption that trap concentration and therefore the trap assisted current would be small in a matured technology. We have also studied the impact of the interfacial (IL) SiO2 layer on the gate current in the high-kappa gate stack. Our results suggest that IL leads to an increase in the gate current for equivalent EOT. They also highlight that reduction in the cross-section area leads to a significant increase in the I-G.

In this article, a 2-D TCAD simulation study on the forward and reverse characteristics of oxygen-terminated diamond (D:O) m-i-p+ Schottky barrier diode (SBD) is carried out considering the effects of Fermi level pinning due to surface states (SSs) and metal-induced gap states (MIGS). The device simulation considers drift-diffusion transport, SS charge neutrality level (CNL), MIGS through Fermi level pinning parameter (S), doping and temperature-dependent mobility model, incomplete ionization of dopants, and impact ionization models. The simulation validation is carried out for Al/Au Schottky metals at room temperature and at higher temperatures. A good comparison between the simulation and experiment is obtained around turn-on voltage (V T0∼ 1.0 V for Al and 2.0 V for Au Schottky contacts) and for anode voltage (VA) > VT 0. Through simulations, we estimated the type of SSs and their quantity, and the position of CNL (ECNL) within the diamond bandgap. The effect of ECNL position and pinning parameter on the forward and reverse characteristics is also simulated. The impact of ECNL and SS on reverse leakage current is also analyzed using a nonlocal barrier tunneling model. At higher temperatures, a good match between simulation and experiment of forward characteristics is achieved. © 1963-2012 IEEE.

In this article, a 2-D TCAD simulation study on the forward and reverse characteristics of oxygen-terminated diamond (D:O) m-i-p+ Schottky barrier diode (SBD) is carried out considering the effects of Fermi level pinning due to surface states (SSs) and metal-induced gap states (MIGS). The device simulation considers drift-diffusion transport, SS charge neutrality level (CNL), MIGS through Fermi level pinning parameter (S), doping and temperature-dependent mobility model, incomplete ionization of dopants, and impact ionization models. The simulation validation is carried out for Al/Au Schottky metals at room temperature and at higher temperatures. A good comparison between the simulation and experiment is obtained around turn-on voltage (V T0∼ 1.0 V for Al and 2.0 V for Au Schottky contacts) and for anode voltage (VA) > VT 0. Through simulations, we estimated the type of SSs and their quantity, and the position of CNL (ECNL) within the diamond bandgap. The effect of ECNL position and pinning parameter on the forward and reverse characteristics is also simulated. The impact of ECNL and SS on reverse leakage current is also analyzed using a nonlocal barrier tunneling model. At higher temperatures, a good match between simulation and experiment of forward characteristics is achieved. © 1963-2012 IEEE.

In this article, a 2-D TCAD simulation study on the forward and reverse characteristics of oxygen-terminated diamond (D:O) m-i-p+ Schottky barrier diode (SBD) is carried out considering the effects of Fermi level pinning due to surface states (SSs) and metal-induced gap states (MIGS). The device simulation considers drift-diffusion transport, SS charge neutrality level (CNL), MIGS through Fermi level pinning parameter (S), doping and temperature-dependent mobility model, incomplete ionization of dopants, and impact ionization models. The simulation validation is carried out for Al/Au Schottky metals at room temperature and at higher temperatures. A good comparison between the simulation and experiment is obtained around turn-on voltage (V T0∼ 1.0 V for Al and 2.0 V for Au Schottky contacts) and for anode voltage (VA) > VT 0. Through simulations, we estimated the type of SSs and their quantity, and the position of CNL (ECNL) within the diamond bandgap. The effect of ECNL position and pinning parameter on the forward and reverse characteristics is also simulated. The impact of ECNL and SS on reverse leakage current is also analyzed using a nonlocal barrier tunneling model. At higher temperatures, a good match between simulation and experiment of forward characteristics is achieved. © 1963-2012 IEEE.

Power-to-Gas (P2G) has been one of the most frequently discussed technologies in the last few years. This technology allows producing CO2 free fuels. Thanks to its high flexibility, it may offer services to the power system, fostering Variable Renewable Energy Sources (VRES) and the electricity demand match, mitigating the issues related to VRES overproduction. The role of P2G plants connected to the transmission system as flexibility asset has been extensively analyzed in the literature. Conversely, the analysis of these systems used at distribution level has only been dealt with in a few studies: however, in this case critical operation conditions can easily arise, both on electrical and gas infrastructure. This article presents a methodological analysis on the impact of different simulation approaches when P2G is installed at distribution system level. The choice of the most appropriate modeling approaches for electricity and distribution grids is required in order to avoid overestimating or underestimating the potential flexibility that P2G plants connected to distribution networks can offer. The aim of this paper is to understand the impact of different modeling approaches in order to determine whether, and under which conditions, this is acceptable. An illustrative case study has been developed to perform this kind of analysis. The results demonstrated that it is important to take into account the electric distribution network topology, as the performance of P2G plants could be affected by their placement in the network. Neglecting the dynamics of a gas network or the interactions between P2G plant components under a low gas demand condition can lead to an underestimation of the flexibility of the entire system. If the demand for gas is high enough, the use of simplified assumptions that do not consider the dynamics of the gas network and P2G systems may be acceptable.

This research explores and investigates strategies towards automation of the systematic literature review (SLR) process. SLR is a valuable research method that follows a comprehensive, transparent, and reproducible research methodology. SLRs are at the heart of evidence-based research in various research domains, from healthcare to software engineering. They allow researchers to systematically collect and integrate empirical evidence in response to a focused research question, setting the foundation for future research. SLRs are also beneficial to researchers in learning about the state of the art of research and enriching their knowledge of a topic of research. Given their demonstrated value, SLRs are becoming an increasingly popular type of publication in different disciplines. Despite the valuable contributions of SLRs to science, performing timely, reliable, comprehensive, and unbiased SLRs is a challenging endeavour. With the rapid growth in primary research published every year, SLRs might fail to provide complete coverage of existing evidence and even end up being outdated by the time of publication. These challenges have sparked motivation and discussion in research communities to explore automation techniques to support the SLR process. In investigating automatic methods for supporting the systematic review process, this thesis develops three main areas. First, by conducting a systematic literature review, we found the state of the art of automation techniques that are employed to facilitate the systematic review process. Then, in the second study, we identified the real challenges researchers face when conducting SLRs, through an empirical study. Moreover, we distinguished solutions that help researchers to overcome these challenges. We also identified the researchers' concerns regarding adopting automation techniques in SLR practice. Finally, in the third study, we leveraged the findings of our previous studies to investigate a solution to facilitate the

The beneficial characteristics of polyoxometalate (POM) molecule-based flash memory cells provide interesting opportunities for scaling beyond the limitations of conventional flash cells. In this paper, we study the write, erase, and retention times of POM flash cells using a kinetic Monte Carlo method implemented in the multi-scale Nano-Electronic Simulation Software simulation framework. The POM flash structure is optimized by studying the tradeoffs between program/erase time and retention time. Based on the optimized POM flash structure, the POM molecular layer charging and discharging processes as well as the corresponding threshold voltage variation are analyzed. The distributions of write, erase, and retention times are simulated and analyzed when studying the POM flash dynamic charging and discharging characteristics. © 2021 IOP Publishing Ltd.

The beneficial characteristics of polyoxometalate (POM) molecule-based flash memory cells provide interesting opportunities for scaling beyond the limitations of conventional flash cells. In this paper, we study the write, erase, and retention times of POM flash cells using a kinetic Monte Carlo method implemented in the multi-scale Nano-Electronic Simulation Software simulation framework. The POM flash structure is optimized by studying the tradeoffs between program/erase time and retention time. Based on the optimized POM flash structure, the POM molecular layer charging and discharging processes as well as the corresponding threshold voltage variation are analyzed. The distributions of write, erase, and retention times are simulated and analyzed when studying the POM flash dynamic charging and discharging characteristics. © 2021 IOP Publishing Ltd.

The effect of interface trap variability (ITV) on horizontally stacked nanosheet FET (NSHFET) has been explored using TCAD based 3-D quantum corrected Drift-Diffusion simulation framework for sub-3 nm technology node. It is revealed that 3-stacked NSHFET shows 9.09% lesser VT variation compared to 3-stacked nanowire FET (NWFET) due to combined ITV sources such as charge neutrality level (CNL), single charged traps (SCTs), and random interface traps (RITs). The 3-stacked NSHFET and NWFET reduces the ITV induced VT variation by 31.3% and 28.8% respectively compared to the single stacked transistors. The NSHFETs of higher effective channel width shows better immunity to ITV. It is found that both Si NSHFET and NWFET transistors effectively suppresses the combined ITV sources induced VT, ION, and drain induced barrier lowering (DIBL) variations when the CNL is positioned between midgap and conduction band edge of the semiconductor bandgap. © 2021 IEEE.

The effect of interface trap variability (ITV) on horizontally stacked nanosheet FET (NSHFET) has been explored using TCAD based 3-D quantum corrected Drift-Diffusion simulation framework for sub-3 nm technology node. It is revealed that 3-stacked NSHFET shows 9.09% lesser VT variation compared to 3-stacked nanowire FET (NWFET) due to combined ITV sources such as charge neutrality level (CNL), single charged traps (SCTs), and random interface traps (RITs). The 3-stacked NSHFET and NWFET reduces the ITV induced VT variation by 31.3% and 28.8% respectively compared to the single stacked transistors. The NSHFETs of higher effective channel width shows better immunity to ITV. It is found that both Si NSHFET and NWFET transistors effectively suppresses the combined ITV sources induced VT, ION, and drain induced barrier lowering (DIBL) variations when the CNL is positioned between midgap and conduction band edge of the semiconductor bandgap. © 2021 IEEE.

BackgroundThe coronavirus disease 2019 (COVID-19) pandemic has led to significant reductions in transplantation, motivated in part by concerns of disproportionately more severe disease among solid organ transplant (SOT) recipients. However, clinical features, outcomes, and predictors of mortality in SOT recipients are not well described.MethodsWe performed a multicenter cohort study of SOT recipients with laboratory-confirmed COVID-19. Data were collected using standardized intake and 28-day follow-up electronic case report forms. Multivariable logistic regression was used to identify risk factors for the primary endpoint, 28-day mortality, among hospitalized patients.ResultsFour hundred eighty-two SOT recipients from >50 transplant centers were included: 318 (66%) kidney or kidney/pancreas, 73 (15.1%) liver, 57 (11.8%) heart, and 30 (6.2%) lung. Median age was 58 (interquartile range [IQR] 46-57), median time post-transplant was 5 years (IQR 2-10), 61% were male, and 92% had ≥1 underlying comorbidity. Among those hospitalized (376 [78%]), 117 (31%) required mechanical ventilation, and 77 (20.5%) died by 28 days after diagnosis. Specific underlying comorbidities (age >65 [adjusted odds ratio [aOR] 3.0, 95% confidence interval [CI] 1.7-5.5, P < .001], congestive heart failure [aOR 3.2, 95% CI 1.4-7.0, P = .004], chronic lung disease [aOR 2.5, 95% CI 1.2-5.2, P = .018], obesity [aOR 1.9, 95% CI 1.0-3.4, P = .039]) and presenting findings (lymphopenia [aOR 1.9, 95% CI 1.1-3.5, P = .033], abnormal chest imaging [aOR 2.9, 95% CI 1.1-7.5, P = .027]) were independently associated with mortality. Multiple measures of immunosuppression intensity were not associated with mortality.ConclusionsMortality among SOT recipients hospitalized for COVID-19 was 20.5%. Age and underlying comorbidities rather than immunosuppression intensity-related measures were major drivers of mortality.

The effect of interface trap variability (ITV) on horizontally stacked nanosheet FET (NSHFET) has been explored using TCAD based 3-D quantum corrected Drift-Diffusion simulation framework for sub-3 nm technology node. It is revealed that 3-stacked NSHFET shows 9.09% lesser VT variation compared to 3-stacked nanowire FET (NWFET) due to combined ITV sources such as charge neutrality level (CNL), single charged traps (SCTs), and random interface traps (RITs). The 3-stacked NSHFET and NWFET reduces the ITV induced VT variation by 31.3% and 28.8% respectively compared to the single stacked transistors. The NSHFETs of higher effective channel width shows better immunity to ITV. It is found that both Si NSHFET and NWFET transistors effectively suppresses the combined ITV sources induced VT, ION, and drain induced barrier lowering (DIBL) variations when the CNL is positioned between midgap and conduction band edge of the semiconductor bandgap. © 2021 IEEE.

A Density Functional Theory based simulation study on cubic crystal orientation dependent transition metal contact with monolayer MoS2/WS2 in reference to exchange energy, density of states and thermodynamic entropy measurements are studied. Exchange energy states the stability of the interfaces between MoS2/WS2 and transition metals. The density of states calculation reveals the transport dominance with respect to charge polarity (electron or hole) and magnitude of charge flow through the interface. Entropy gives an alternative view to analyse carrier-phonon scattering at the interface. Our calculations suggest that (100) and (111) orientated transition metals from 3d group like Sc, Ti, Cr, Co, and Ni, (110) orientated transition metals from 4d group like Tc, Pd, Zr, and Ag and from 5d group (100), (110) orientated elements like Ta, W, Os, Ir, Pt are better suited for elemental contact applications in MoS2 and WS2 channel-based CMOS logic FETs. © 1980-2012 IEEE.

A Density Functional Theory based simulation study on cubic crystal orientation dependent transition metal contact with monolayer MoS2/WS2 in reference to exchange energy, density of states and thermodynamic entropy measurements are studied. Exchange energy states the stability of the interfaces between MoS2/WS2 and transition metals. The density of states calculation reveals the transport dominance with respect to charge polarity (electron or hole) and magnitude of charge flow through the interface. Entropy gives an alternative view to analyse carrier-phonon scattering at the interface. Our calculations suggest that (100) and (111) orientated transition metals from 3d group like Sc, Ti, Cr, Co, and Ni, (110) orientated transition metals from 4d group like Tc, Pd, Zr, and Ag and from 5d group (100), (110) orientated elements like Ta, W, Os, Ir, Pt are better suited for elemental contact applications in MoS2 and WS2 channel-based CMOS logic FETs. © 1980-2012 IEEE.

A Density Functional Theory based simulation study on cubic crystal orientation dependent transition metal contact with monolayer MoS2/WS2 in reference to exchange energy, density of states and thermodynamic entropy measurements are studied. Exchange energy states the stability of the interfaces between MoS2/WS2 and transition metals. The density of states calculation reveals the transport dominance with respect to charge polarity (electron or hole) and magnitude of charge flow through the interface. Entropy gives an alternative view to analyse carrier-phonon scattering at the interface. Our calculations suggest that (100) and (111) orientated transition metals from 3d group like Sc, Ti, Cr, Co, and Ni, (110) orientated transition metals from 4d group like Tc, Pd, Zr, and Ag and from 5d group (100), (110) orientated elements like Ta, W, Os, Ir, Pt are better suited for elemental contact applications in MoS2 and WS2 channel-based CMOS logic FETs. © 1980-2012 IEEE.

The beneficial characteristics of polyoxometalate (POM) molecule-based flash memory cells provide interesting opportunities for scaling beyond the limitations of conventional flash cells. In this paper, we study the write, erase, and retention times of POM flash cells using a kinetic Monte Carlo method implemented in the multi-scale Nano-Electronic Simulation Software simulation framework. The POM flash structure is optimized by studying the tradeoffs between program/erase time and retention time. Based on the optimized POM flash structure, the POM molecular layer charging and discharging processes as well as the corresponding threshold voltage variation are analyzed. The distributions of write, erase, and retention times are simulated and analyzed when studying the POM flash dynamic charging and discharging characteristics. © 2021 IOP Publishing Ltd.

The beneficial characteristics of polyoxometalate (POM) molecule-based flash memory cells provide interesting opportunities for scaling beyond the limitations of conventional flash cells. In this paper, we study the write, erase, and retention times of POM flash cells using a kinetic Monte Carlo method implemented in the multi-scale Nano-Electronic Simulation Software simulation framework. The POM flash structure is optimized by studying the tradeoffs between program/erase time and retention time. Based on the optimized POM flash structure, the POM molecular layer charging and discharging processes as well as the corresponding threshold voltage variation are analyzed. The distributions of write, erase, and retention times are simulated and analyzed when studying the POM flash dynamic charging and discharging characteristics. © 2021 IOP Publishing Ltd.

In this article, we investigate the electro-thermal (ET) performance of stacked Si gate-all-around (GAA) nanosheet FET (NSHFET) by adopting the metal (M0) source/drain (S/D) engineered contacts such as M0-wrap around the Si S/D epitaxial regions and M0 filling through S/D trenched regions in addition to the conventional scheme where metal (M0) epi on the S/D. The device ET performance is enhanced by increasing the device on-state current ( {I_{ mathrm{scriptscriptstyle ON}}} ) by more than 10% with better device lattice heat removal from the hot-spot location of the NSHFET. This results in decreased device self-heating by lowering lattice hot-spot temperature ( {T}_{L, max} ) and device effective thermal resistance ( {R}_{th, eff} ) by more than 11% compared to conventional M0-epi-based NSHFET design. The junction temperature difference between the nanosheet channels is also lowered, which decreases the inter-sheet threshold voltage ( {V}_{T} ) difference. The benchmarking study of the device designs reveals that M0-trench-based NSHFET gives the best performance from both electrical and thermal perspective for future sub-5-nm CMOS logic technologies. © 1963-2012 IEEE.

The beneficial characteristics of polyoxometalate (POM) molecule-based flash memory cells provide interesting opportunities for scaling beyond the limitations of conventional flash cells. In this paper, we study the write, erase, and retention times of POM flash cells using a kinetic Monte Carlo method implemented in the multi-scale Nano-Electronic Simulation Software simulation framework. The POM flash structure is optimized by studying the tradeoffs between program/erase time and retention time. Based on the optimized POM flash structure, the POM molecular layer charging and discharging processes as well as the corresponding threshold voltage variation are analyzed. The distributions of write, erase, and retention times are simulated and analyzed when studying the POM flash dynamic charging and discharging characteristics. © 2021 IOP Publishing Ltd.

In this article, we investigate the electro-thermal (ET) performance of stacked Si gate-all-around (GAA) nanosheet FET (NSHFET) by adopting the metal (M0) source/drain (S/D) engineered contacts such as M0-wrap around the Si S/D epitaxial regions and M0 filling through S/D trenched regions in addition to the conventional scheme where metal (M0) epi on the S/D. The device ET performance is enhanced by increasing the device on-state current ( {I_{ mathrm{scriptscriptstyle ON}}} ) by more than 10% with better device lattice heat removal from the hot-spot location of the NSHFET. This results in decreased device self-heating by lowering lattice hot-spot temperature ( {T}_{L, max} ) and device effective thermal resistance ( {R}_{th, eff} ) by more than 11% compared to conventional M0-epi-based NSHFET design. The junction temperature difference between the nanosheet channels is also lowered, which decreases the inter-sheet threshold voltage ( {V}_{T} ) difference. The benchmarking study of the device designs reveals that M0-trench-based NSHFET gives the best performance from both electrical and thermal perspective for future sub-5-nm CMOS logic technologies. © 1963-2012 IEEE.

In this article, we investigate the electro-thermal (ET) performance of stacked Si gate-all-around (GAA) nanosheet FET (NSHFET) by adopting the metal (M0) source/drain (S/D) engineered contacts such as M0-wrap around the Si S/D epitaxial regions and M0 filling through S/D trenched regions in addition to the conventional scheme where metal (M0) epi on the S/D. The device ET performance is enhanced by increasing the device on-state current ( {I_{ mathrm{scriptscriptstyle ON}}} ) by more than 10% with better device lattice heat removal from the hot-spot location of the NSHFET. This results in decreased device self-heating by lowering lattice hot-spot temperature ( {T}_{L, max} ) and device effective thermal resistance ( {R}_{th, eff} ) by more than 11% compared to conventional M0-epi-based NSHFET design. The junction temperature difference between the nanosheet channels is also lowered, which decreases the inter-sheet threshold voltage ( {V}_{T} ) difference. The benchmarking study of the device designs reveals that M0-trench-based NSHFET gives the best performance from both electrical and thermal perspective for future sub-5-nm CMOS logic technologies. © 1963-2012 IEEE.

In this article, we investigate the electro-thermal (ET) performance of stacked Si gate-all-around (GAA) nanosheet FET (NSHFET) by adopting the metal (M0) source/drain (S/D) engineered contacts such as M0-wrap around the Si S/D epitaxial regions and M0 filling through S/D trenched regions in addition to the conventional scheme where metal (M0) epi on the S/D. The device ET performance is enhanced by increasing the device on-state current ( ${I_{on}}}$ ) by more than 10% with better device lattice heat removal from the hot-spot location of the NSHFET. This results in decreased device self-heating by lowering lattice hot-spot temperature ( $T_{L, max}$ ) and device effective thermal resistance ( $R_{th, eff}$ ) by more than 11% compared to conventional M0-epi-based NSHFET design. The junction temperature difference between the nanosheet channels is also lowered, which decreases the inter-sheet threshold voltage ( $V_{T}$ ) difference. The benchmarking study of the device designs reveals that M0-trench-based NSHFET gives the best performance from both electrical and thermal perspective for future sub-5-nm CMOS logic technologies.

In this article, we investigate the electro-thermal (ET) performance of stacked Si gate-all-around (GAA) nanosheet FET (NSHFET) by adopting the metal (M0) source/drain (S/D) engineered contacts such as M0-wrap around the Si S/D epitaxial regions and M0 filling through S/D trenched regions in addition to the conventional scheme where metal (M0) epi on the S/D. The device ET performance is enhanced by increasing the device on-state current ( ${I_{on}}}$ ) by more than 10% with better device lattice heat removal from the hot-spot location of the NSHFET. This results in decreased device self-heating by lowering lattice hot-spot temperature ( $T_{L, max}$ ) and device effective thermal resistance ( $R_{th, eff}$ ) by more than 11% compared to conventional M0-epi-based NSHFET design. The junction temperature difference between the nanosheet channels is also lowered, which decreases the inter-sheet threshold voltage ( $V_{T}$ ) difference. The benchmarking study of the device designs reveals that M0-trench-based NSHFET gives the best performance from both electrical and thermal perspective for future sub-5-nm CMOS logic technologies.

In this article, we investigate the electro-thermal (ET) performance of stacked Si gate-all-around (GAA) nanosheet FET (NSHFET) by adopting the metal (M0) source/drain (S/D) engineered contacts such as M0-wrap around the Si S/D epitaxial regions and M0 filling through S/D trenched regions in addition to the conventional scheme where metal (M0) epi on the S/D. The device ET performance is enhanced by increasing the device on-state current ( ${I_{on}}}$ ) by more than 10% with better device lattice heat removal from the hot-spot location of the NSHFET. This results in decreased device self-heating by lowering lattice hot-spot temperature ( $T_{L, max}$ ) and device effective thermal resistance ( $R_{th, eff}$ ) by more than 11% compared to conventional M0-epi-based NSHFET design. The junction temperature difference between the nanosheet channels is also lowered, which decreases the inter-sheet threshold voltage ( $V_{T}$ ) difference. The benchmarking study of the device designs reveals that M0-trench-based NSHFET gives the best performance from both electrical and thermal perspective for future sub-5-nm CMOS logic technologies.

The main disease in maize is downy mildew caused by the fungus Peronosclerospora spp.. This pathogen can cause yield losses of up to 100%. Therefore, efforts to control this disease are continuously carried out, including technical culture, assembly of resistant plants, and use of synthetic fungicides. At the farm level, the use of metalaxyl, synthetic fungicides is the most common practice. On the other hand, it has been reported that some Peronosclerospora groups are starting to become resistant to metalaxyl. These problems lead to the need for alternative controls, for example with biological agents. Biological agents from bacterial groups have been developed to control plant disease, but for downy mildew is still limited. The purpose of this study is to screen and test Bacillus spp. ability to suppress downy mildew and promote the growth of maize. The assay was carried out on seeds by invitro to investigate growth-promoting reactions and also testing under controlled conditions in greenhouses to investigate the suppression ability of downy mildew disease development. The results showed B. polymyxa strain BP18, Bacillus subtilis strain BS41, Bacillus sp. strain BT1, and Bacillus sp. strains can stimulate the growth of corn seedlings and suppress downy mildew. The best isolate in suppressing downy mildew was Bacillus sp. strain BT1 with the smallest AUDPC value (3.94) and the highest protection index (82.71%). It is hoped that these results will find potential isolates and have the potential to be developed into biopesticides and biofertilizers.

This chapter considers the role of writing rules in artistic practice and creative writing teaching. It compares narratology and literary theory with writers’ writing rules, comparing these to the author’s own “Golden Rules” for writing short fiction, and his own writing practice. It considers the perennial quest for rules amongst writers, the reasons we feel compelled to seek rules, and the theoretical and practical aspects of this creative process, including the potential generative or imitative effects, both narratively and stylistically, of applying other writers’ rules and practices to one’s own writing. While acknowledging the suspicion of many writers for literary theory, this discussion seeks to strike a balance between theory and practice, while encouraging students and aspiring writers to consider theoretical and literary precedents, and ultimately argues for the most effective means of producing good writing.

Distributed generation, based on the exploitation of Renewable Energy Sources (RES), has increased in the last few decades to limit anthropogenic carbon dioxide emissions, and this trend will increase in the future. However, RES generation is not dispatchable, and an increasing share of RES may lead to inefficiencies and even problems for the electricity network. Flexible resources are needed to handle RES generation in order to support the delicate electricity generation and demand balance. Energy conversion technologies (P2X, Power to X) allow the flexibility of energy systems to be increased. These technologies make a connection between different energy sectors (e.g., electricity and gas) possible, and thus create new synergies within an overall multi energy system. This paper analyzes how the P2G technology can be used at the distribution network level (both gas and electricity) to optimize the use of RES. In fact, in order to coordinate P2X resources, it is necessary to take into account the whole multi energy scenario, and not just the electrical side: it therefore becomes fundamental to recognize the pros and cons that Balancing Service Providers (BSPs), composed of a number of P2G plants (representing the Balancing Responsible Providers, BRPs), may have when offering services to an electricity network. Moreover, the convenience of the decarbonization of the gas grid has been evaluated through the calculation of the levelized cost of Synthetic Natural Gas (LCSNG) for cost scenarios for the years 2030 and 2050, considering different assumptions about the cost of the surplus utilization of RES. The results show that LCSNG may vary from 47 to 319 EURO/MWh, according to the different configurations, i.e., only in the best case scenario is the SNG cost comparable with the cost of natural gas, and hence does the P2G technology result to be profitable

Coxiella burnetii is an obligate intracellular Gram-negative bacterium and the causative agent of a worldwide zoonosis known as Q fever. The pathogen invades monocytes and macrophages, replicating within acidic phagolysosomes and evading host defenses through different immune evasion strategies that are mainly associated with the structure of its lipopolysaccharide. The main transmission routes are aerosols and ingestion of fomites from infected animals. The innate immune system provides the first host defense against the microorganism, and it is crucial to direct the infection towards a self-limiting respiratory disease or the chronic form. This review reports the advances in understanding the mechanisms of innate immunity acting during C. burnetii infection and the strategies that pathogen put in place to infect the host cells and to modify the expression of specific host cell genes in order to subvert cellular processes. The mechanisms through which different cell types with different genetic backgrounds are differently susceptible to C. burnetii intracellular growth are discussed. The subsets of cytokines induced following C. burnetii infection as well as the pathogen influence on an inflammasome-mediated response are also described. Finally, we discuss the use of animal experimental systems for studying the innate immune response against C. burnetii and discovering novel methods for prevention and treatment of disease in humans and livestock.

This chapter considers the role of writing rules in artistic practice and creative writing teaching. It compares narratology and literary theory with writers’ writing rules, comparing these to the author’s own “Golden Rules” for writing short fiction, and his own writing practice. It considers the perennial quest for rules amongst writers, the reasons we feel compelled to seek rules, and the theoretical and practical aspects of this creative process, including the potential generative or imitative effects, both narratively and stylistically, of applying other writers’ rules and practices to one’s own writing. While acknowledging the suspicion of many writers for literary theory, this discussion seeks to strike a balance between theory and practice, while encouraging students and aspiring writers to consider theoretical and literary precedents, and ultimately argues for the most effective means of producing good writing.

This chapter considers the role of writing rules in artistic practice and creative writing teaching. It compares narratology and literary theory with writers’ writing rules, comparing these to the author’s own “Golden Rules” for writing short fiction, and his own writing practice. It considers the perennial quest for rules amongst writers, the reasons we feel compelled to seek rules, and the theoretical and practical aspects of this creative process, including the potential generative or imitative effects, both narratively and stylistically, of applying other writers’ rules and practices to one’s own writing. While acknowledging the suspicion of many writers for literary theory, this discussion seeks to strike a balance between theory and practice, while encouraging students and aspiring writers to consider theoretical and literary precedents, and ultimately argues for the most effective means of producing good writing.

The modelling of conventional and novel memory devices has gained significant traction in recent years. This is primarily because the need to store an increasingly larger amount of data demands a better understanding of the working of the novel memory devices, to enable faster development of the future technology generations. Furthermore, in-memory computing is also of great interest from the computational perspectives, to overcome the data transfer bottleneck that is prevalent in the von-Neumann architecture. These important factors necessitate the development of comprehensive TCAD simulation tools that can be used for modeling carrier dynamics in the gate oxides of the flash memory cells. In this work, we introduce the kinetic Monte Carlo module that we have developed and integrated within the Nano Electronic Simulation Software (NESS)-to model electronic charge transport in Flash memory type structures. Using the developed module, we perform retention time analysis for a polyoxometalate (POM) molecule-b...

The modelling of conventional and novel memory devices has gained significant traction in recent years. This is primarily because the need to store an increasingly larger amount of data demands a better understanding of the working of the novel memory devices, to enable faster development of the future technology generations. Furthermore, in-memory computing is also of great interest from the computational perspectives, to overcome the data transfer bottleneck that is prevalent in the von-Neumann architecture. These important factors necessitate the development of comprehensive TCAD simulation tools that can be used for modeling carrier dynamics in the gate oxides of the flash memory cells. In this work, we introduce the kinetic Monte Carlo module that we have developed and integrated within the Nano Electronic Simulation Software (NESS)-to model electronic charge transport in Flash memory type structures. Using the developed module, we perform retention time analysis for a polyoxometalate (POM) molecule-b...

Aim: Using Australian and New Zealand (NZ) Massive Transfusion Registry (ANZ-MTR) describe Whole Blood (WB) use in massive transfusion (MT) (>=5 red blood cells (RBC) in any 4 h period) in NZ and compare transfusion requirements, laboratory parameters and patient outcomes for WB recipients (WB-R) with those receiving only RBC units (RBC-R). Method(s): All adult MT recipients between 2011 and 2018, at 4 NZ sites with access to WB, were included in the analysis. Result(s): Three hundred fifteen of 1947 (16.1%) MT recipients received >=1 WB unit. WB was most commonly used in vascular surgery (21%), trauma (17%), gastrointestinal (14%), cardiac surgery (11%). WB-R received a median of 2 (IQR 1, 2) WB units and commenced transfusion sooner relative to time of hospital admission than RBC-R. WB-R received fewer RBC (9 (6,16) vs 10 (7,15), P = 0.013), more fresh frozen plasma (FFP) (6 (2,11) vs 5 (2, 9), p < 0.001) and more recombinant FVIIa (P = 0.02) than RBC-R. There were no differences in fibrinogen concentrate, prothrombin complex or other fresh blood products given. In first 4-h of MT, WB-R had shorter APTT compared to RBC-R (42 (34, 60) vs 47 (36, 71) seconds; P = 0.01). Nadir haemoglobin, platelet count and fibrinogen for the 2 groups were similar. WB-R had higher in-hospital mortality (31.4% vs 25.3%, P = 0.024), but similar ICU length of stay and ventilation time. After adjusting for age, sex, number of RBC and FFP units, clinical context and hospital site there was no significant association between WB use and mortality (adjusted odds ratio WB Plasma Reduced 1.19 (95% CI 0.80-1.78) and WB Leucodepleted 1.42 (95% CI 0.94-2.15)).

Aim: Using Australian and New Zealand (NZ) Massive Transfusion Registry (ANZ-MTR) describe Whole Blood (WB) use in massive transfusion (MT) (>=5 red blood cells (RBC) in any 4 h period) in NZ and compare transfusion requirements, laboratory parameters and patient outcomes for WB recipients (WB-R) with those receiving only RBC units (RBC-R). Method(s): All adult MT recipients between 2011 and 2018, at 4 NZ sites with access to WB, were included in the analysis. Result(s): Three hundred fifteen of 1947 (16.1%) MT recipients received >=1 WB unit. WB was most commonly used in vascular surgery (21%), trauma (17%), gastrointestinal (14%), cardiac surgery (11%). WB-R received a median of 2 (IQR 1, 2) WB units and commenced transfusion sooner relative to time of hospital admission than RBC-R. WB-R received fewer RBC (9 (6,16) vs 10 (7,15), P = 0.013), more fresh frozen plasma (FFP) (6 (2,11) vs 5 (2, 9), p < 0.001) and more recombinant FVIIa (P = 0.02) than RBC-R. There were no differences in fibrinogen concentrate, prothrombin complex or other fresh blood products given. In first 4-h of MT, WB-R had shorter APTT compared to RBC-R (42 (34, 60) vs 47 (36, 71) seconds; P = 0.01). Nadir haemoglobin, platelet count and fibrinogen for the 2 groups were similar. WB-R had higher in-hospital mortality (31.4% vs 25.3%, P = 0.024), but similar ICU length of stay and ventilation time. After adjusting for age, sex, number of RBC and FFP units, clinical context and hospital site there was no significant association between WB use and mortality (adjusted odds ratio WB Plasma Reduced 1.19 (95% CI 0.80-1.78) and WB Leucodepleted 1.42 (95% CI 0.94-2.15)).

BiCMOS technology can be a possible replacement for FDSOI and FinFET technology due to their higher transconductance, which allows them to operate at in THz range i.e. radio frequencies (RF) in addition to their higher voltage handling ability. The most advanced SiGe heterojunction bipolar transistor (HBT) technology (55-nm BiCMOS) demonstrates room temperature cut-off frequency ($f_{\mathrm{t}}$) and maximum oscillation frequency ($f_{\max}$) of 320 GHz and 370 GHz respectively. In this paper, we performed TCAD analysis to investigate the performance metrics, $f_{\mathrm{t}}$ and $f_{\max}$ of the SiGe HBT at different cryogenic temperatures. The calibrated Gummel characteristics reveals that a record DC current gain of $1.2\times 10^{4}$ is obtained at 77 K for $\mathrm{V}_{\text{BE}}=\mathrm{V}_{\text{CE}}=1.2\ \mathrm{V}$. The HBT device employs bandgap engineering by linearly varying the Ge concentration in the base region, which enhances the device performance. Both the bandgap engineering with linearly graded Germanium (Ge) profile (induces intrinsic drift field in the base) and the cryogenic operation of the HBT device results in enhancement of $f_{\mathrm{t}}$ and $f_{\max}$. Our simulations predict that the value of peak $f_{\mathrm{t}}$ decreases below 100 K due to increase in the emitter junction capacitance and the peak $f_{\max}$ increase is due to decrease in collector junction capacitance and base resistance. The aggregate metric $f_{\mathrm{t}}+f_{\max} > 1.2\ \text{THz}$ is achieved under cryogenic condition without scaling the device, this advantage can be utilized in the THz device applications. © 2020 IEEE.