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Photovoltaic energy generation potential can be tapped with maximum efficacy by characterizing the source behaviour. Characterization refers to the systematic terminal measurement-based PV modeling which can further facilitate output prediction and fault detection. Most of the existing PV characterization methods fail for high-power PV array due to increased thermal losses in electronic components. Here, we propose a switched-mode power converter-based PV characterization setup which is designed with input filter to limit switching ripple entering into PV array under test, thereby enhancing system life and efficiency. The high resonant frequency input filter ensures its compactness with high-speed characterization capability. To further enhance the system performance, a closed-loop current control of the system is designed for high bandwidth and stable phase margins. Variation of the controller parameters under varying ambient conditions of 200–1000 W/m irradiation and 25–70 C temperature is documented and an adaptive PI controller is proposed. Experimental and simulation results validate the high performance of the closed loop operation of the PV characterization at 1.2 kW range power level in real-time field conditions. Compared to the open loop operation, the closed-loop operation eliminates the waveform ringing by 100% during characterization.

A selection switch based cell-to-cell voltage equalizer requires only one dual-port dc-dc converter shared by all the cells. A cell-to-cell voltage equalizer is proposed that utilizes a capacitively level-shifted Cuk converter and low-frequency cell selection switches. The absence of isolation transformer and diodes in the equalizer leads to high efficiency, and the use of low-frequency selection switches significantly reduces the cost of the drive circuits. A low-frequency cell selection network is proposed using bipolar voltage buses, where the switch count is almost half, compared to the existing low-frequency cell-to-cell equalizers for the case of a large number of cells. A novel approach for cell voltage recovery compensation is proposed, which reduces the number of operations of the selection switches and the equalization time. The proposed equalizer is implemented with relays and verified with an 8-cell Li-ion stack. The developed prototype shows the efficiency of over 90\% and good voltage balancing performance during charging, discharging, and varying load conditions. Experimental results also show about one order of magnitude reduction in the number of relay switchings and a significant reduction in equalization time using the proposed voltage compensation.

In this paper, a photovoltaic (PV) reconfigurable grid-tied inverter (RGTI) scheme is proposed. Unlike a conventional GTI that ceases operation during a power outage, the RGTI is designed to act as a regular GTI in the on-grid mode but it is reconfigured to function as a DC-DC charge-controller that continues operation during a grid outage. During this period, the RGTI is tied to the battery-bank of an external UPS based backup power system to augment it with solar power. Such an operation in off-grid mode without employing communication with the UPS is challenging, as the control of RGTI must not conflict with the battery management system of the UPS. The hardware and control design aspects of this requirement are discussed in this paper. A battery emulation control scheme is proposed for the RGTI that facilitates seamless functioning of the RGTI in parallel with the physical UPS battery to reduce its discharge current. A system-level control scheme for overall operation and power management is presented to handle the dynamic variations in solar irradiation and UPS loads during the day, such that the battery discharge burden is minimized. The design and operation of the proposed RGTI system are independent of the external UPS and can be integrated with an UPS supplied by any manufacturer. Experimental results on a 4~kVA hardware setup validate the proposed RGTI concept, its operation and control., Comment: 8 pages, 10 figures. This manuscript is under review in IEEE Transactions

Batteries are connected in series to meet the voltage requirement in many applications. A voltage equalizer circuit is necessary to ensure that none of the batteries is over-charged or over-discharged. A novel fast soft-switched cell-to-cell voltage equalizer topology is proposed in this work. This topology can transfer charge from multiple over-charged batteries to multiple under-charged batteries simultaneously avoiding any unnecessary charging or discharging of a battery to achieve fast voltage equalization. The proposed circuit topology and modulation method ensure zero voltage switching under all battery conditions. The circuit operation and soft-switching are analyzed and experimentally verified with a four battery voltage equalizer prototype. The prototype is tested with a battery bank and a hybrid ultra-capacitor bank, and a high conversion efficiency is verified., Comment: 15 pages, 20 figures

Grid-connected inverters have wide application in the field of distributed generation and power quality. As the power level demanded by these applications increase, the design and performance evaluation of these converters become important. In the present work, a 50 kVA three-phase back-to-back connected inverter with output LCL filter is built to study design and performance evaluation aspects of grid-connected inverters. The first part of the work explores the split-capacitor resistive-inductive (SC-RL) passive damping scheme for the output LCL filter of a three-phase grid-connected inverter. The low losses in the SC-RL scheme makes it suitable for high power applications. The SCRL damped LCL filter is modelled using state space approach. Using this model, the power loss and damping are analysed. A method for component selection that minimizes the power loss in the damping resistors while keeping the system well damped is proposed. Analytical results show the losses to be in the range of 0.05-0.1% and the quality factor to be in the range of 2.0-2.5. These results are validated experimentally. In the second part of the work, a test method to evaluate the thermal performance of the semi-conductor devices of a three-phase grid-connected inverter is proposed. The method eliminates the need for high power sources, loads or any additional power converters for circulation of power. Only energy corresponding to the losses is consumed. The capability of the method to evaluate the thermal performance of the DC bus capacitors and the output filter components is also explored. The method can be used with different inverter configurations -three-wire or four-wire and for different PWM techniques. The method has been experimentally validated at a power level of 24kVA. In the third part of the work, the back-to-back connected inverter is programmed as a hardware grid simulator. The hardware grid simulator emulates the real-time grid and helps create grid disturbances often obse

Grid-interactive power converters are normally synchronized to the grid using phase-locked loops (PLLs). The performance of the PLLs is affected by the non-ideal conditions in the sensed grid voltage such as harmonics, frequency deviations and dc offsets in single-phase systems. In this paper, a single-phase PLL is presented to mitigate the effects of these non-idealities. This PLL is based on the popular second order generalized integrator (SOGI) structure. The SOGI structure is modified to eliminate of the effects of input dc offsets. The resulting SOGI structure has a high-pass filtering property. Hence, this PLL is termed as high-pass generalized integrator based PLL (HGI-PLL). It has fixed parameters which reduces the implementation complexity and aids in the implementation in low-end digital controllers. The HGI-PLL is shown to have least resource utilization among the SOGI based PLLs with dc cancelling capability. Systematic design methods are evolved leading to the design that limits the unit vector THD to within 1% for given non-ideal input conditions in terms of frequency deviation and harmonic distortion. The proposed designs achieve the fastest transient response. The performance of this PLL has been verified experimentally. The results are found to agree with the theoretical prediction., Comment: 22 pages, 13 figures and 2 tables