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© 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim There has been increasing interest in electronic systems with integrated microfluidic active cooling modules. However, the failure of 3C-SiC/Si interface with increasing temperature has prevented the development of 3C-SiC power electronic devices. Here, all integrated transparent heating, sensing, and cooling systems are developed on a single silicon carbide (SiC) chip for efficient thermal management. SiC nanofilms are grown on a silicon wafer, are transferred to a glass substrate, and then a micro electromechanical system process is employed to fabricate a SiC-on-glass system with integrated heaters and temperature sensors. A cooling system is fabricated with microchannel using 3D printing, molding, and plasma assisted bonding. The thermal management of the SiC-based system shows an excellent capability of heating and detecting temperature as well as effective cooling with an efficiency of from 0.24 to 0.28 and a maximum cooling rate of 0.1 K(µL min−1)−1. The fabrication strategy can be utilized for large production of SiC power nanoelectronics with high efficiency of integrated thermal management systems.

© 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim There has been increasing interest in electronic systems with integrated microfluidic active cooling modules. However, the failure of 3C-SiC/Si interface with increasing temperature has prevented the development of 3C-SiC power electronic devices. Here, all integrated transparent heating, sensing, and cooling systems are developed on a single silicon carbide (SiC) chip for efficient thermal management. SiC nanofilms are grown on a silicon wafer, are transferred to a glass substrate, and then a micro electromechanical system process is employed to fabricate a SiC-on-glass system with integrated heaters and temperature sensors. A cooling system is fabricated with microchannel using 3D printing, molding, and plasma assisted bonding. The thermal management of the SiC-based system shows an excellent capability of heating and detecting temperature as well as effective cooling with an efficiency of from 0.24 to 0.28 and a maximum cooling rate of 0.1 K(µL min−1)−1. The fabrication strategy can be utilized for large production of SiC power nanoelectronics with high efficiency of integrated thermal management systems.

This communication reports for the first time, the impact of device geometry on the stress-dependent offset voltage of single crystal p-type 3C-SiC four terminal devices. Single crystal p-type 3C-SiC(100) was grown by low pressure chemical vapor deposition and three different device geometries (cross, rectangle and square) were fabricated using the conventional photolithography and dry etching processes. It was observed that the stress-dependent offset voltage of the devices strongly depends upon the device geometry and it can be increased by almost 100% by just selecting the appropriate device geometry. We also found that as the device is rotated within the (100) crystal plane its stress sensitivity varies from ≈0 to 9 × 10-11 Pa-1.