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The field of neuromorphic computing holds great promise in terms of advancing computing efficiency and capabilities by following brain-inspired principles. However, the rich diversity of techniques employed in neuromorphic research has resulted in a lack of clear standards for benchmarking, hindering effective evaluation of the advantages and strengths of neuromorphic methods compared to traditional deep-learning-based methods. This paper presents a collaborative effort, bringing together members from academia and the industry, to define benchmarks for neuromorphic computing: NeuroBench. The goals of NeuroBench are to be a collaborative, fair, and representative benchmark suite developed by the community, for the community. In this paper, we discuss the challenges associated with benchmarking neuromorphic solutions, and outline the key features of NeuroBench. We believe that NeuroBench will be a significant step towards defining standards that can unify the goals of neuromorphic computing and drive its technological progress. Please visit neurobench.ai for the latest updates on the benchmark tasks and metrics.

We present multiplexed gradient descent (MGD), a gradient descent framework designed to easily train analog or digital neural networks in hardware. MGD utilizes zero-order optimization techniques for online training of hardware neural networks. We demonstrate its ability to train neural networks on modern machine learning datasets, including CIFAR-10 and Fashion-MNIST, and compare its performance to backpropagation. Assuming realistic timescales and hardware parameters, our results indicate that these optimization techniques can train a network on emerging hardware platforms orders of magnitude faster than the wall-clock time of training via backpropagation on a standard GPU, even in the presence of imperfect weight updates or device-to-device variations in the hardware. We additionally describe how it can be applied to existing hardware as part of chip-in-the-loop training, or integrated directly at the hardware level. Crucially, the MGD framework is highly flexible, and its gradient descent process can be optimized to compensate for specific hardware limitations such as slow parameter-update speeds or limited input bandwidth.

Superconducting optoelectronic hardware is being explored as a path towards artificial spiking neural networks with unprecedented scales of complexity and computational ability. Such hardware combines integrated-photonic components for few-photon, light-speed communication with superconducting circuits for fast, energy-efficient computation. Monolithic integration of superconducting and photonic devices is necessary for the scaling of this technology. In the present work, superconducting-nanowire single-photon detectors are monolithically integrated with Josephson junctions for the first time, enabling the realization of superconducting optoelectronic synapses. We present circuits that perform analog weighting and temporal leaky integration of single-photon presynaptic signals. Synaptic weighting is implemented in the electronic domain so that binary, single-photon communication can be maintained. Records of recent synaptic activity are locally stored as current in superconducting loops. Dendritic and neuronal nonlinearities are implemented with a second stage of Josephson circuitry. The hardware presents great design flexibility, with demonstrated synaptic time constants spanning four orders of magnitude (hundreds of nanoseconds to milliseconds). The synapses are responsive to presynaptic spike rates exceeding 10 MHz and consume approximately 33 aJ of dynamic power per synapse event before accounting for cooling. In addition to neuromorphic hardware, these circuits introduce new avenues towards realizing large-scale single-photon-detector arrays for diverse imaging, sensing, and quantum communication applications., Comment: 23 pages, 20 figures

Integrated photonics is at the heart of many classical technologies, from optical communications to biosensors, LIDAR, and data center fiber interconnects. There is strong evidence that these integrated technologies will play a key role in quantum systems as they grow from few-qubit prototypes to tens of thousands of qubits. The underlying laser and optical quantum technologies, with the required functionality and performance, can only be realized through the integration of these components onto quantum photonic integrated circuits (QPICs) with accompanying electronics. In the last decade, remarkable advances in quantum photonic integration and a dramatic reduction in optical losses have enabled benchtop experiments to be scaled down to prototype chips with improvements in efficiency, robustness, and key performance metrics. The reduction in size, weight, power, and improvement in stability that will be enabled by QPICs will play a key role in increasing the degree of complexity and scale in quantum demonstrations. In the next decade, with sustained research, development, and investment in the quantum photonic ecosystem (i.e. PIC-based platforms, devices and circuits, fabrication and integration processes, packaging, and testing and benchmarking), we will witness the transition from single- and few-function prototypes to the large-scale integration of multi-functional and reconfigurable QPICs that will define how information is processed, stored, transmitted, and utilized for quantum computing, communications, metrology, and sensing. This roadmap highlights the current progress in the field of integrated quantum photonics, future challenges, and advances in science and technology needed to meet these challenges., Comment: Submitted to the Journal of Physics: Photonics

We report on the fabrication and characterization of single-photon-sensitive WSi superconducting detectors with wire widths from 1 {\mu}m to 3 {\mu}m. The devices achieve saturated internal detection efficiency at 1.55 {\mu}m wavelength and exhibit maximum count rates in excess of 10^5 s^-1. We also investigate the material properties of the silicon-rich WSi films used for these devices. We find that many devices with active lengths of several hundred microns exhibit critical currents in excess of 50% of the depairing current. A meandered detector with 2.0 {\mu}m wire width is demonstrated over a surface area of 362x362 {\mu}m^2, showcasing the material and device quality achieved.

We design, fabricate and characterize integrated photonic routing manifolds with 10 inputs and 100 outputs using two vertically integrated planes of silicon nitride waveguides. We analyze manifolds via top-view camera imaging. This measurement technique allows the rapid acquisition of hundreds of precise transmission measurements. We demonstrate manifolds with uniform and Gaussian power distribution patterns with mean power output errors (averaged over 10 sets of 10 inputs) of 0.7 and 0.9 dB, respectively, establishing this as a viable architecture for precision light distribution on-chip. We also assess the performance of the passive photonic elements comprising the system via self-referenced test structures, including high-dynamic-range beam taps, waveguide cutback structures, and waveguide crossing arrays.

The design of neural hardware is informed by the prominence of differentiated processing and information integration in cognitive systems. The central role of communication leads to the principal assumption of the hardware platform: signals between neurons should be optical to enable fanout and communication with minimal delay. The requirement of energy efficiency leads to the utilization of superconducting detectors to receive single-photon signals. We discuss the potential of superconducting optoelectronic hardware to achieve the spatial and temporal information integration advantageous for cognitive processing, and we consider physical scaling limits based on light-speed communication. We introduce the superconducting optoelectronic neurons and networks that are the subject of the subsequent papers in this series., 10 pages, 1 figure

A superconducting optoelectronic neuron will produce a small current pulse upon reaching threshold. We present an amplifier chain that converts this small current pulse to a voltage pulse sufficient to produce light from a semiconductor diode. This light is the signal used to communicate between neurons in the network. The amplifier chain comprises a thresholding Josephson junction, a relaxation oscillator Josephson junction, a superconducting thin-film current-gated current amplifier, and a superconducting thin-film current-gated voltage amplifier. We analyze the performance of the elements in the amplifier chain in the time domain to calculate the energy consumption per photon created for several values of light-emitting diode capacitance and efficiency. The speed of the amplification sequence allows neuronal firing up to at least 20\,MHz with power density low enough to be cooled easily with standard $^4$He cryogenic systems operating at 4.2\,K., 16 pages, 11 figures

Networks of superconducting optoelectronic neurons are investigated for their near-term technological potential and long-term physical limitations. Networks with short average path length, high clustering coefficient, and power-law degree distribution are designed using a growth model that assigns connections between new and existing nodes based on spatial distance as well as degree of existing nodes. The network construction algorithm is scalable to arbitrary levels of network hierarchy and achieves systems with fractal spatial properties and efficient wiring. By modeling the physical size of superconducting optoelectronic neurons, we calculate the area of these networks. A system with 8100 neurons and 330,430 total synapses will fit on a 1\,cm $\times$ 1\,cm die. Systems of millions of neurons with hundreds of millions of synapses will fit on a 300\,mm wafer. For multi-wafer assemblies, communication at light speed enables a neuronal pool the size of a large data center comprising 100 trillion neurons with coherent oscillations at 1\,MHz. Assuming a power law frequency distribution, as is necessary for self-organized criticality, we calculate the power consumption of the networks. We find the use of single photons for communication and superconducting circuits for computation leads to power density low enough to be cooled by liquid $^4$He for networks of any scale., Comment: 21 pages, 16 figures

Circuits using superconducting single-photon detectors and Josephson junctions to perform signal reception, synaptic weighting, and integration are investigated. The circuits convert photon-detection events into flux quanta, the number of which is determined by the synaptic weight. The current from many synaptic connections is inductively coupled to a superconducting loop that implements the neuronal threshold operation. Designs are presented for synapses and neurons that perform integration as well as detect coincidence events for temporal coding. Both excitatory and inhibitory connections are demonstrated. It is shown that a neuron with a single integration loop can receive input from 1000 such synaptic connections, and neurons of similar design could employ many loops for dendritic processing., Comment: 14 pages, 11 figures

As a means of dynamically reconfiguring the synaptic weight of a superconducting optoelectronic loop neuron, a superconducting flux storage loop is inductively coupled to the synaptic current bias of the neuron. A standard flux memory cell is used to achieve a binary synapse, and loops capable of storing many flux quanta are used to enact multi-stable synapses. Circuits are designed to implement supervised learning wherein current pulses add or remove flux from the loop to strengthen or weaken the synaptic weight. Designs are presented for circuits with hundreds of intermediate synaptic weights between minimum and maximum strengths. Circuits for implementing unsupervised learning are modeled using two photons to strengthen and two photons to weaken the synaptic weight via Hebbian and anti-Hebbian learning rules, and techniques are proposed to control the learning rate. Implementation of short-term plasticity, homeostatic plasticity, and metaplasticity in loop neurons is discussed., Comment: 17 pages, 12 figures

We propose and experimentally demonstrate a photonic routing architecture that can efficiently utilize the space of multi-plane (3D) photonic integration. A wafer with three planes of amorphous silicon waveguides was fabricated and characterized, demonstrating $

We present an approach to fabrication and packaging of integrated photonic devices that utilizes waveguide and detector layers deposited at near-ambient temperature. All lithography is performed with a 365 nm i-line stepper, facilitating low cost and high scalability. We have shown low-loss SiN waveguides, high-$Q$ ring resonators, critically coupled ring resonators, 50/50 beam splitters, Mach-Zehnder interferometers (MZIs) and a process-agnostic fiber packaging scheme. We have further explored the utility of this process for applications in nonlinear optics and quantum photonics. We demonstrate spectral tailoring and octave-spanning supercontinuum generation as well as the integration of superconducting nanowire single photon detectors with MZIs and channel-dropping filters. The packaging approach is suitable for operation up to 160 \degree C as well as below 1 K. The process is well suited for augmentation of existing foundry capabilities or as a stand-alone process., 13 pages, 7 figures

A silicon-compatible light source is the final missing piece for completing high-speed, low-power on-chip optical interconnects. In this paper, we present a germanium-based light emitter that encompasses all the aspects of potential low-threshold lasers: highly strained germanium gain medium, strain-induced pseudo-heterostructure, and high-Q optical cavity. Our light emitting structure presents greatly enhanced photoluminescence into cavity modes with measured quality factors of up to 2,000. The emission wavelength is tuned over more than 400 nm with a single lithography step. We find increased optical gain in optical cavities formed with germanium under high (>2.3%) tensile strain. Through quantitative analysis of gain/loss mechanisms, we find that free carrier absorption from the hole bands dominates the gain, resulting in no net gain even from highly strained, n-type doped germanium., J.P. and D.N. contributed equally to this work

We demonstrate room temperature visible wavelength photoluminescence from In0.5Ga0.5As quantum dots embedded in a GaP membrane. Time-resolved above band photoluminescence measurements of quantum dot emission show a biexpontential decay with lifetimes of ~200 ps. We fabricate photonic crystal cavities which provide enhanced outcoupling of quantum dot emission, allowing the observation of narrow lines indicative of single quantum dot emission. This materials system is compatible with monolithic integration on Si, and is promising for high efficiency detection of single quantum dot emission as well as optoelectronic devices emitting at visible wavelengths.