Search

Solution-processed metal oxides require a great deal of thermal budget in order to achieve the desired film properties. Here, we show that the deposition temperature of sprayed zirconium oxide (ZrOx) thin film can be lowered by exposing the film surface to an ultraviolet (UV) ozone treatment at room temperature. Atomic force microscopy reveals a smooth and uniform film with the root mean square roughness reduced from ~ 0.63 nm (UVO-O) to ~ 0.28 nm (UVO-120) in the UV&ndash, ozone treated ZrOx films. X-ray photoelectron spectroscopy analysis indicates the formation of a Zr&ndash, O network on the surface film, and oxygen vacancy is reduced in the ZrOx lattice by increasing the UV&ndash, ozone treatment time. The leakage current density in Al/ZrOx/p-Si structure was reduced by three orders of magnitude by increasing the UV-ozone exposure time, while the capacitance was in the range 290&ndash, 266 nF/cm2, corresponding to a relative permittivity (k) in the range 5.8&ndash, 6.6 at 1 kHz. An indium gallium zinc oxide (IGZO)-based thin film transistor, employing a UV-treated ZrOx gate dielectric deposited at 200 &deg, C, exhibits negligible hysteresis, an Ion/Ioff ratio of 104, a saturation mobility of 8.4 cm2 V&minus, 1S&minus, 1, a subthreshold slope of 0.21 V.dec&minus, 1, and a Von of 0.02 V. These results demonstrate the potentiality of low-temperature sprayed amorphous ZrOx to be applied as a dielectric in flexible and low-power-consumption oxide electronics.

In this letter, we report a flexible complementary common-source (CS) amplifier comprising one p-type spray-coated single walled carbon nanotube and one n-type sputtered InGaZnO4 thin-film transistor (TFT). Bottom-gate TFTs were realized on a free-standing flexible polyimide foil using a maximum process temperature of 150 °C. The resulting CS amplifier operates at 10 V supply voltage and exhibits a gain bandwidth product of 60 kHz. Thanks to the use of a p-type TFT acting as a tunable current source load, the amplifier gain can be programmed from 3.5 V/V up to 27.2 V/V (28.7 dB). To the best of our knowledge, this is the highest gain ever obtained for a flexible single-stage CS amplifiers.

Although recent progress in the field of flexible electronics has allowed the realization of biocompatible and conformable electronics, systematic approaches which combine high bendability (< 3 mm bending radius), high stretchability ( > 3-4 %) and low complexity in the fabrication process are still missing. Here, we show a technique to induce randomly-oriented and customized wrinkles on the surface of a biocompatible elastomeric substrate, where Thin-Film Transistors (TFTs) and circuits (inverter and logic NAND gates) based on Amorphous-IGZO are fabricated. By tuning the wavelength and the amplitude of the wrinkles, the devices are fully operational while bent to 13 µm bending radii as well as while stretched up to 5%, keeping unchanged electrical properties. Moreover, a flexible rectifier is also realized, showing no degradation in the performances while flat or wrapped on an artificial human wrist. As proof of concept, transparent TFTs are also fabricated, presenting comparable electrical performances to the non-transparent ones. The extension of the buckling approach from our TFTs to circuits demonstrates the scalability of the process, prospecting applications in wireless stretchable electronics to be worn or implanted.

The quest for high-performance flexible circuits call for scaling of the minimum feature size in thin-film transistors (TFTs). Although reduced channel lengths can guarantee an improvement in the electrical properties of the devices, proper design rules also play a crucial role to minimize parasitics when designing fast circuits. In this letter, systematic computer-aided design simulations have guided the fabrication of high-performance flexible operational amplifiers (opamps) and logic circuits based on indium–gallium–zinc-oxide TFTs. In particular, the performance improvements due to the use of an additional third metal layer for the interconnections have been estimated for the first time. Encouraged by the simulated enhancements resulting by the decreased parasitic resistances and capacitances, both TFTs and circuits have been realized on a free-standing 50- $\mu \text{m}$ -thick polymide foil using three metal layers. Despite the thicker layer stack, the TFTs have shown mechanical stability down to 5-mm bending radii. Moreover, the opamps and the logic circuits have yielded improved electrical performance with respect to the architecture with two metal layers: gain-bandwidth-product increased by 16.9%, for the first one, and propagation delay ( $t_{pd}$ ) decreased by 43%, for the latter one.

Indium–gallium–zinc-oxide thin-film transistors gated with solution-processed, ultra-thin Alx Oy have been fabricated on a plastic substrate. The effects of bending on the gate dielectric in terms of leakage current density and capacitance density have been studied. The devices show a low operating voltage of less than 1 V, a high current on/off ratio >105 , and a low subthreshold swing

In this paper, we successfully fabricated and operated passive matrix P(VDF-TrFE) transistor arrays, i.e. memory arrays in which no pass-transistors or other additional electronic components are used. Because of the smaller cell, a higher integration density is possible. We demonstrate arrays up to a size of 16 × 16, processed on thin (25 μm) poly(ethylene naphthalate) substrates, using Indium-Gallium-Zinc-Oxide (IGZO) as the semiconductor and 200 nm-thick P(VDF-TrFE) as a ferroelectric gate dielectric. The memory transistors have remnant current modulations of ∼105 with a retention time of more than 12 days. They can be switched in less than 1 μs at operating voltages of 25 V. Switching speed is strongly decreased with decreasing voltage: at ∼10 V the transistors do not switch within 10 s. This difference in switching speed of more than 4 orders in magnitude when changing the electric field by a factor of only 2.5 makes these memories robust towards disturb voltages, and forms the basis of integration of these transistors in passive matrix-addressable transistor arrays that contains only one (memory) transistor per cell. It is shown that with current technology and memory characteristics it is possible to scale up the array size in the future. © 2013 Elsevier B.V. All rights reserved.

In this paper, we successfully fabricated and operated passive matrix P(VDF-TrFE) transistor arrays, i.e. memory arrays in which no pass-transistors or other additional electronic components are used. Because of the smaller cell, a higher integration density is possible. We demonstrate arrays up to a size of 16 × 16, processed on thin (25 μm) poly(ethylene naphthalate) substrates, using Indium-Gallium-Zinc-Oxide (IGZO) as the semiconductor and 200 nm-thick P(VDF-TrFE) as a ferroelectric gate dielectric. The memory transistors have remnant current modulations of ∼105 with a retention time of more than 12 days. They can be switched in less than 1 μs at operating voltages of 25 V. Switching speed is strongly decreased with decreasing voltage: at ∼10 V the transistors do not switch within 10 s. This difference in switching speed of more than 4 orders in magnitude when changing the electric field by a factor of only 2.5 makes these memories robust towards disturb voltages, and forms the basis of integration of these transistors in passive matrix-addressable transistor arrays that contains only one (memory) transistor per cell. It is shown that with current technology and memory characteristics it is possible to scale up the array size in the future. © 2013 Elsevier B.V. All rights reserved.