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In this work, we demonstrate p-type lithium nickel oxide (LiNiO) as a heterojunction gate combined with tri-gate structures to achieve stable enhancement-mode (e-mode) AlGaN/GaN high-electron-mobility transistors. The low deposition temperature (400 °C) and high-quality LiNiO coated by pulsed-laser-deposition over tri-gate structures resulted in enhancement-mode devices without the need for special epitaxial layers, barrier recess, or barrier regrowth. The LiNiO heterojunction tri-gate devices presented a positive VTH of 0.7 V (at 1 μA/mm), a low on-resistance of 8 Ω· mm, a large maximum on-current of 390 mA/mm, a high breakdown voltage of 1270 V, and excellent reliability simultaneously.

Here we report novel multi-channel AlGaN/GaN MOSHEMTs with high breakdown voltage (V BR ) and low ON-resistance (R ON ). The multi-channel structure was judiciously designed to yield a small sheet resistance (R s ) of 80 Ω/sq using only four 2DEG channels, resulting in an effective resistivity (ρ eff ) of only 1.1 mΩ•mm. The major limitation of high-conductivity multi-channel devices is their limited V BR . This work shows that while conventional field plates (FPs) are not suited to increase V BR in high-conductivity multi-channels, slanted tri-gates offer better electric field management inside the device. With a gate-to-drain separation (L GD ) of 15 µm, the device presented a low R ON of 2.8 Ω•mm (considering the full width of the device (w device )) and a high V BR of 1230 V, rendering a small specific R ON (R ON,SP ) of 0.47 mΩ•cm2 and an excellent figure-of-merit of 3.2 GW/cm2. This work also shows the feasibility of E-mode multi-channel MOSHEMTs with a threshold voltage (V TH ) of +0.9 V at 1 µA/mm by tuning the tri-gate geometry. These results significantly outperform conventional single-channel devices and demonstrate the enormous potential of multi-channel power devices.

In this work, we demonstrate high-performance Enhancement-mode (E-mode) GaN Metal-Oxide-Semiconductor High Electron Mobility Transistors (MOS-HEMTs) on Si substrate based on sidewall depletion achieved by nanostructured gate with large work-function metal. The devices presented threshold voltage (VTH) over 0.6 V at 1 μA/mm, large current density (IDS) up to 590 mA/mm, low specific on resistance (RON,SP) of 1.33 mΩ·cm2, high ON/OFF ratio over 1010 and large breakdown voltage (VBR) of 1080 V at 1 μA/mm with grounded substrate. The excellent high power FOM of 877 MW/cm2 reveals the potential of our approach to obtain E-mode operation, while maintaining exceptional on-state performance and high VBR.

The dissipated energy (Ediss) related to the resonant charging/discharging of a transistor output capacitance, becomes a dominant loss factor for power converters operating in the MHz range. A recent work has introduced a small-signal measurement method to quantify Ediss with a frequency-dependent small-signal resistance, Rs, and an effective small-signal output capacitance, Coss-eff. This work provides further insights on the effect of Rs and Coss upon the device losses in a broader sense. In particular, the Coss loss tangent, tan (δ), is introduced as a normalized Ediss to combine the roles of Rs and Coss together with the operating frequency into a single loss parameter. By evaluating commercial device families, it is demonstrated that tan (δ) is constant for a given family, independent of the device on-state resistance, RDS(on). It is shown that a minimum Ediss is achieved by having the lowest tan (δ) for a given stored energy (Eoss) in Coss. With accompanying guidelines, this work identifies tan (δ) as a powerful figure of merit to classify field-effect transistors for soft-switching applications, regardless of RDS(on) variations in devices within a family. The proposed concept provides a comprehensive method to characterize and benchmark power transistors for high-frequency applications.