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The Stretched-FrOnt-Leg (SFOL) pulse is a high-accuracy distance measuring equipment (DME) pulse developed to support alternative positioning and navigation for aircraft during global navigation satellite system outages. To facilitate the use of the SFOL pulse, it is best to use legacy DMEs that are already deployed to transmit the SFOL pulse, rather than the current Gaussian pulse, through software changes only. When attempting to transmit the SFOL pulse in legacy DMEs, the greatest challenge is the pulse shape distortion caused by the pulse-shaping circuits and power amplifiers in the transmission unit such that the original SFOL pulse shape is no longer preserved. This letter proposes an inverse-learning-based DME digital predistortion method and presents successfully transmitted SFOL pulses from a testbed based on a commercial legacy DME that was designed to transmit Gaussian pulses., Submitted to IEEE Transactions on Aerospace and Electronic Systems

This article presents a 15-bit quadrature digital power amplifier (DPA) with in-phase and quadrature (IQ)-cell-sharing and transformer-based Doherty operation, which compensates the 3-dB power loss in traditional quadrature architecture and enhances efficiency. Efficiency enhancement at 3-/6-dB power backoffs (PBOs) is obtained on the IQ complex plane to improve average efficiency. A single-transformer-footprint parallel-combining transformer (PCT) power combiner is implemented for compact die size. Fabricated in a 55-nm CMOS technology, the DPA is powered by 1.2-/2.4-V supply voltages and the core circuit only occupies 1.05 x 1.14-mm² chip area. It achieves 29.3-dBm peak output power with power added efficiency (PAE) of 43.1%. With 10-MHz 64-quadratic-amplitude modulation (QAM) local thermal equilibrium (LTE) signal, the DPA achieves ${P_{{avg}}}$ of 23.62 dBm and the average PAE of 24.4% with -25.6-dB error vector magnitude (EVM) at 0.85 GHz without using any digital predistortion (DPD) technique. Moreover, for 20-MHz 64-QAM wireless local area network (WLAN) signal, ${P_{{avg}}}$ of 21.01 dBm and the average PAE of 20.1% are obtained with -25.1-dB EVM.

Signal distortion can occur when the gain or attenuation of a component changes non-linearly with frequency, which is referred to as nonlinear frequency response. Common communications components such as filters, amplifiers, and mixers can lead to nonlinear frequency responses, which can cause errors in transmitting and receiving. This article outlines the design and demonstration of a static and dynamic finite impulse response (FIR) digital equalizer circuit. Using predistortion topology with a coupled feedback loop, the adaptive Least-Mean Square (LMS) algorithm was implemented. The FIR filter was simulated in MATLAB and Vivado and then implemented onto an Eclypse Z7 Field Programmable Gate Array (FPGA) evaluation board. Simulations showed that the custom RTL module gave the same frequency response that was produced in MATLAB calculations. The filter was able to dynamically equalize the frequency responses of different nonlinear boards that were used as the devices under test (DUT). Measurements showed that the equalizer was able to compensate for system distortion from 0.2 to 0.8 Nyquist frequency. The phase response remained relatively linear across the band of interest, with a group delay flatness less than 10 ns.

The data rate of the zero-power-consumption visible light communication system is limited due to the solar cell bandwidth limit. A new method has been proposed to improve the data rate of communication systems. The predistortion circuit based on the nonlinear compensation principle of the communication system is added between the transmitter and the receiver to equalize the amplitude–frequency response of the solar cell. Based on the measurement of the original amplitude–frequency response of the system, the zero-pole of the predistortion circuit is calculated, and an accurate equalization circuit is designed by using separate components to expand the 3 dB bandwidth of the system. The test results show that the 3 dB bandwidth of the visible light self-powered communication system is increased from 85 kHz to 750 kHz, and the system bandwidth is expanded by nearly 10 times.

The nonlinear power amplifier and the analogue output channel filter with nonconstant group delay add nonlinear and linear distortions to the satellite transmitted signal, respectively. Recently, there has been growing interest in using Wiener predistorters, consisting of separate nonlinear and linear components, to compensate for these distortions in the satellite downlinks. The Wiener predistorter has been shown to effectively deal with signal distortions and has lower complexity compared to other state-of-the-art methods. In this paper, we argue that fully compensating the nonconstant group-delay distortion degrades the overall performance of the Wiener predistortion systems. This is primarily due to the increased peak-to-average power ratio of the signal at the output of the linear predistorter. We show that the overall performance of the Wiener predistorter can be improved by undercompensating the group-delay distortion. We propose two optimizations to address the PAPR growth problem and show using simulations that our approach leads to significant improvement in predistortion performance. Using our Wiener predistorter, the total degradation gap to the ideal limiter channel can be reduced to merely 0.34 dB for 64-APSK modulated signals. Refereed/Peer-reviewed

In this letter, a novel digital predistortion (DPD) technique based on characteristic detection of power amplifiers (PAs) and flexible tuning box is proposed for linearizing large-scale multiple-input-multiple-output (MIMO) system. In this new method, before linearizing the digital block subarray, the PA characteristics of each transmitting chain are detected first. In this way, all PAs can be linearized dynamically without wasting computation, and the performance can be guaranteed. Experiments are carried out to verify the effectiveness of the structure, an mmWave beamforming transmitter was used for measurement and excitation with two long-term evolution (LTE) input signals of single-carrier 30 MHz and four-carrier 20 MHz. The experimental results show that the proposed technique has lower computational complexity and can achieve excellent linearization performance.

The convolutional neural network (CNN) based power amplifier (PA) model has been proven to reduce the model complexity significantly. However, due to the calculation mode of the convolutional structure, the application of the CNN-based predistortion model still faces the problem of high computational complexity. In this letter, we use one lightweight CNN to propose a modeling method of the predistorter with low computational complexity for the wideband PA. This method first decomposes the traditional two-dimensional convolution kernels into two kinds of one-dimensional convolution kernels, to create the predesigned filter layer. These two kinds of convolution kernels are used to successively construct the nonlinear terms and the cross basis function terms required by the digital predistortion (DPD) model, respectively. Then, the unnecessary connections of the fully connected structure are removed using the pruning method based on amplitudes, to further reduce the complexity. Experimental results based on 100 MHz Doherty PA show that this predistortion model can significantly reduce the computational complexity, while ensuring that the linearization effects do not deteriorate.

This brief proposes a novel digital predistortion (DPD) technique to linearize concurrent dual-band millimeter wave (mmWave) analog multibeam transmitters. Beams at the same frequency band give full play to the spatial multiplexing, so as to improve spectrum utilization. By means of detailed analysis of the system characteristics, a DPD model is proposed to effectively eliminate the distortions caused by power amplifiers (PAs) including nonlinearity, memory effect, the intermodulation distortion (IMD) between two different frequency bands, and the multibeam interference incurred in undesirable sidelobes in the main beam direction simultaneously. To validate the proposed idea, a test bench of mmWave analog multibeam transmitter utilizing Butler matrix was designed, and then it was stimulated by a concurrent dual-band signal at 26.91 GHz and 27.09 GHz, respectively. Compared with existing DPD techniques, the proposed method is suitable for compensating the distortions in dual-band analog multibeam transmitters, which has shown its great potential for the applications in future mmWave concurrent dual-band multibeam wireless communication systems.

A novel behavioral modeling technique for digital predistortion of radio frequency power amplifiers (PAs) is proposed. The proposed basis-propagating selection (BAPS) model has an advantage on complexity since its basis functions are constructed as delay or a combination of existing basis functions. The BAPS model effectively optimizes the running time complexity while maintaining the generality of a full Volterra series. A greedy search procedure is applied to select the optimal basis functions. Compared with truncated Volterra models and pruned models obtained by popular pruning techniques, the superior performance of the BAPS model, in terms of accuracy and identification stability, has been fairly justified. The linearization measurements on different types of PAs illustrate that the BAPS model can robustly outperform other models from literature while achieving a low running complexity.

In this paper, a signal-based digital predistortion (DPD) scheme is proposed for the linearization of power amplifiers (PAs) in broadcasting transmitters. The proposed DPD scheme is called the signal-based DPD to distinguish it from the conventional model-based DPD, where the motivation of the former is to synthesize the predistorted signal and that of the latter is to construct the preinverse function of the PA. Our work on this signal-based DPD scheme mainly consists of two parts: a signal-based predistorter and its identification. The signal-based predistorter is derived according to the typical fixed point approach associated with the contraction mapping theorem (CMT), and it has an online cascade structure that is constructed by reproducing offline iterations of the CMT. Identification methods are proposed by tackling the divergent output problem of the signal-based predistorter with a cascade structure. In particular, three coefficient extraction strategies, which have different complexities and different linearization results, are proposed to identify the signal-based predistorter. The experimental results verify that the proposed signal-based DPD scheme can achieve the best linearization performance compared with all the typical model-based DPD methods, including the indirect learning architecture-based DPD, direct learning architecture-based DPD, and iterative learning control-based DPD.

An analytical load--pull-based design methodology for three-stage Doherty power amplifiers (PAs) is presented and demonstrated. A compact output combiner network, together with the input phase delays, is derived directly from transistor load--pull data and the design requirements. The technique opens up a new design space for three-stage Doherty PAs with reconfigurable high-efficiency power back-off levels. The method is designed to enable high transistor power utilization by maintaining full voltage and current swings of the main and auxiliary amplifier cells. Therefore, a wide efficiency enhancement range can be achieved also with symmetrical devices. As a proof of concept, a 2.14-GHz 30-W three-stage Doherty PA with identical gallium nitride (GaN) HEMT active devices is designed, fabricated, and characterized. The prototype PA is able to linearly reproduce 20-MHz long-term evolution signals with 8.5- and 11.5-dB peak-to-average power-ratio (PAPR), providing average efficiencies of 56.6% and 46.8% at an average output power level of 36.8 and 33.8 dBm, respectively. Moreover, an average efficiency as high as 54.5% and an average output power of 36.3 dBm have been measured at an adjacent power leakage ratio of -45.7 dBc for a 100-MHz signal with 8.5 dB of PAPR, after applying digital predistortion linearization.

This brief presents a compact variable gain amplifier (VGA) with continuous time-gain compensation (TGC) for ultrasound imaging. The proposed VGA utilizes an open-loop topology and transconductance-subtraction load for compact implementation with sufficient gain range. To compensate for gain nonlinearity of VGA, this work proposes a systematic predistortion of gain-control signal to enhance an accuracy of TGC operation. The proposed VGA implemented in 180-nm CMOS process occupies 0.025 mm2, and consumes 0.96 mW for the maximum gain condition with a supply voltage of 1.8 V. A real-time continuous TGC has been illustrated in measurement. The fabricated VGA achieves a gain range of 37 dB, a gain error below 1.4 dB, and an input referred noise of 8.6 nV/√Hz for the maximum gain condition.

This article presents a novel waveform engineered sequential load modulated balanced amplifier (W-SLMBA) that uses a continuous Class-F⁻¹ control amplifier (CA) to manipulate the impedance trajectory of the balanced amplifier (BA). It is demonstrated that the use of the continuous Class-F⁻¹ CA can trigger a unique impedance load modulation mechanism by which the fundamental impedance of the BA is shaped by the varying second-harmonic load reactance of the CA. Theoretical derivations reveal that this special load modulation yields extended design space for the LMBA, in which high efficiency can be achieved over wide bandwidth and output power back-off (OPBO). A prototype operating from 1.80 to 2.75 GHz is designed following the proposed theory. The implemented LMBA achieves a measured drain efficiency (DE) of 60.2%-68.3% at saturation and 51.8%-69.0% at 8-dB OPBO. When tested with a 100-MHz long-term evolution (LTE) signal having peak-to-average power ratio (PAPR) of 8 dB, the proposed LMBA achieves 50.2%-59.1% average DE and better than -45.1-dBc adjacent channel power ratio (ACPR) across the target bandwidth after digital predistortion (DPD).

A generalized dual-input digital predistortion (DPD) methodology for supply-modulated (SM) power amplifiers (PAs) is proposed. Contrary to classical approaches, the SM and the radio frequency (RF) signals are treated as separate digital inputs to be jointly predistorted. A multi-objective optimization (MOO) strategy allows to explore the inherent PA performance tradeoffs to jointly optimize the DPD coefficients for improved power-added efficiency (PAE) and higher RF output power, yet guaranteeing a prescribed linearity performance. To avoid dealing with an unbearably high number of experimental acquisitions, MOO is here made feasible by fast simulation of an empirical surrogate model of the PA, which is progressively refined from a reduced set of iterative acquisitions. The proposed technique enables the adoption of a dynamic supply shaping function, and it automatically accounts for the signals' statistics. Eventually, the method outperforms classical SM approaches, yet using a DPD of the same order, as demonstrated by the experimental results on a gallium nitride (GaN) SM PA operating at 3.5 GHz in the presence of orthogonal-frequency-division-multiplexing (OFDM)-like high-peak-to-average power ratio (PAPR) modulated signals with 10- and 20-MHz bandwidths (BWs).

In this article, we propose a broadband fully integrated power amplifier (PA) using a waveform shaping harmonic matching network. A comprehensive theory is developed for the proposed multi-resonance harmonic matching network to derive design criteria for achieving wide bandwidth, low insertion loss, and optimum load impedances in the second- and third-harmonic frequency bands. Furthermore, it is shown that this network can be realized using a lower total inductance compared to a standard bandpass network which is an important feature in reducing chip area and fabrication cost. A fully integrated PA prototype is implemented using a 250-nm GaN-on-SiC process with 28-V supply. The PA provides 33.9-36.1,dBm output power (at 2-3,dB gain compression), 42-51% drain efficiency (DE), 38-48% power-added efficiency (PAE), and 10-12.2,dB power gain, across 4.0-6.0,GHz. The output-power 1-dB bandwidth is 3.6-5.6,GHz (44.5%). For a 64-QAM signal with 8,dB peak-to-average power ratio (PAPR) at 5.0,GHz, the PA can provide 30.2,dBm average output power and 32% average PAE with RMS error vector magnitude (EVM) of -34.0/-32.4/-28.4,dB (2.0/2.4/3.8%) for 50/100/200,MHz modulation bandwidth, without using digital predistortion (DPD). The maximum average output power and average PAE, under the linearity constraint EVM < -28,dB, are respectively 32.1/32.0/30.2,dBm and 39/38/32%, for modulation bandwidth of 50/100/200 MHz.

This article proposes a methodology to ensure linear amplification of a load modulated balanced amplifier (LMBA) while keeping the power efficiency as high as possible over a frequency band ranging from 1.8 to 2.4 GHz and where the transmitted signals can present different bandwidth (BW) configurations. The proposed reconfigurable linearization methodology consists of, in a first step, tuning some free parameters (with dependence on the signal BW and frequency of operation) of the LMBA to trade-off linearity and power efficiency. In a second step, two multipurpose adaptive digital predistortion (DPD) linearizers are considered, properly combined with crest factor reduction (CFR) techniques, to meet the required linearity specifications. Either a DPD based on artificial neural networks or a DPD based on polynomials can be selected taking into account the compromise between computational complexity and linearization performance. Experimental results will validate the proposed methodology to guarantee the linearity levels (ACPR < -45 dBc and EVM < 1%) with high power efficiency in an LMBA under dynamic transmission, where both the signal BW (from 20 and up to 200-MHz instantaneous BW) and frequency of operation (in the range of 1.8-2.4 GHz) change. This work was supported in part by the Spanish Government (Ministerio de Ciencia, Innovación y Universidades) and FEDER (Fondo Europeo de Desarrollo Regional) under Grant TEC2017-83343-C4-2-R and in part by the Generalitat de Catalunya under Grant 2017 SGR 813. This paper is an expanded version from the International Workshop on Integrated Nonlinear Microwave and Millimetre-Wave Circuits (INMMiC), Cardiff, United Kingdom, July 2020.

An under-sampling digital predistortion based on a multi-tone mixing feedback technique (MTM-DPD) is presented in this article. In contrast to the under-sampling digital predistortion (DPD) based on conventional receivers, the proposed method could simultaneously reduce the sampling rate and acquisition bandwidth using a multi-tone mixing (MTM)-based feedback channel. The MTM-DPD is implemented with an evolved direct learning architecture, where the coefficients of a predistorter are estimated based on the aliased feedback signal, preprocessed input signal, and preprocessed kernels of the DPD model. To preprocess the input signal and kernels, the behavioral model of the MTM-based feedback channel and its corresponding identification algorithm are analyzed in detailed. Experimental results show that for a gallium nitride (GaN)-based power amplifier (PA) with 40-MHz input, under the excitation of a 17 tone LO signal with frequency interval 7.68 MHz, the MTM-DPD with sampling rate 15.36 MSPS and acquisition bandwidth 15.36 MHz could improve the adjacent channel power ratio (ACPR) from -30.1 to -46.5 dBc and the error vector magnitude (EVM) from 9.13% to 1.76%. Compared with the conventional full sampling DPD (FS-DPD), the MTM-DPD could reduce the cost of analog-to-digital converters (ADCs) in feedback channel significantly while maintaining satisfactory linearization performance.

A novel memory-grouped method is proposed for digital predistortion (DPD) of power amplifiers (PAs) with constrained acquisition bandwidth (BW) and extremely low sampling rate. By grouping the basis functions with different memory delays, a two-step algorithm can reduce overfitting in the constrained-BW technique. As a result, excellent DPD performance can be achieved even when the acquisition BW is constrained to several times narrower than the BW of the original input signal. Thus, using the memory-grouped method, a very low-speed analog-to-digital converter (ADC) can be used to sample the constrained feedback signal without aliasing, significantly reducing the cost of configuring a high-speed ADC. The performance of the proposed method is compared with the existing methods in different scenarios. Experimental results show that when the feedback BW is less than the BW of the original input signal, the proposed method can still achieve good performance, while the traditional methods fail to work. The experiment results also imply that the memory-grouped method can reduce the sampling rate by more than ten times.

In this article, we propose a novel technique of digital predistortion (DPD) for dual-band power amplifiers (PAs) based on the periodically nonuniform sampling (PNS) theory. In contrast to conventional dual-band DPD (2-D-DPD) models, the proposed periodically nonuniform sampled DPD (PNS-DPD) has only a single input, which can largely reduce the model complexity. We fold the two stimuli with aliasing and feed them to a simple single-band DPD model. The desired predistorted signals are reconstructed from aliased DPD output through the PNS theory. Compared with conventional multi-input models that include numerous intermodulation products of the input signals, the complexity of the proposed single-input PNS-DPD model is hugely decreased. The model coefficients of the proposed PNS-DPD can be easily extracted with conventional direct or indirect learning architecture. We experimentally evaluate the proposed DPD on a test bench and compare it with other DPD techniques in the literature. The implementation complexity can be reduced by over 30%, and the identification complexity is also largely reduced.

Predistortion is used to compensate for a waveform or phase of a signal in advance. Although the signal that applies predistortion exhibits a nonideal shape at the baseband, it has an improved phase value after the signal is upconverted in the actual hardware. Most synthetic aperture radar studies have focused on image reconstruction using single-look complex or ground-range detected data. Other studies have only compensated for the peak phase error; thus, discontinuity remains. In this letter, we present a novel method to reduce the phase error by applying a polynomial regression predistortion based on system calibration. The new approach is formulated to minimize the overall pulse error in a signal generator. We use the second-order polynomial regression for the phase error and predistort the phase error using the regression value. The proposed method is applied to the baseband signal, which exhibits an improved phase value at the X-band (9.5-10 GHz).

In this article, a fully integrated dual-band gallium nitride (GaN) Doherty power amplifier (DPA) based on multi-resonant circuits (MRCs) is presented. A lumped T-type network in combination with the output capacitances of the main and auxiliary transistors is able to realize the quarter-wavelength transformer (QWT) in DPA, and its component values are totally decided by the operating frequency, given a certain characteristic impedance. MRCs are proposed to exhibit the required component values at two different frequencies. By replacing each component in the T-type network with an MRC, a dual-band QWT can be achieved. An integrated dual-band DPA is implemented in a commercial 0.25-μm GaN-HEMT process to validate the proposed method. The fabricated DPA shows a saturated output power of 43.8-44.7/44.4-44.8 dBm, a 6-dB back-off drain efficiency (DE) of 41%-46%/41.5%-47%, and a saturated DE of 49%-52%/56%-59% in 3.35-3.6/4.8-5.2 GHz, with a compact size of 2.8 x 3.5 mm². Applying a 100-MHz OFDM signal with a 7.8-dB peak-to-average power ratio (PAPR), an average efficiency of 37%/40% and an average power of 37/37 dBm are measured at 3.5/5.0 GHz, and the adjacent channel power ratio (ACPR) is better than -49 dBc after digital predistortion (DPD). To the best of our knowledge, the proposed DPA is the first demonstration of fully integrated dual-band GaN DPAs.

Digital predistortion (DPD) technique is an effective means to alleviate the nonlinearity of power amplifiers (PAs) and improve transmitter efficiency. However, for orthogonal frequency division multiplexing (OFDM) systems with a high peak-to-average power ratio (PAPR), the PAPR reduction needs to be deployed in combination with DPD, to maximize transmitter efficiency. The extra complexity caused by the introduction of PAPR reduction on the main road has become a non-negligible defect. To address this issue, this letter proposes a joint PAPR reduction and DPD model based on the generalized memory polynomial (GMP). To train the joint GMP model, this letter improves the ping-pong joint optimization (P2JO) approach under the offline case, to obtain accurate training data. The comparative experimental results based on 100-MHz Doherty PA show that the proposed joint model significantly reduces the model complexity on the main road, while ensuring adjacent channel power ratio (ACPR) and bit error rate (BER).

A band-limited magnitude-selective affine (MSA) function-based model is proposed for digital predistortion (DPD) of broadband power amplifiers (PAs) in 5G millimeter-wave frequency band. The new model is derived from the band-limited canonical piecewise linear function-based model by employing MSA functions, which can obviously reduce the number of multiplication operations and the model complexity. Experimental results show that the proposed model gives better normalized mean square error and DPD performance in comparison with some existing models when a broadband PA is excited by a 5G new radio (NR) signal of 400-MHz bandwidth at 28-GHz band.

We propose a new method to tackle the predistortion problem for the hybrid beamforming structure of Millimeter-Wave (MM-Wave) Massive MIMO in 5G communication systems in order to widen the linearized angle of beams without any requirement or retuning on the nonlinearities of power amplifiers (PA). The new method adopts one common Digital Predistortion (DPD) block per subarray followed by a post-weighting block, and the predistorted signals are re-distributed to different subarrays to form a pattern to compensate for the distortions in different directions simultaneously. Two implementations with low complexity are introduced in this paper.

In wireless networks, for the common in-phase and quadrature-phase ( I / Q ) imbalance in the transmitters, the I / Q branch models of digital predistortion (DPD) need to be identified separately, to improve the linearization effects. The existing order reduction methods of the predistorter are based on the contributions of the complex basis function terms, so as not to deal with the different contributions of I / Q components of the complex basis function terms caused by the separate identification of the I / Q branch models. The separate pruning of the I / Q branch models will increase the complexity. Aiming at this issue, this paper proposes a general order reduction method based on the attention mechanism for the predistortion of the power amplifiers (PAs). This method is suitable for pruning both the traditional models and neural network-based models. In this method, the attention mechanism is used to evaluate the contributions of the real basis function terms to the predistorted output’s I / Q components through offline training, and the influence of the cross terms of the I / Q branch models is considered. The experimental results based on the comparison with other typical methods under 100 MHz Doherty PA and different I / Q imbalance levels show that this method has superior pruning performance and good linearization ability.

To reduce the demand for frequently adjusting phase shifts in the fifth-generation (5G) multiple-input multiple-output (MIMO) beamforming transmitters, in this article, a novel digital predistortion (DPD) technique is proposed, which employs multiple predistortion boxes to shape the pattern of nonlinear distortions in space in order to linearize multiple targets simultaneously. By using this approach, the linearization angle is widened and thus the communication quality can be kept when the user moves off the main beam direction. As a proof of concept, two DPD boxes, namely main and auxiliary boxes, are used to realize the 2-target linearization. A new model extraction method is also proposed with a dedicated over-the-air (OTA) feedback post-processing stage. Simulation and experiment are demonstrated on a 4-path beamforming transmitter. The results show that the proposed DPD method can effectively widen the linearization angle with reasonable additional complexity.

To exploit the limited communication resources, the real-time carrier frequency of the power amplifier (PA) may hop, which will result in rapid change in PA’s nonlinear behavior and bring huge challenge to make the digital predistortion (DPD) response in a timely manner. Different from the conventional methods that attempt to shorten the DPD updating time, a novel scheme of controlling its nonlinear variation is proposed. By analyzing PA’s various behaviors using graph model and extracting a directed graph to navigate its power adjustments, the variation in nonlinear behavior induced by hopping carrier frequency can be effectively compensated, which will mitigate the DPD performance deterioration when there is not enough time for DPD update. Finally, the proposed method was validated by experiments on a 100-MHz modulated signal stimulated millimeter-wave (mmWave) PA operating at five hopping carrier frequencies from 26.4 to 28 GHz, with the step of 400 MHz.

Advanced communication technologies like 5G focuses on the wideband signals and high data rate. The quality of wideband signal transmission deteriorates due to the nonlinear characteristics of the power amplifiers (PA). The digital predistortion (DPD) method reduces the distortion and spectrum regrowth, but the sampling speed of the converters restricts its operation to support 5 to 7 times the signal bandwidth. The analog predistortion (APD) method is not limited by the bandwidth of the distorted signal, but its linearization performance is inferior to the DPD. This paper presents an adaptive dual-input APD that establishes the benefit of digital control over the variable parameters to linearize the wideband signals. For the LTE signal with a bandwidth of 20 MHz and RF frequency of 3.5 GHz, the proposed method achieves an ACPR improvement of 24.01 dB. For another LTE-A signal with 100 MHz bandwidth, the proposed linearizer achieves an ACPR improvement of 9.2 dB and 15.7 dB over PA with and without conventional APD. Though the predistorter (PD) is designed for 3.5 GHz, it is reported that due to the wideband operation of APD, digital adaptation allows satisfactory performance for carrier frequency from 2 to 4 GHz.

A novel architecture of a digital modulated polar phased-array transmitter with phase modulation (PM) phase-shifting and feed-forward controlled dynamic matching (FFCDM) is presented in this article. Phase-shifting in a PM signal path is utilized in each element, which shares many components including a phase modulator, baseband, and IF components. The characteristics of the proposed architecture are analyzed. With a constant envelope of PM signals, the implicit nonlinearity of the phase shifter in this architecture has low impact on the linearity performance of a phased-array system. Meanwhile, low phase error can be achieved by high-resolution phase interpolation with the digital predistortion (DPD) technique. Efficiency for both saturated and 6-dB back-off power is enhanced by digital power amplifier (DPA) with FFCDM. As a proof of concept, a 3–7 GHz 4-element phased-array transmitter is designed and fabricated in 40-nm CMOS based on the proposed method. The measured root-mean-square (rms) phase error of 0.3°, effective phase shifting resolution of 9-bit, and peak system efficiency of 38.2% are achieved. For 40 MHz 64-QAM modulation signal, it exhibits EVM of 5.38% and 5.37%, $P_{\text {out}}$ of 14.30 and 14.46 dBm, and PAPR of 7.08 and 6.97 at 3.5 and 5.2 GHz, respectively. The measured peak EIRP is 35.6 dBm with a unit antenna gain of 2.98 dBi at 5 GHz. The radiation patterns with 0°, 15°, 30°, and 45° steering are measured based on monopole antennas. Meanwhile, the array achieves < 4.7% and < 5.9% EVM for 64-QAM signals with bandwidths of 20 and 40 MHz, respectively.

This article proposes a multi-mode wireless transmitter for full-duplex (FD) and half-duplex (HD) operation based on a quadrature balanced switched-capacitor power amplifier (QB-SCPA) architecture in 65 nm CMOS. The QB-SCPA provides inherent passive transmit–receive (TX–RX) isolation along with an embedded digital self-interference cancellation (SIC) signal injection mechanism and exhibits excellent TX and RX linearity characteristics. To minimize noise figure degradation to the RX path, local oscillator (LO) signal sharing between the two SCPAs comprising the transmitter and a retiming circuit that generates the 25% clock signals is employed to obtain phase noise suppression at the LNA port. In the FD mode, 50 dB of SIC is demonstrated across the instantaneous bandwidth of a 20 MHz orthogonal frequency-division multiplexing (OFDM) signal with 11 dB peak-to-average power ratio (PAPR), along with −35 dB TX error vector magnitude (EVM) with SIC ON and without digital predistortion. The transmitter achieves a maximum output power of 23 dBm with 26.5% power-added efficiency (PAE) and 21 dBm with 17.4% PAE in HDTX and FD modes, respectively, and has a wide operating bandwidth between 1.5 and 3 GHz.

Artificial neural networks (ANNs) are information processing systems, with their design inspired by studies of the ability of the human brain to learn from observations and generalize by abstraction. Researchers have investigated a variety of important applications utilizing the ability of ANNs to perform the modeling and optimization of microwave components and circuits, such as high-speed very large-scale integration (VLSI) interconnects [1]-[3], spiral inductors [4], microwave field-effect transistors (FETs) [5], [6], heterojunction bipolar transistors [7], [8], high-electron mobility transistors [9], [10], filters [11]-[14], power amplifiers [15]-[17], oscillators [18], transmitters [19], receivers [20], digital predistortion [21], microelectromechanical systems [22], wireless power transfer [23], and multiphysics design [24], [25].

This article presents the architecture and design methodology for a new type of dual-band Doherty power amplifier (DB-DPA), referred to as 3-Way DB-DPA, which consists of a main amplifier for each band and an auxiliary amplifier handling both bands. The 3-Way DB-DPA improves the average drain efficiency in concurrent dual-band operation compared to the traditional 2-Way DB-DPA, by avoiding early clipping in the main amplifiers, while benefiting from load—pulling from the auxiliary power amplifier (PA). This improvement is verified in theory and simulation at the current-source reference planes and in measurement with a fabricated 1.5- and 2-GHz dual-band PA. A statistical analysis using 2-D continuous-wave (CW) signals with long-term evolution (LTE) probability distribution functions (PDFs) is performed and demonstrated an improvement in the concurrent average efficiency by 15 percentage points compared to the conventional 2-Way DB-DPA. In nonconcurrent operation, the measured CW drain efficiency in the lower band (1.5 GHz) is 82.8% at peak and 66.6% at 9.6-dB backoff, and the measured CW drain efficiency in the upper band (2.0 GHz) is 70.0% at peak and 48.4% at 9.4-dB backoff. The CW concurrent-balanced drain efficiency reaches 66.2/52.0% in the 3-Way DB-DPA at 3-/6-dB backoff. In single-band operation at 1.5/2.0 GHz, the average power and average drain efficiency after linearization by digital predistortion (DPD) are 35.1/37.4 dBm and 65.0/53.7%, respectively, for an LTE signal with 10-MHz bandwidth and 6.1-dB peak-to-average power ratio (PAPR). In concurrent operation, the 3-Way DB-DPA is driven by two 10-MHz LTE uncorrelated signals at 1.5 GHz with 6.86-dB PAPR and at 2.0 GHz with 6.26-dB PAPR, and the average total power and average concurrent drain efficiency after DPD are 37.5 dBm and 54.24%, respectively.

In this article, we propose a new behavioral modeling approach, called boosted model tree, to characterize and compensate for the complex nonlinear distortions induced by wideband high-efficiency radio frequency power amplifiers. With the proposed model, the input data are classified into different zones by decision trees and each zone is assigned separate submodels. We also employ a model boosting technique to build multiple parallel tree structures that jointly model the desired nonlinear behavior. By designing dedicated optimization procedures, both tree structures and submodel coefficients can be efficiently identified. It is demonstrated that the combination of piecewise and parallel structures provides a powerful and hardware-efficient way to model nonlinear memory effect and cross terms. Based on the experimental results, the proposed method can achieve improved linearization performance with low hardware complexity under challenging wideband predistortion scenarios.

The first-order (FO) perturbation theory-based nonlinearity compensation (PB-NLC) technique has been widely investigated to combat the detrimental effects of the intra-channel Kerr nonlinearity in polarization-multiplexed (Pol-Mux) optical fiber communication systems. However, the NLC performance of the FO-PB-NLC technique is significantly limited in highly nonlinear regimes of the Pol-Mux long-haul optical transmission systems. In this paper, we extend the FO theory to second-order (SO) to improve the NLC performance. This technique is referred to as the SO-PB-NLC. A detailed theoretical analysis is performed to derive the SO perturbative field for a Pol-Mux optical transmission system. Following that, we investigate a few simplifying assumptions to reduce the implementation complexity of the SO-PB-NLC technique. The numerical simulations for a single-channel system show that the SO-PB-NLC technique provides an improved bit-error-rate performance and increases the transmission reach, in comparison with the FO-PB-NLC technique. The complexity analysis demonstrates that the proposed SO-PB-NLC technique has a reduced computational complexity when compared to the digital back-propagation with one step per span.

Conventional digital predistortion (DPD) techniques are facing the challenge of complexity in the fifth generation (5G) and beyond concurrent dual-band terminal transmitters. This article proposes novel low-complexity behavior models for the DPD of terminal power amplifiers (PAs). Derived from the conventional memory polynomial (MP) model, the new models utilize magnitude-selective affine (MSA) functions as nonlinear basis functions to greatly decrease the model complexity. The proposed paralleled envelope indexed 2-D MSA (PI-2-D-MSA) model and combined envelope indexed 2-D MSA (CI-2-D-MSA) model take both the in-band intermodulation and cross-band modulation into account and can well compensate for nonlinear distortion in dual-band terminal PAs. Moreover, the proposed models are extended to nonuniform sampling rate (NSR) scenarios, where the aliasing effect for the low sampling rate band is analyzed. Simulations and experimental measurements under the uniform sampling rate and the NSR scenarios were carried out on a 1.7–2.8-GHz wideband Doherty PA and a 4.4–5.0-GHz class-AB terminal PA and demonstrated the linearization performances of the proposed models. The total numbers of floating-point operations (FLOPs) of the PI-2-D-MSA and the CI-2-D-MSA models were 11% and 8% of that of the prior 2-D-MP model, respectively. Even though their linearization accuracy deteriorated, the relaxed linearization standard for terminal transmitters can still be achieved.

Neural network (NN)-based models are perceived as being accurate models for power amplifier (PA) behavioral modeling and digital predistortion (DPD) applications. However, the complexity of NN’s models in terms of the number of coefficients increases with the memory depth, nonlinearity order, signal bandwidth, and the number of carriers. In this article, a novel augmented convolutional neural network (ACNN)-based DPD is proposed to linearize the concurrent multiband PAs. In the ACNN model, the convolution layer with a fully connected layer serves to model the intermodulation distortion (IMD), cross-modulation distortion (CMD), and nonlinearities of the concurrent multiband PA. The pooling layer in the ACNN reduces the model’s complexity. The measurement results show that the proposed DPD requires significantly fewer coefficients and floating-point operations (FLOPs) than the state-of-the-art DPDs. This model’s complexity reduction arises with the number of carriers in the multiband aggregated signal. The measurement results also show that the proposed DPD has a better linearization performance in terms of metrics, such as normalized mean square error (NMSE), adjacent channel power ratio (ACPR), and error vector magnitude (EVM).

In this letter, a novel approach is proposed for digital predistortion (DPD) with direct learning architecture (DLA). Regression of a Volterra behavioral model requires the pseudoinverse of a matrix, which needs many resources due to the inverse operation when the Moore–Penrose pseudoinverse is used. This work substitutes the pseudoinverse calculation by a polynomial expansion (PE) method to obtain a polynomial expansion direct learning architecture (PE-DLA), which attains a pseudoinverse in an iterative fashion avoiding the inverse operation and consequently reducing the algorithm computational complexity. Experimental results show that the number of iterations in the PE-DLA affects the convergence speed. The proposal is benchmarked against other state-of-the-art approaches such as the classic DLA and the covariance matrix DLA (CM-DLA) in the DPD of a commercial class AB power amplifier, concluding that the linearization performance of the current proposal is equivalent to others while featuring simple operations.

The multi-band and spectrally flexible transmission requires a wideband transmitter system to cover a wider frequency band of interest. A wideband power amplifier (PA) is required to achieve the desired signal strength for covering long-distance communication. Due to PA’s nonlinear characteristics, spectral growth and harmonics occur, which may cause interference with the other band of interest. This paper presents a linearization technique, denoted as baseband fusion technique (BFT), for the wideband filter-less transmission system. The proposed method simultaneously reduces the spectral growth around the fundamental frequency and cancels out harmonics. The presented technique uses the signal cancellation approach in baseband and avoids modeling as required in digital predistortion. This method may eliminate the need for bulky filters to suppress harmonics. The proposed method has much lower complexity in digital signal processor resources than the Volterra-based models and their derivatives. We have experimentally tested with long-term-evolution (LTE), four-tone, and 256-QAM signal to validate the proposed method. This method can also be useful for cognitive radios where PA’s unwanted emission interferes with the other user transmission.

Digital predistortion (DPD) is used to compensate for the distortion of power amplifiers (PAs). Inspired by the physical structure of the PA circuit, a feedback structure in the DPD model is favored. In this letter, we proposed an infinite impulse response (IIR) model for PA modeling and linearization, by modifying a generalized memory polynomial (GMP) model. We also propose an iterative identification algorithm to estimate the IIR-DPD coefficients. The experimental results shows that the proposed IIR-GMP model can improve linearization performance compared with the conventional methods.

Digital predistortion (DPD) of broadband power amplifiers (PAs) requires a large number of parameters to compensate for the severe nonlinear distortion, which may cause considerable computational complexity in the DPD parameter identification process. To solve this problem, we proposed a novel signed orthogonal regressor algorithm (SORA) to simplify the identification of DPD parameters. Based on the signed regressor algorithm and principal component analysis (PCA), the proposed algorithm can eliminate most of the multiplication operations in the identification process and greatly reduce the computational complexity. Furthermore, the proposed SORA is modified to be able to estimate each parameter independently. Experimental results show that compared with the conventional PCA-based method, the proposed two methods can realize comparable linearization performance with significantly lower computational complexity.

In this paper, a novel multi-stream spatial digital predistortion (DPD) technique is proposed to model and linearize the fully-connected (FC) hybrid beamforming (HBF) transmitters. The proposed scheme solves the DPD implementation issue in the FC HBF array by estimating and linearizing the beam signals instead of the individual PAs. In FC HBF systems, significant intermodulation (IMD) between different transmit signals will be generated due to the analog beamforming and combining network upstream of the power amplifiers (PAs). The IMD beams will end up being radiated in different directions and some of them might fall in the linear beam directions. Therefore, multi-input DPD blocks using a practical multi-variable model are constructed for each RF chain to eliminate the complicated inner- and cross-channel IMDs of the beam signals. Simulations on a 4-stream 64-element FC HBF array and experimental tests on a 2-stream 4-element system are carried out to benchmark the proposed DPD technique against the conventional techniques. Better than 13 dB adjacent channel power ratio (ACPR) improvement and 12 dB normalized mean square error (NMSE) improvement have been achieved by the proposed DPD technique.

This paper proposes that a radio frequency power amplifier is suitable for a 5G millimeter wave. It adopts a three-stage single-ended structure at 28GHz. An analog predistortion linearization method is used to improve the linearity of the power amplifier (PA). As a result, there is a significant improvement in power-added efficiency (PAE) and linearity is achieved. The Ka-band PA is implemented in TSMC 65nm CMOS process. At 1.2V supply voltage, the PA proposed in this paper achieves a saturated output power of 15.9dBm and a PAE of 16%. After linearization, the output power at the 1dB compression point is increased by 2dBm, with efficient gain compensation performance.

This article proposes a new and compact symmetrical Doherty power amplifier (DPA) configuration that provides extended output-back-off (OBO) and enhanced load modulation. The concept of active harmonic control (AHC) is introduced to remedy the reduced-conduction-angle operation of the class-C auxiliary device, providing enhanced auxiliary current and power capability. Semianalytical study based on generalized load-modulation theory and large-signal simulation reveal that an optimal AHC can offer increased peak current ratio, improved load modulation, boosted output power, and power utilization factor (PUF). Besides, a new output combiner, with the inclusion of parasitic effect, is devised for ultracompactness and simplicity. For verification, a 11-dB-OBO 2-GHz symmetrical DPA based on GaN HEMT transistors is designed, fabricated, and measured. Excellent performance with drain efficiency of 74% (52%) is obtained at saturation (back-off of 11 dB). Moreover, a saturation power of 42.98 dBm is achieved, corresponding to an uplifted PUF of 1.25 (compared with conventional symmetrical DPA design). Under 20-MHz modulated signal (peak-to-average power ratio of 11 dB) excitation, the prototype exhibits average efficiency of 53.2% at an average output power of 32 dBm. The adjacent channel leakage power ratio (ACLR) is found to be −27.5 and −50.9 dBc before and after digital predistortion, respectively.

RF photonic components suffer from poor spurious-free dynamic range (SFDR) due to the high noise and distortion generated by a silicon photonic (SiP) Mach–Zehnder modulator (MZM). This work demonstrates a distributed silicon–germanium (SiGe) heterojunction bipolar transistor (HBT)-based low-noise amplifier (LNA) co-designed for linearization with a SiP MZM for a broadband radio-over-fiber (RoF) link. The SiGe LNA incorporates a distributed, tunable predistortion scheme that is inherently wideband and improves the third-order intercept point over an 18-GHz range. The assembled SiGe LNA and SiP MZM prototype demonstrates an SFDR as high as 120 ${\mathrm{ dB}}\cdot {\mathrm{ Hz}}^{2/3}$ at 9 GHz, a 14-dB improvement over previous SiP RF components or RoF links.

This article presents a fully integrated distributed efficient power amplifier (DEPA) for fifth-generation (5G) massive multiple-input multiple-output (MIMO) applications. In conventional DEPA, an individual input matching network (IMN), power splitter, and phase compensation line are used for each auxiliary power amplifier (PA) unit, resulting in a large overall size. To facilitate integration, an energy-efficient and compact DEPA with modified input matching and power splitting network is proposed, where a distributed input matching network (DIMN) is used for the auxiliary PA. A broadband input matching, reasonable power splitting, and phase alignment can be achieved simultaneously by adjusting the dimensions of gate transmission lines (TLs) between different auxiliary PA units. An integrated DEPA is implemented in a commercial 0.25- $\mu \text{m}$ GaN-HEMT process to validate the proposed architecture. The fabricated DEPA shows a saturated output power of 40.4–41.7 dBm, an 8-dB back-off drain efficiency (DE) of 35%–50%, and a saturated DE of 46%–56% from 3.2 to 5.2 GHz, with a compact size of $3.4\times3.0$ mm2. Applying a 100-MHz orthogonal frequency division multiplexing (OFDM) signal with a 7.8-dB peak-to-average power ratio (PAPR), an average efficiency of 35.7%–47% is measured over the entire bandwidth, and the adjacent channel power ratio (ACPR) is better than −46 dBc after digital predistortion (DPD). To the best of our knowledge, the proposed DEPA demonstrates the widest bandwidth among all reported fully integrated back-off efficient PAs without using digital techniques or reconfiguration.

The noise is an inherent part of a transceiver system, which becomes more severe on low‐cost systems. The power amplifier (PA) further enhances this noise and the signal to be propagated to the receiver. The conventional approach of digital predistortion (DPD) assumes an ideal transceiver system while extracting data for the predistortion function generation. As a result, performance limitation arises due to residual signal–noise interaction. This study presents the accuracy and implementation issues of DPD on a low‐cost transceiver having lower bit resolution in the presence of transceiver noise. Different model architectures, as well as processing algorithms, are compared in terms of numerical stability of the solution (condition number of observation matrix), efficient field‐programmable gate array (FPGA) implementation (dispersion of coefficients, in‐band model performance (normalised mean square error), and out‐of‐band model performance (adjacent channel power ratio). The simulation results are tested on FPGA and direct conversion transceiver‐based platform using PA. A long‐term evolution signal with 64 quadrature amplitude modulation is used for performance evaluation. The suitability of the various polynomial models for fixed‐point implementation and the required memory size for implementing the DPD model is further established.

This brief presents the measurement/modeling of a dual-input outphasing Chireix power amplifier (PA) for the analysis of nonlinear and memory effects behavior when excited with modulated signals. Moreover, we formulate a cubic-spline (CS) memory model with a closed-loop for the digital predistortion (DPD) linearization algorithm. An FPGA system has been developed to automate the outphasing angles and their respective asymmetrical incident power levels applied at the Class-F PAs of the Chireix under test. Based on experimental results, the CS model offers a DPD with a normalized mean square error (NMSE) of −21.87 dB, and −52.47 dB for a WCDMA 5-MHz and an LTE-A 10-MHz with −26.84 dB and −43.91 dB in extraction and prediction, respectively. An output power improvement of −43.5 dBc in adjacent channel power ratio (ACPR) with 9.3 dB PAPR yield 50% average efficiency enhance at 2 GHz, is achieved.

This letter proposes a uniformly distributed near-field (NF) probing array (NFPA) capable of generating feedback signals suitable for monitoring and improving the performance of a 5G millimeter-wave (mm-wave) beamforming transmitter. The proposed NFPA configuration is carefully designed to ensure comparable coupling ratios between the individual RF chain outputs and the closest NF probes, across a wide frequency range. This maximizes the quality of the feedback signal available to perform array calibration and digital predistortion (DPD) when using realistic 5G modulated signals. A 16-element 27–30-GHz beamforming transmitter is designed and serves as the proof-of-concept prototype. Using a four-element NFPA, the 16 RF chains are calibrated using a 400-MHz modulated signal—achieving less than 0.27 dB and 2.8° root-mean-square (RMS) magnitude and phase calibration errors, respectively. Furthermore, a DPD engine trained using the NFPA-based feedback signal improves the over-the-air transmitted signal’s adjacent channel power ratio (ACPR) and error vector magnitude (EVM) from 30 dB and 8.8% to 39 dB and 2.5%, respectively. The DPD also allowed for an increase of the effective isotropic radiated power (EIRP) from 27.5 to 33 dBm while staying below the maximum EVM of 3.5%.