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This dissertation focuses on low-power, energy-efficient RF wireless communication designs to be used within miniaturized millimeter-scale systems. There are several challenges to be overcome. First, the antennae within in the constrained dimensions of a miniaturized system have limited radiation efficiency and difficulty in matching because of their electrically small nature. Second, the battery capacity and driving ability are limited by the millimeter-scale size, which requires the radio system to be an energy-efficient and low-power design. Third, the high-power or large size off-chip components such as the high performance >1MHz crystal oscillator or >1mF super cap also challenge the size and power constraints. This dissertation analyzed these challenges and proposed a new circuit architecture and system design to solve them. Two prototypes of the proposed RF system were implemented for evaluation and verification. The first work is a 1.3uW, 2.7GHz back-scatter transceiver for an active, battery-powered, light-energy-harvesting mm-scale sensor with an integrated 2.1×4mm planar antenna. The fully stand-alone 1×2.1×4mm3 sensor node including radio chip, processor, antenna battery, and light harvester can communicate with the gateway at a distance of 3.5m. The second work is a 1.6mW narrow-band, PLL-less quasi-coherent 1.6mW RF transmitter. It employs a polar-coded differential (D)BPSK modulation, a self-optimizing flicker-noise reduced LO, and an automatic impedance matching PA with a 7×7×12mm co-designed antenna to improve transmission distance. The work in this dissertation shows the feasibility of low-power, mm-size, fully stand-alone systems in wireless communication, which can be applied in various areas of emerging IOT applications.

The growth of cellular and wireless communications over the last two decades has led to unprecedented congestion of the radio frequency (RF) spectrum. New frequency bands and bandwidth allocations are constantly being opened up to alleviate this congestion, but the demand for wireless data is increasing faster than spectrum availability. Despite fundamental hardware limitations, the complex and rapidly changing wireless environment necessitates three key requirements for RF transmitter: frequency-agility, capability of transmitting complex modulation schemes, and power efficiency.In this work, a four-way outphasing architecture is developed for the generation of complex modulated waveforms across a wide RF frequency range. This proposed architecture offers an ACLR improvement equivalent to a 2-bit phase resolution increase compared to traditional two-way outphasing architectures. In addition, this architecture is more resilient to PA amplitude and timing mismatch.This architecture is implemented in DARPA's Diverse Accessible Heterogeneous Integration (DAHI) process technology, featuring the heterogeneous integration of 45nm CMOS SOI and 0.2 μm GaN process technologies. The fabricated transmitter achieves greater than 33 dBm output power and a peak transmitter efficiency of greater than 41%.

Integration is driving today's cellular phone industry to create single chip cellphone systems. With the integration of Radio Frequency Transmitters into CMOS technology, robust circuits are needed that can scale with new technologies. This thesis explores the challenges of designing a CMOS RF Driver Amplifier capable of outputting +10dBm of power while meeting strict WCDMA cellphone standards. The driver amplifier (DA) is a 2.5V two-stage amplifier consisting of two on-chip inductors and a gain of greater than 20dB. The driver amplifier was had an Adjacent Channel Leakage Ratio (ACLR) of -37dBm and -47dBm at 5MHz and 10MHz respectively. Less than 30mA of current was consumed from a 2.5V power supply leading to an efficiency of 14.0%. The driver amplifier noise seen in the receive band 190MHz away was -155dBm/Hz. With strict noise constraints, future work will eliminate the need for the off SAW chip filter that is utilized between the driver amplifier and the power amplifier to reduce driver amplifier noise contribution.

A sensor node 'AccuMicroMotion' is proposed that has the ability to detect motion in 6 degrees of freedom for the application of physiological activity monitoring. It is expected to be light weight, low power, small and cheap. The sensor node may collect and transmit 3 axes of acceleration and 3 axes of angular rotation signals from MEMS transducers wirelessly to a nearby base station while attached to or implanted in human body. This dissertation proposes a wireless electronic system-on-a-single-chip to implement the sensor in a traditional CMOS process. The system is low power and may operate 50 hours from a single coin cell battery. A CMOS readout circuit, an analog to digital converter and a wireless transmitter is designed to implement the proposed system. In the architecture of the 'AccuMicroMotion' system, the readout circuit uses chopper stabilization technique and can resolve DC to 1 KHz and 200 nV signals from MEMS transducers. The base band signal is digitized using a 10-bit successive approximation register analog to digital converter. Digitized outputs from up to nine transducers can be combined in a parallel to serial converter for transmission by a 900 MHz RF transmitter that operates in amplitude shift keying modulation technique. The transmitter delivers a 2.2 mW power to a 50 Ù antenna. The system consumes an average current of 4.8 mA from a 3V supply when 6 sensors are in operation and provides an overall 60 dB dynamic range. Furthermore, in this dissertation, a methodology is developed that applies accelerated electrical stress on MOS devices to extract BSIM3 models and RF parameters through measurements to perform comprehensive study, analysis and modeling of several analog and RF circuits under hot carrier and breakdown degradation.