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Today, intelligent image sensors require the integration in the focal plane (or near the focal plane) of complex algorithms for image processing. Such devices must meet the constraints related to the quality of acquired images, speed and performance of embedded processing, as well as low power consumption. To achieve these objectives, analog pre-processing are essential, on the one hand, to improve the quality of the images making them usable whatever the light conditions, and secondly, to detect regions of interest (ROIs) to limit the amount of pixels to be transmitted to a digital processor performing the high-level processing such as feature extraction for pattern recognition. To show that it is possible to implement analog pre-processing in the focal plane, we have designed and implemented in 130nm CMOS technology, a test circuit with groups of 4, 16 and 144 pixels, each incorporating analog average calculations.