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Burn-in is the preconditioning of assemblies and the accelerated power-on tests performed on equipment subject to temperature, vibration, voltage, radiation, load, corrosion, and humidity. Burn-in techniques are widely applied to integrated circuits (IC) to enhance the component and system reliability. However, reliability prediction by burn-in at the component level, such as the one using the military (e.g., MIL-STD-280A, 756B, 217E [23–25]) and the industrial standards (e.g., the JEDEC standards), is usually not consistent with the field observations. Here, we propose system burn-in, which can remove many of the residual defects left from component and subsystem burn-in (Chien and Kuo [6]). A nonparametric model is considered because 1) the system configuration is usually very complicated, 2) the components in the system have different failure mechanisms, and 3) there is no good model for modeling incompatibility among components and subsystems (Chien and Kuo [5]; Kuo [16]). Since the cost of testing a system is high and, thus, only small samples are available, a Bayesian nonparametric approach is proposed to determine the system burn-in time. A case study using the proposed approach on MCM ASIC's shows that our model can be applied in the cases where 1) the tests and the samples are expensive, and 2) the records of previous generation of the products can provide information on the failure rate of the system under investigation. © 1997 John Wiley & Sons, Inc. Naval Research Logistics 44: 655–671, 1997

The Kaplan-Meier estimation (KME) (1958) is a popular nonparametric method in analyzing the survival data. Efron (1967) proposes a re-distribution-to-the-right algorithm for right censored data, which can also be re-distributed from right to left by a method of Dinse (1985). We extend the above approaches to include the left censored data and other incomplete observations. Comparisons are made for the three methods: the KME, and the re-distributions by Efron and by Dinse.

With the introduction of ultra-thin gate oxides (GOXs) and low-k dielectrics into IC manufacturing, some new dielectric failure mechanisms arisen. These changes make the evaluations of dielectric reliability more complex. We propose a new method to accurately define the dielectric intrinsic breakdown specification (Spec) of V-ramp (Voltage ramp) tests. Base on the physical failure process and statistical correlation between V-ramp and TDDB (Time Dependent Dielectric Breakdown) tests, the applicability of our proposed method can be further extended to ultra-thin GOX and low-k dielectrics. A quicker and more accurate judgment on dielectric reliability can be achieved by using our method to better assess dielectric reliability risk.