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AbstractIn this work, the structure and the oxidation resistance of Zn deposited Cu and brass metallic components are examined. The deposition was accomplished with pack cementation chemical deposition. The examination of the samples was performed with electron microscopy and X-ray diffraction analysis. It was found that coatings on Cu substrate consist of two layers with different Zn concentrations, while coatings on brass were single layered with almost constant Zn concentration. The presence of distinct Zn–Cu phases was revealed in both cases. The subjection of the as coated samples together with the uncoated substrates in air at 400°C showed that both Zn coated samples have enhanced resistivity in such atmospheres, as most of the coating remained mostly unoxidised, and the substrates were fully protected. On the contrary, the bare substrates appear to have undergone severe damage as brittle oxides were formed on their surface.

In this work, the structure and the oxidation resistance of Zn deposited Cu and brass metallic components are examined. The deposition was accomplished with pack cementation chemical deposition. The examination of the samples was performed with electron microscopy and X-ray diffraction analysis. It was found that coatings on Cu substrate consist of two layers with different Zn concentrations, while coatings on brass were single layered with almost constant Zn concentration. The presence of distinct Zn–Cu phases was revealed in both cases. The subjection of the as coated samples together with the uncoated substrates in air at 400°C showed that both Zn coated samples have enhanced resistivity in such atmospheres, as most of the coating remained mostly unoxidised, and the substrates were fully protected. On the contrary, the bare substrates appear to have undergone severe damage as brittle oxides were formed on their surface.

Multivariate statistical procedures for developing two inferential models concerning the operation of batch reactors are presented. A linear statistical model, based upon Multi-way Projection to Latent Structures, is first developed for the estimation of the initial process conditions using only a few on-line process samples collected, at an early stage of the polymerisation. The second model, based upon classical PLS, provides predictions of the final polymer properties using only the initial conditions of the batch operation. Issues associated with the application of the proposed technique to batch reactors is also discussed. Finally the developments are applied to a comprehensive batch methyl-methacrylate (MMA) polymerisation reactor simulation.

The development of problem-oriented hardware has become a possibility as a result of current technological advances. New machine architectures can now be defined, reflecting the high performance requirements which are set by specific application areas. Large-scale discrete time simulation is a problem area which demands high-speed processing, especially within the realm of real-time applications. The natural parallelism which characterizes many real-life dynamic systems and remains unexploited in the environment of uniprocessor machines, points decisively towards multiprocessor structures. Although the process-oriented simulation languages have proved very effective in accommodating this kind of parallelism in the corresponding simulation programs, their execution in the uniprocessor machines reverts the situation back to the unhappy reality of serial execution of otherwise independent tasks. SIMULA-67 is a process-oriented language specifically designed for advanced and complex software simulation products. The process structure of SIMULA allows for the definition of concurrent tasks within a SIMULA program which can be executed in parallel within the environment of a multiprocessor system. The analysis and the basic software architectural scheme for a parallel SIMULA machine (PSM) have already been reported by the authors in a previous paper. In the present paper a hardware organization of a PSM is presented. A system architecture is explored which is conceived so as to implement efficiently the execution algorithm (process co-ordination and synchronization algorithm) which has been outlined by the authors in previous papers. The architecture is based upon the master/slave system topology. It incorporates a central controller microprocessor and a number of satellite microprocessors. The interconnection circuitry between the microprocessor and a number of satellite microprocessors. The interconnection circuitry between the microprocessor modules involves a time-sharing system bus and various programmable interrupt control units. Common and private memory modules reside in the system, and DMA transfers are employed to alleviate the controllers workload. The time operational features of the parallel SIMULA machine are also described.