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An experimental method is presented for the direct measurement of the built-in electric field in Si/GexSi1–x/Si heterojunction bipolar transistors (HBT) with a linearly-graded Ge profile. The method is based on a comparison of the DC and AC characteristics of Si/GexSi1–x/Si HBTs and reference Si bipolar transistors with the same geometry and doping profiles. The built-in field is determined independently of the density of states, minority-carrier mobility, and heavy-doping effects.

A channel hot carrier current and the failure rate of n- and p-channel MOS transistors are both increased by one to two orders of magnitude by forward biasing the substrate or source p/n junction. Correlations with the hydrogen-bond-breaking theory give a threshold kinetic energy of 3.06 ± 0.05 eV for interface trap generation by hot carriers.

A linear reduction of the drain current and a rise in the threshold gate voltage with increasing body current from electron-hole recombination at interface traps has been demonstrated in submicron low-voltage n-channel silicon MOS transistors stressed by channel hot electrons. A linear-superlinear-linear rise of the subthreshold swing is also observed.