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A 12-nm HfO2/ZrO2 superlattice (SL-HZO) ferroelectric fin field-effect transistor (Fe-FinFET) with a 1-nm AlON interfacial layer (IL) was presented as a first demonstration for memory device applications. Compared to conventional HZO, SL-HZO exhibits higher polarization during program/erase cycling. This is attributed to the larger dielectric constant of SL-HZO, which mitigates the voltage drop in the IL, thereby enabling lower operating voltage and a larger memory window (MW). In addition, both the ferroelectric (FE) layer and IL are deposited in the same atomic layer deposition (ALD) chamber, which significantly reduces device contamination. AlON/SL-HZO Fe-FinFET shows a significant MW, reaching up to 2.44 V, and achieves high-speed program/erase operations with a duration of 100 ns at ±4.5 V. The endurance can reach $10^{{4}}$ cycles, and the MW remains stable at 2.4 V over ten years at room temperature (RT). Therefore, the fabricated AlON-based SL-HZO Fe-FinFET meets the requirements for future high-speed, low-power, and sufficiently large MW applications. It holds promising potential for development in memory devices.

In this study, scaled ferroelectric fin field-effect transistors (Fe-FinFETs) based on HfZrO2 were fabricated and characterized for multi-level cell (MLC) operations. With the scaled dimensions of 40 nm for the fin width and gate length of 200–320 nm, the fabricated Fe-FinFET exhibited a large memory window measuring 2.8 V, which is more fault-tolerant for MLC operations. Further, the Fe-FinFET depicted a high switching speed of 100 ns and clearly separated intermediate states, which are suitable for MLC operations. Robust endurance of up to 105 fatigue cycles for each state and a data retention time of up to 104 s without degradation were recorded. The Fe-FinFET demonstrates a high potential for high-density nonvolatile memory applications.

This study reports the ferroelectric (FE) layer of Hf0.5Zr0.5O2(HZO) film on a Ge gate-all-around field-effect-transistor (GAAFET) with inversion mode (IM) and junctionless (JL) mode, and is the first that discuss the association of the JL field-effect transistor conduction mechanism in the subthreshold region with the transient negative capacitance (TNC) effect of the FE layer are discussed. The IM Ge FE-GAAFET exhibited a minimum subthreshold slope (SSmin) of 55 mV dec?1and a high ION/IOFFratio of >106. The sub-60 mV dec?1SS result demonstrates surface potential amplification, which is attributed to the TNC effect. Furthermore, the Ge JL FE-GAAFETs exhibited an SSminof 58 mV dec?1, a high ION/IOFFratio (>105), and reverse drain-induced barrier lowering when compared with baseline HfO2devices. These IM and JL Ge FE-GAAFETs are highly suitable for low-power integrated circuit applications.