42 results on '"Benabes, Philippe"'
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2. A CMOS readout circuit for a low shunt resistance IR photo-detector
3. A Sub-pJ/Bit, Low-ER Mach–Zehnder-Based Transmitter for Chip-to-Chip Optical Interconnects
4. A Compact Active Phaser with Enhanced Group Delay Linearity for Analog Signal Processing
5. A new algorithm for an incremental sigma-delta converter reconstruction filter
6. Design and Synthesis of Arbitrary Group Delay Filters for Integrated Analog Signal Processing
7. A Temperature-Aware Analysis of SAR ADCs for Smart Vehicle Applications
8. A 14-bit 250 kS/s two-step inverter-based incremental $$\varSigma \varDelta$$ Σ Δ ADC for CMOS image sensor in $$0.18\,\upmu \hbox {m}$$ 0.18 μ m technology
9. Delay estimation and measurement circuit for a high-speed CMOS clocked comparator
10. A 14-b two-step inverter-based ΣΔ ADC for CMOS image sensor
11. Analog bandwidth mismatch compensation for time-interleaved ADCs using FD-SOI technology
12. A new two-step ΣΔ architecture column-parallel ADC for CMOS image sensor
13. Enseignement de la microélectronique à Supélec : Bilan de la pédagogie mise en place en 2012 et perspectives d’évolution
14. Mismatch calibration methods for high-speed time-interleaved ADCs
15. 22.5 A 1.62GS/s time-interleaved SAR ADC with digital background mismatch calibration achieving interleaving spurs below 70dBFS
16. Enseignement de la microélectronique à Supélec : une nouvelle pédagogie mise en place en 2012
17. High‐loop‐delay sixth‐order bandpass continuous‐time sigma–delta modulators
18. A design methodology for delta-sigma converters based on solid-state passive filters
19. Efficient optimization methodology for CT functions based on a modified bayesian kriging approach
20. A high voltage programmable input interface for avionic equipment
21. A versatile input interface for avionic computers
22. Optimization of bandpass charge sampling filters in hybrid filter banks converters for cognitive radio applications
23. A high-level modeling framework for the design and optimization of complex CT functions
24. Generalized multi-stage closed loop sigma delta modulator
25. Effective modeling of CT functions for fast simulations using MATLAB-Simulink and VHDLAMS applied to Sigma-Delta architectures
26. Design of electronic control circuit of piezo-electric resonators for ΣΔ modulator loop in AMS Bi-CMOS 0.35µm
27. Synthesis of Subband Hybrid Filter Banks ADCs with finite word-length coefficients using adaptive equalization
28. Wide-band multipath A to D converter for cognitive radio applications
29. Synthesis of complex subband Hybrid Filter Banks A/D converters using adaptive filters
30. Novel loop architectures for enhancing linearity and resolution of analog-to-digital converters
31. A self-calibration scheme for extended frequency-band-decomposition sigma-delta ADC
32. Adaptive equalization for calibration of subband hybrid filter banks A/D converters
33. Completely first order and tone free partitioned data weighted averaging technique used in a multibit delta sigma modulator
34. Frequency-Band-Decomposition converters using continuous-time Sigma-Delta A/D modulators
35. Extended frequency-band-decomposition sigma–delta A/D converter
36. Band-pass continuous-time delta-sigma modulators employing LWR resonators
37. Design and construction of the high-speed optoelectronic memory system demonstrator
38. Fast simulation of bandpass continuous-time ΣΔ modulators
39. A new method to synthesize and optimize band-pass delta-sigma modulators
40. Optimization of the noise transfer function of Extended-Frequency-Band-Decomposition sigma-delta A/D converters
41. Fixed-step simulation of Continuous-Time ΣΔ modulators
42. A Sigma-Delta Converter with Adjustable Tradeoff between Resolution and Consumption
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