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Start Over Author "E. Deloffre" Journal 2015 ieee 17th electronics packaging and technology conference (eptc)
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1. 200 nm Wafer-to-wafer overlay accuracy in wafer level Cu/SiO2 hybrid bonding for BSI CIS

Author

Thomas Wagenleitner, L. Chitu, M. Bernauer, Bernhard Rebhan, E. Deloffre, A. Jouve, V. Balan, Sandrine Lhostis, Florian Kurz, and M. Heilig

Subjects
Engineering drawing, Materials science, Wafer bonding, Annealing (metallurgy), business.industry, Hardware_PERFORMANCEANDRELIABILITY, Overlay, CMOS, Anodic bonding, Hardware_INTEGRATEDCIRCUITS, Surface roughness, Optoelectronics, Wafer, Image sensor, business
Abstract

Sub 200 nm wafer-to-wafer (w2w) overlay accuracy on the entire 300 mm wafer was successfully demonstrated via wafer level Cu/SiO2 hybrid bonding. Cu bonding pads relevant for back-side illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor (CIS) were used for the experiment. Further, a crucial component to improve the overlay accuracy, namely the overlay model which identifies systematic alignment errors, was described.

Published
2015

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