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From the perspective of the irreversible energy loss of the second law of thermodynamics, that is entropy generation, theoretical analysis on the influence of delamination appeared at the die attach (DA) layer on the chip junction temperature of high power LED-COB package is carried out. First, thermal simulation of chip-on-board LED package with different position of interface delamination is investigated. The results show that delamination occurs at the edge position is more harmful for blocking heat transfer in the overall LED package than that of the center position. Second, entropy generation of edge position and center position in die attach layer with non-delamination is calculated. In the same conditions, the entropy generation value of the edge position is larger than that of the center position, that is, compared to center position, the larger irreversible heat flux loss in the edge position of die attach in the heat conduction process is higher.

At present, owing to the remarkable properties of mechanical properties and electrical conductivity, the carbon nanotubes (CNTs) have been used in many areas such as sensors, field-effect transistor (FET), photoelectronic devices and composite materials, etc. It should be noted that the performance of electronic device is depended on the properties of CNTs. Therefore, we investigated the mechanical properties of pristine and modified CNTs and their corresponding electrical conductivity (the band structure) under the tensile behavior through the first principle theory based on density functional theory (DFT). First of all, the pristine (10, 0) CNTs were chose and their mechanical properties were calculated. The results showed that the pristine (10, 0) CNTs had an excellent ductility that the deformation can be up to 18%. Then, the band gaps corresponding to the deformation were analyzed. We found that the band gap was increased with the degree of deformation. At last, the mechanical properties of the modified (10, 0) CNTs was studied. Compared with the pristine CNTs, the CNTs modified with hydroxyl had larger ductility and yield strength. These discoveries will provide a heavy support for the CNTs based nano-sized devices.

In this paper a novel package structure of chip on board (COB) LED is proposed. Compared with the normal COB with a large number of layer structures, the substrate is removed in the novel. So the LED chip can directly bonded to the radiator, the cooling path is also effectively reduced. The heat generated by the chip can directly dissipate to the outside through the radiator. Then two kinds of finite element modules of LED package are established and simulated by ANSYS software, respectively. From the thermal analysis results, the junction temperature of the proposed module is 15°C lower than the normal one in the case of 4×4 modules, and the temperature distribution is also more uniform; from the thermal stress analysis results, the maximum stress of the novel is 55.0MPa lower than the normal in the case of 4×4 modules. So the results demonstrate the novel module structure of LEDCOB has a better heat dissipation and a lower thermal stress. And the results also provide a better suggestion for designing LED module structure in the future.

With the development of science and technology, the electronic devices trend to miniaturization and high-density integration. And the nano-scale device becomes the inevitable trend. The thermal dissipation question was concerned as following. The thermal conductivity of graphene and silicon heterostructure is investigated by molecular dynamic simulation in this paper. The relationship between thermal conductivity and temperature is analyzed when the contact defect area is from 0 to 35%. The thermal conductivity of the model is calculated from 300K to 800K. It was found that when the temperature was between 300K∼800K, the thermal conductivity of the perfect heterostructure showed a decreasing tendency. However, when the temperature was between 300K∼500K, the thermal conductivity showed slowly rising tendency. When the defect contact area of heterostructure's reached to 35%, it was thought that the main reason for the decrease of thermal conductivity affected by the temperature was the coupling of the graphene phonon ZA mode and silicon wave. Our results show that graphene can enhance the thermal transfer properties of silicon nanofilm. The investigation implies that graphene can open up opportunities for MEMS/NEMS devices.

In this paper, a novel new package solution for CMOS image sensor (CIS) based on molding compound interconnect substrate (MIS) is proposed. First, a 13 million pixel CIS packaged by quad flat no lead (QFN) is chosen as a reference. Considering the design parameters, a new package structure based on MIS is designed. Second, Two kinds of three-dimensional finite element models of CIS package are respectively established by ANSYS Workbench. One is packaged by QFN, and the other one is packaged by MIS. Then the thermal-mechanical property of the two package structures during the cooling process just after molding is analyzed. In the initial simulation, warpage of new package structure based on MIS is 22.915µm, which is less than it in QFN model. However, the peak equivalent stress in CIS chip of QFN is 74.307Mpa much less than 335.53Mpa in MIS model. Third, as the geometry parameters and epoxy molding compound (EMC) characteristics influencing the reliability of the package, a series of comprehensive parametric studies are conducted in this paper. From the simulation, the opening size and the CTE of EMC are found to be the most critical factors, which affect the warpage of package and equivalent stress in CIS chip.