1. Investigation of 30nm Tri-layered Strained Silicon HOI MOSFET using TCAD
- Author
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Rudra Sankar Dhar and Lalthanpuii Khiangte
- Subjects
010302 applied physics ,Materials science ,business.industry ,Strained silicon ,Heterojunction ,Insulator (electricity) ,02 engineering and technology ,021001 nanoscience & nanotechnology ,01 natural sciences ,Device leakage ,Oxide semiconductor ,0103 physical sciences ,MOSFET ,Optoelectronics ,Field-effect transistor ,0210 nano-technology ,business - Abstract
This paper explores the 30nm channel length tri-layered strained channel Heterostructure on Insulator (HOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The effects of strained Silicon-Germanium thickness on the device leakage current have been analyzed and optimized using Synopsis TCAD simulations. The enriched device characteristics for the scaled 30nm device have also been examined in comparison to 40nm and 50nm channel length device MOSFET.
- Published
- 2018
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