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Edge devices often have to processdata at low power and would benefit from being adaptable. Given that the data coming into these devices is generally unlabeled, unsupervised training on these devices is beneficial. This paper examines a low power approach to implement the winner takes all algorithm, for self-organizing maps through a memristor crossbar based circuit. A novel neuron circuit is designed for the winning neuron detection and lateral inhibition operations. Our experimental results show that the proposed system can self-organize based on unlabeled training data. The proposed design was around 0.002mm$^{\mathbf{2\, $textbf{{in area and consumed about 0.2mW of power. When compared to a CPU, the design had a higher error rate, but was 100 times faster and consumed much lower area and power. Thus when area or power reduction are crucially important, this approach is quite viable.

Custom low power hardware for network intrusion detection is in great demand, as this would allow for efficient security in battery-powered network devices. This paper presents a memristor crossbar based Multilayer Perceptron (MLP) capable of performing network intrusion detection. The MLP is trained based on the Knowledge Discovery and Datamining (KDD) dataset. Once the network is trained, the weight values are programmed into a simulated memristor crossbar hardware system to show that custom circuitry can be designed to perform on-chip intrusion detection. We show the proposed memristor system is capable of achieving greater than 99% intrusion detection accuracy if the memristors utilized are able to store at least 4 unique values (essentially acting as 2-bit devices). Furthermore, we present a number of studies that quantify the amount of classification accuracy lost due to analog processing and amplification in the signal path. This circuit is capable of tolerating significant amplifier gain error (up to 30%) before classification accuracy drops below 99%.