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SiC GTO is one of the most powerful power devices and very promising in high power applications such as HVDC and MW traction. However, the die size of SiC GTO is limited by the material defects, resulting in small current handling capability of discrete devices. Different from the situation in Si GTOs that parallel operation is never practically feasible, it is potential for paralleled SiC GTOs to balance their static currents naturally owing to the exhibited positive temperature coefficient of on-resistance in their temperature-dependent forward current-voltage characteristics according to our recent study. This paper focuses on analyzing the parallel operation of SiC GTOs. The temperature-dependent forward conduction characteristic and dynamic current sharing characteristics of SiC GTO is firstly investigated. And then the turn-off process is analyzed to explain the reason why turn-off failure occurs. Some possible solutions have also been proposed and verified to solve the turn-off failure problem. Therefore, the feasibility of parallel operation of SiC GTOs is demonstrated, and this will further help improve the power handling capability of SiC GTO based power electronics systems.

In this brief, an evaluation is made on the steady-state and dynamic electrical characteristics of high voltage Silicon Carbide (SiC) Insulated Gate Bipolar Transistor (IGBT). Through two-dimensional (2-D) numerical simulation, the impact of the key parameters of the device cell on the performance trade-off between dynamic switching noise and power dissipation is studied. With carrier lifetime in the drift layer enhanced, the generation of high dv/dt noise can be suppressed to a certain extent, but the slowdown of turn-off transient and the resulting increased turn-off power loss weakens device’s maximum operation frequency. It is revealed that the width of JFET region is important for the design of forward voltage drop V on and onstate power loss as a narrow JFET greatly limits the carrier transport into drift region. The introducing of Current Enhancement Layer (CEL) is shown to be an effective way to control carrier injection at the emitter side, though its extension will get the turn-off loss E off increased. With a CEL of moderate doping concentration and extension of approximately 1 μm, the voltage rising rate of SiC IGBT under punch through can be reduced while the frequency capability keeps almost unaffected.