1. Efficient On-chip Acceleration of Machine Learning Models for Detection of RF Signal Modulation
- Author
-
Jongseok Woo, Saibal Mukhopadhyay, and Kuchul Jung
- Subjects
Low complexity ,Computer Science::Hardware Architecture ,Acceleration ,Artificial neural network ,CMOS ,Computer science ,Modulation ,Computer Science::Neural and Evolutionary Computation ,Bandwidth (signal processing) ,Semiconductor device modeling ,Electronic engineering ,Computer Science::Computation and Language (Computational Linguistics and Natural Language and Speech Processing) ,Radio frequency - Abstract
This paper presents a design methodology for efficient on-chip acceleration of deep neural network (DNN) for classification of signal modulation in Radio Frequency signals. A low complexity DNN model with ternary weights is developed to reduce computational demand. A digital chip architecture with complex multiply-and-accumulate (MAC) engines are presented to accelerate the DNN model. Simulation results in 28nm CMOS show that the low-complexity DNN model coupled with the on-chip accelerator increases allowable instantaneous bandwidth of the RF signals with minimal impact on the classification accuracy.
- Published
- 2021