Search

Although molybdenum disulfide (MoS 2 ) is highlighted as a promising channel material, MoS 2 -based field-effect transistors (FETs) have a large threshold voltage hysteresis (Δ V TH ) from interface traps at their gate interfaces. In this work, the Δ V TH of MoS 2 FETs is significantly reduced by inserting a 3-aminopropyltriethoxysilane (APTES) passivation layer at the MoS 2 /SiO 2 gate interface owing to passivation of the interface traps. The Δ V TH is reduced from 23 to 10.8 V by inserting the 1%-APTES passivation layers because APTES passivation prevents trapping and detrapping of electrons, which are the major source of the Δ V TH . The reduction in the density of interface traps ( D it ) is confirmed by the improvement of the subthreshold swing (SS) after inserting the APTES layer. Furthermore, the improvement in the synaptic characteristics of the MoS 2 FET through the APTES passivation is investigated. Both inhibitory and excitatory postsynaptic currents (PSC) are increased by 33% owing to the reduction in the Δ V TH and the n-type doping effect of the APTES layer; moreover, the linearity of PSC characteristics is significantly improved because the reduction in Δ V TH enables the synaptic operation to be over the threshold region, which is linear. The application of the APTES gate passivation technique to MoS 2 FETs is promising for reliable and accurate synaptic applications in neuromorphic computing technology as well as for the next-generation complementary logic applications.

Schottky barrier height (SBH) engineering of contact structures is a primary challenge to achieve high performance in nanoelectronic and optoelectronic applications. Although SBH can be lowered through various Fermi-level (FL) unpinning techniques, such as a metal/interlayer/semiconductor (MIS) structure, the room for contact metal adoption is too narrow because the work function of contact metals should be near the conduction band edge (CBE) of the semiconductor to achieve low SBH. Here, we propose a novel structure, the metal/transition metal dichalcogenide/semiconductor structure, as a contact structure that can effectively lower the SBH with wide room for contact metal adoption. A perpendicularly integrated molybdenum disulfide (MoS 2 ) interlayer effectively alleviates FL pinning by reducing metal-induced gap states at the MoS 2 /semiconductor interface. Additionally, it can induce strong FL pinning of contact metals near its CBE at the metal/MoS 2 interface. The technique using FL pinning and unpinning at metal/MoS 2 /semiconductor interfaces is first introduced in the MIS scheme to allow the use of various contact metals. Consequently, significant reductions of the SBH from 0.48 to 0.12 eV for GaAs and from 0.56 to 0.10 eV for Ge are achieved with several different contact metals. This work significantly reduces the dependence on contact metals with lowest SBH and proposes a new way of overcoming current severe contact issues for future nanoelectronic and optoelectronic applications.

In the post-Moore era, it is well-known that contact resistance has been a critical issue in determining the performance of complementary metal-oxide-semiconductor (CMOS) reaching physical limits. Conventional Ohmic contact techniques, however, have hindered rather than helped the development of CMOS technology reaching its limits of scaling. Here, a novel conductive filament metal-interlayer-semiconductor (CF-MIS) contact-which achieves ultralow contact resistance by generating CFs and lowering Schottky barrier height (SBH)-is investigated for potential applications in various nanodevices in lieu of conventional Ohmic contacts. This universal and innovative technique, CF-MIS contact, forming the CFs to provide a quantity of electron paths as well as tuning SBH of semiconductor is first introduced. The proposed CF-MIS contact achieves ultralow specific contact resistivity, exhibiting up to ∼×700 000 reduction compared to that of the conventional metal-semiconductor contact. This study proves the viability of CF-MIS contacts for future Ohmic contact schemes and that they can easily be extended to mainstream electronic nanodevices that suffer from significant contact resistance problems.

A metal-interlayer-semiconductor (M-I-S) structure with excellent thermal stability and electrical performance for a nonalloyed contact scheme is developed, and considerations for designing thermally stable M-I-S structure are demonstrated on the basis of n-type germanium (Ge). A thermal annealing process makes M-I-S structures lose their Fermi-level unpinning and electron Schottky barrier height reduction effect in two mechanisms: (1) oxygen (O) diffusion from the interlayer to the contact metal due to high reactivity of a pure metal contact with O and (2) interdiffusion between the contact metal and semiconductor through grain boundaries of the interlayer. A pure metal contact such as titanium (Ti) provides very poor thermal stability due to its high reactivity with O. A structure with a tantalum nitride (TaN) metal contact and a titanium dioxide (TiO 2 ) interlayer exhibits moderate thermal stability up to 400 °C because TaN has much lower reactivity with O than with Ti. However, the TiO 2 interlayer cannot prevent the interdiffusion process because it is easily crystallized during thermal annealing and its grain boundaries act as diffusion path. A zinc oxide (ZnO) interlayer doped with group-III elements, such as an aluminum-doped ZnO (AZO) interlayer, acts as a good diffusion barrier due to its high crystallization temperature. A TaN/AZO/n-Ge structure provides excellent thermal stability above 500 °C as it can prevent both O diffusion and interdiffusion processes; hence, it exhibits Ohmic contact properties for all thermal annealing temperatures. This work shows that, to fabricate a thermally stable and low resistive M-I-S contact structure, the metal contact should have low reactivity with O and a low work-function, and the interlayer should have a high crystallization temperature and a low conduction band offset to Ge. Furthermore, new insights are provided for designing thermally stable M-I-S contact schemes for any semiconductor material that suffers from the Fermi-level pinning problem.

A perfect ohmic contact formation technique for low-resistance source/drain (S/D) contact of germanium (Ge) n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) is developed. A metal-interlayer-semiconductor (M-I-S) structure with an ultrathin TiO 2 /GeO 2 interlayer stack is introduced into the contact scheme to alleviate Fermi-level pinning (FLP), and reduce the electron Schottky barrier height (SBH). The TiO 2 interlayer can alleviate FLP by preventing formation of metal-induced gap states (MIGS) with its very low tunneling resistance and series resistance and can provide very small electron energy barrier at the metal/TiO 2 interface. The GeO 2 layer can induce further alleviation of FLP by reducing interface state density (D it ) on Ge which is one of main causes of FLP. Moreover, the proposed TiO 2 /GeO 2 stack can minimize interface dipole formation which induces the SBH increase. The M-I-S structure incorporating the TiO 2 /GeO 2 interlayer stack achieves a perfect ohmic characteristic, which has proved unattainable with a single interlayer. FLP can be perfectly alleviated, and the SBH of the metal/n-Ge can be tremendously reduced. The proposed structure (Ti/TiO 2 /GeO 2 /n-Ge) exhibits 0.193 eV of effective electron SBH which achieves 0.36 eV of SBH reduction from that of the Ti/n-Ge structure. The proposed M-I-S structure can be suggested as a promising S/D contact technique for nanoscale Ge n-channel transistors to overcome the large electron SBH problem caused by severe FLP.

We demonstrate the contact resistance reduction for III-V semiconductor-based electrical and optical devices using the interfacial dipole effect of ultrathin double interlayers in a metal-interlayers-semiconductor (M-I-S) structure. An M-I-S structure blocks metal-induced gap states (MIGS) to a sufficient degree to alleviate Fermi level pinning caused by MIGS, resulting in contact resistance reduction. In addition, the ZnO/TiO 2 interlayers of an M-I-S structure induce an interfacial dipole effect that produces Schottky barrier height (Φ B ) reduction, which reduces the specific contact resistivity (ρ c ) of the metal/n-type III-V semiconductor contact. As a result, the Ti/ZnO(0.5 nm)/TiO 2 (0.5 nm)/n-GaAs metal-double interlayers-semiconductor (M-DI-S) structure achieved a ρ c of 2.51 × 10 -5 Ω·cm 2 , which exhibited an ∼42 000× reduction and an ∼40× reduction compared to the Ti/n-GaAs metal-semiconductor (M-S) contact and the Ti/TiO 2 (0.5 nm)/n-GaAs M-I-S structure, respectively. The interfacial dipole at the ZnO/TiO 2 interface was determined to be approximately -0.104 eV, which induced a decrease in the effective work function of Ti and, therefore, reduced Φ B . X-ray photoelectron spectroscopy analysis of the M-DI-S structure also confirmed the existence of the interfacial dipole. On the basis of these results, the M-DI-S structure offers a promising nonalloyed Ohmic contact scheme for the development of III-V semiconductor-based applications.