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In recent years, 2D layered materials have been considered as promising photon absorption channel media for next-generation phototransistors due to their atomic thickness, easily tailored single-crystal van der Waals heterostructures, ultrafast optoelectronic characteristics, and broadband photon absorption. However, the photosensitivity obtained from such devices, even under a large bias voltage, is still unsatisfactory until now. In this paper, high-sensitivity phototransistors based on WS2 and MoS2 are proposed, designed, and fabricated with gold nanoparticles (AuNPs) embedded in the gate dielectric. These AuNPs, located between the tunneling and blocking dielectric, are found to enable efficient electron trapping in order to strongly suppress dark current. Ultralow dark current (10−11 A), high photoresponsivity (1090 A W−1), and high detectivity (3.5 × 1011 Jones) are obtained for the WS2 devices under a low source/drain and a zero gate voltage at a wavelength of 520 nm. These results demonstrate that the floating-gate memory structure is an effective configuration to achieve high-performance 2D electronic/optoelectronic devices. [ABSTRACT FROM AUTHOR]

In recent years, 2D layered materials have been considered as promising photon absorption channel media for next-generation phototransistors due to their atomic thickness, easily tailored single-crystal van der Waals heterostructures, ultrafast optoelectronic characteristics, and broadband photon absorption. However, the photosensitivity obtained from such devices, even under a large bias voltage, is still unsatisfactory until now. In this paper, high-sensitivity phototransistors based on WS2 and MoS2 are proposed, designed, and fabricated with gold nanoparticles (AuNPs) embedded in the gate dielectric. These AuNPs, located between the tunneling and blocking dielectric, are found to enable efficient electron trapping in order to strongly suppress dark current. Ultralow dark current (10−11 A), high photoresponsivity (1090 A W−1), and high detectivity (3.5 × 1011 Jones) are obtained for the WS2 devices under a low source/drain and a zero gate voltage at a wavelength of 520 nm. These results demonstrate that the floating-gate memory structure is an effective configuration to achieve high-performance 2D electronic/optoelectronic devices. [ABSTRACT FROM AUTHOR]