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Stretchable strain sensors with high stability, high responsiveness, and low detection limit provide the broad potential for intelligent robots and electronic skin. However, developing low‐cost strain sensors with contact and non‐contact sensing modes remains a significant challenge. In this study, a flexible magnetic strain sensor based on a sandwich structure is proposed to address this challenge. The proposed structure utilizes the coordination between carbon black and Fe3O4 microparticles in the silicone rubber matrix to enhance the sensor's sensitivity to external strain and magnetic stimuli. The sensor exhibits excellent tensile properties with a strain range of up to 180%, fast response/recovery time (78 ms/65 ms), high stability, and durability after 9000 cycles. Moreover, the flexible magnetic strain sensors can detect micro‐vibration and micro‐strain signals. It can also be performed as electronic skin to precisely sense human movements. Furthermore, the newly developed sensor can accurately sense oncoming objects and bicycle riding speed/distance, and a flexible magnetic keyboard is conceived. Consequently, the dual‐modal magnetic strain sensor exhibits an excellent ability to identify contact and non‐contact states and has broad application prospects in next‐generation intelligent products. [ABSTRACT FROM AUTHOR]

Highly efficient Hamming distance (HD) computations can significantly boost up modern data‐intensive algorithms. However, the traditional complementary metal–oxide–semiconductor devices configured circuits suffer from the huge power consumption with periphery complexity for HD computations. Herein, the implementation of highly reliable and energy efficient in‐memory HD computations in 1 Kb 1‐transistor‐1‐memristor (1T1M) TiN/HfOx/TaOx/TiN array chip is reported. 1T1M devices demonstrate a high on/off ratio of 50, high programming speed of 20 ns, and low energy consumption of 0.224 pJ bit−1. By modulating the 1T1M cell gate and source signal synergistically, the characteristic XOR operations of the binary information are executed in a reliable manner. Importantly, equipped with a stable low resistance state (LRS) distribution (coefficient of variation <11%), the developed 1T1M arrays can implement accurate HD computations between two 8‐bit strings and simultaneously store computing results in the memristors. The complementary studies demonstrate that the stable LRS is attributed to the TaOx built‐in compliance layer which facilitates the transistor surge current reduction during forming and SET, elaborating the significant potential for achieving reliable in‐memory HD computations. Such architecture manifests a 5‐ and 36.89‐fold enhancement of the processing latency and energy efficiency in comparison with latest reports, promoting the fan out of new in‐memory computing applications. [ABSTRACT FROM AUTHOR]